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* x86: detect mwait capabilities and extensions, when presentavg2013-07-283-0/+13
| | | | | Reviewed by: kib (earlier amd64-only version) MFC after: 2 weeks
* - Use kmem_malloc rather than kmem_alloc() for GDT/LDT/tss allocations etc.jeff2013-07-261-4/+5
| | | | | | | | | This eliminates some unusual uses of that API in favor of more typical uses of kmem_malloc(). Discussed with: kib/alc Tested by: pho Sponsored by: EMC / Isilon Storage Division
* Add support for emulation of the "or r/m, imm8" instruction.neel2013-07-231-3/+60
| | | | | Submitted by: Zhixiang Yu (zxyu.core@gmail.com) Obtained from: GSoC 2013 (AHCI device emulation for bhyve)
* Fix a bug introduced in r252646 that causes a page with the PG_PTE_PAT bit setneel2013-07-231-3/+18
| | | | | | | | | | | | to be interpreted as a superpage. This is because PG_PTE_PAT is at the same bit position in PTE as PG_PS is in a PDE. This caused a number of regressions on amd64 systems: panic when starting X applications, freeze during shutdown etc. Pointy hat to: me Tested by: gperez@entel.upc.edu, joel, dumbbell Reviewed by: kib
* MFi386: add ddb "show sysregs" command.kib2013-07-151-0/+30
| | | | | Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Clear m->object for the page taken from the delayed free list forkib2013-07-101-0/+1
| | | | | | | | | | reuse as the pv chink page in reclaim_pv_chunk(). Having non-NULL m->object is wrong for page not owned by an object and confuses both vm_page_free_toq() and vm_page_remove() when the page is freed later. Reported and tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 3 days
* Import HighPoint DC Series Data Center HBA (DC7280 and R750) driver.delphij2013-07-062-0/+5
| | | | | | | | This driver works for FreeBSD/i386 and FreeBSD/amd64 platforms. Many thanks to HighPoint for providing this driver. MFC after: 1 day
* If a superpage mapping is being removed then we need to ignore the PG_PDE_PATneel2013-07-031-3/+9
| | | | | | | | | | | | | | | | | | | bit when looking up the vm_page associated with the superpage's physical address. If the caching attribute for the mapping is write combining or write protected then the PG_PDE_PAT bit will be set and thus cause an 'off-by-one' error when looking up the vm_page. Fix this by using the PG_PS_FRAME mask to compute the physical address for a superpage mapping instead of PG_FRAME. This is a theoretical issue at this point since non-writeback attributes are currently used only for fictitious mappings and fictitious mappings are not subject to promotion. Discussed with: alc, kib MFC after: 2 weeks
* Verify that all bytes in the instruction buffer are consumed during decoding.neel2013-07-031-0/+16
| | | | Suggested by: grehan
* Ignore guest PAT settings by default in EPT mappings.grehan2013-07-011-2/+10
| | | | | | | From experimentation, other hypervisors also do this. Diagnosed by: tycho nightingale at pluribusnetworks com Reviewed by: neel
* Fix issues with zeroing and fetching the counters, on x86 and ppc64.kib2013-07-011-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Issues were noted by Bruce Evans and are present on all architectures. On i386, a counter fetch should use atomic read of 64bit value, otherwise carry from the increment on other CPU could be lost for the given fetch, making error of 2^32. If 64bit read (cmpxchg8b) is not available on the machine, it cannot be SMP and it is enough to disable preemption around read to avoid the split read. On x86 the counter increment is not atomic on purpose, which makes it possible for the store of the incremented result to override just zeroed per-cpu slot. The effect would be a counter going off by arbitrary value after zeroing. Perform the counter zeroing on the same processor which does the increments, making the operations mutually exclusive. On i386, same as for the fetching, if the cmpxchg8b is not available, machine is not SMP and we disable preemption for zeroing. PowerPC64 is treated the same as amd64. For other architectures, the changes made to allow the compilation to succeed, without fixing the issues with zeroing or fetching. It should be possible to handle them by using the 64bit loads and stores atomic WRT preemption (assuming the architectures also converted from using critical sections to proper asm). If architecture does not provide the facility, using global (spin) mutex would be non-optimal but working solution. Noted by: bde Sponsored by: The FreeBSD Foundation
* Make sure all CPUID values are handled, instead of exiting thegrehan2013-06-281-10/+38
| | | | | | | | | | | | | | | bhyve process when an unhandled one is encountered. Hide some additional capabilities from the guest (e.g. debug store). This fixes the issue with FreeBSD 9.1 MP guests exiting the VM on AP spinup (where CPUID is used when sync'ing the TSCs) and the issue with the Java build where CPUIDs are issued from a guest userspace. Submitted by: tycho nightingale at pluribusnetworks com Reviewed by: neel Reported by: many
* Move definitions required by userland applications out of acpica_machdep.h.jkim2013-06-271-6/+2
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* Allow immediate operand.kib2013-06-201-1/+1
| | | | Sponsored by: The FreeBSD Foundation
* Some clarifications and updates for the comments, mostly retrievedkib2013-06-191-12/+16
| | | | | | from Bruce Evans. Trim the trailing spaces. MFC after: 1 week
* Fix a gcc warning uncovered after r251745.pluknet2013-06-181-0/+3
| | | | | Reported by: Sergey V. Dyatko Reviewed by: neel
* Upgrade Xen interface headers to Xen 4.2.1.gibbs2013-06-141-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move FreeBSD from interface version 0x00030204 to 0x00030208. Updates are required to our grant table implementation before we can bump this further. sys/xen/hvm.h: Replace the implementation of hvm_get_parameter(), formerly located in sys/xen/interface/hvm/params.h. Linux has a similar file which primarily stores this function. sys/xen/xenstore/xenstore.c: Include new xen/hvm.h header file to get hvm_get_parameter(). sys/amd64/include/xen/xen-os.h: sys/i386/include/xen/xen-os.h: Correctly protect function definition and variables from being included into assembly files in xen-os.h Xen memory barriers are now prefixed with "xen_" to avoid conflicts with OS native primatives. Define Xen memory barriers in terms of the native FreeBSD primatives. Sponsored by: Spectra Logic Corporation Reviewed by: Roger Pau Monné Tested by: Roger Pau Monné Obtained from: Roger Pau Monné (bug fixes)
* Replace cpusetffs_obj with CPU_FFS, missed in r251703.pluknet2013-06-141-1/+1
| | | | Reported by: bdrewery, O. Hartmann
* Remove unused macros PTESHIFT, PDESHIFT, PDPESHIFT and PML4ESHIFT.neel2013-06-143-9/+0
| | | | Reviewed by: alc
* - Add a BIT_FFS() macro and use it to replace cpusetffs_obj()jeff2013-06-131-2/+2
| | | | | Discussed with: attilio Sponsored by: EMC / Isilon Storage Division
* Assert that interrupts are enabled in the trap handlers on x86 beforekib2013-06-031-0/+1
| | | | | | | | calling generic code to deliver signals. Discussed with: bde Tested by: pho MFC after: 1 week
* Use slightly more idiomatic expression to get the address of array.kib2013-05-272-2/+2
| | | | | | Tested by: dim, pgj Sponsored by: The FreeBSD Foundation MFC after: 1 week
* The _MC_HASFPXSTATE and _MC_IA32_HASFPXSTATE flags have the same bitkib2013-05-271-1/+1
| | | | | | | | | value on purpose, but the ia32 context handling code is logically more correct to use the _MC_IA32_HASFPXSTATE name for the flag. Tested by: dim, pgj Sponsored by: The FreeBSD Foundation MFC after: 1 week
* The ia32_get_mcontext() does not need to set PCB_FULL_IRET. Thekib2013-05-271-1/+0
| | | | | | | | | usermode context state is not changed by the get operation, and get_mcontext() does not require full iret as well. Tested by: dim, pgj Sponsored by: The FreeBSD Foundation MFC after: 1 week
* When reporting the fault details, also print %rsp.kib2013-05-271-2/+2
| | | | | Sponsored by: The FreeBSD Foundation MFC after: 1 week
* When handling an exception from the attempt from loading the faultingkib2013-05-271-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | context on return from the trap handler, re-enable the interrupts on i386 and amd64. The trap return path have to disable interrupts since the sequence of loading the machine state is not atomic. The trap() function which transfers the control to the special handler would enable the interrupt, but an iret loads the previous eflags with PSL_I clear. Then, the special handler calls trap() on its own, which now sees the original eflags with PSL_I set and does not enable interrupts. The end result is that signal delivery and process exiting code could be executed with interrupts disabled, which is generally wrong and triggers several assertions. For amd64, the interrupts are enabled conditionally based on PSL_I in the eflags of the outer frame, as it is already done for doreti_iret_fault. For i386, the interrupts are enabled unconditionally, the ast loop could have opened a window with interrupts enabled just before the iret anyway. Reported and tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Driver 'aacraid' added. Supports Adaptec by PMC RAID controller families ↵achim2013-05-242-0/+5
| | | | | | Series 6, 7, 8 and upcoming products. Older Adaptec RAID controller families are supported by the 'aac' driver. Approved by: scottl (mentor)
* o Relax locking assertions for vm_page_find_least()attilio2013-05-211-1/+2
| | | | | | | | | | | | o Relax locking assertions for pmap_enter_object() and add them also to architectures that currently don't have any o Introduce VM_OBJECT_LOCK_DOWNGRADE() which is basically a downgrade operation on the per-object rwlock o Use all the mechanisms above to make vm_map_pmap_enter() to work mostl of the times only with readlocks. Sponsored by: EMC / Isilon storage division Reviewed by: alc
* Fix the hardware watchpoints on SMP amd64. Load the updated %drkib2013-05-214-23/+69
| | | | | | | | | | | registers also on other CPUs, besides the CPU which happens to execute the ddb. The debugging registers are stored in the pcpu area, together with the command which is executed by the IPI stop handler upon resume. Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Add amd64-specific ddb command 'show phys2dmap', which calculates thekib2013-05-211-0/+12
| | | | | | | | address in the direct map corresponding to the given physical address. Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Add basic support for FDT to i386 & amd64. This change includes:marcel2013-05-214-0/+21
| | | | | | | | | | | | | | | | | | | | | | 1. Common headers for fdt.h and ofw_machdep.h under x86/include with indirections under i386/include and amd64/include. 2. New modinfo for loader provided FDT blob. 3. Common x86_init_fdt() called from hammer_time() on amd64 and init386() on i386. 4. Split-off FDT specific low-level console functions from FDT bus methods for the uart(4) driver. The low-level console logic has been moved to uart_cpu_fdt.c and is used for arm, mips & powerpc only. The FDT bus methods are shared across all architectures. 5. Add dev/fdt/fdt_x86.c to hold the fdt_fixup_table[] and the fdt_pic_table[] arrays. Both are empty right now. FDT addresses are I/O ports on x86. Since the core FDT code does not handle different address spaces, adding support for both I/O ports and memory addresses requires some thought and discussion. It may be better to use a compile-time option that controls this. Obtained from: Juniper Networks, Inc.
* Improve readability of static assertions for OFFSET_* macros.ed2013-05-131-3/+4
| | | | | | Instead of doing all sorts of weird casting of constants to pointer-pointers, simply use the standard C offsetof() macro to obtain the offset of the respective fields in the structures.
* Tidy up some CVS workarounds.peter2013-05-122-2/+0
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* Fix several standard extended feature bits.rpaulo2013-05-111-3/+3
| | | | Submitted by: Oliver Pinter <oliver.pntr at gmail.com>
* Support array-type of stats in bhyve.neel2013-05-104-35/+74
| | | | | | | | | | | | | | | An array-type stat in vmm.ko is defined as follows: VMM_STAT_ARRAY(IPIS_SENT, VM_MAXCPU, "ipis sent to vcpu"); It is incremented as follows: vmm_stat_array_incr(vm, vcpuid, IPIS_SENT, array_index, 1); And output of 'bhyvectl --get-stats' looks like: ipis sent to vcpu[0] 3114 ipis sent to vcpu[1] 0 Reviewed by: grehan Obtained from: NetApp
* Retire write-only PCB_GS32BIT pcb flag on amd64.dchagin2013-05-096-7/+3
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* Correct the type for the literal used on the left side of the shift upkib2013-05-091-2/+2
| | | | | | | | | | to 63 bit positions. Do not fill the save area and do not set the saved bit in the xstate bit vector for the state which is not marked as enabled in xsave_mask. Reported and tested by: Jim Ohlstein <jim@ohlste.in> MFC after: 3 days
* Rename VM_NDOMAIN into MAXMEMDOM and move it into machine/param.h inattilio2013-05-072-7/+4
| | | | | | | | | order to match the MAXCPU concept. The change should also be useful for consolidation and consistency. Sponsored by: EMC / Isilon storage division Obtained from: jeff Reviewed by: alc
* Switch to standard copyright license textemaste2013-05-021-2/+2
| | | | | | | | The initial version of this came from Sandvine but had "PROVIDED BY NETAPP, INC" in the copyright text, presuambly because the license block was copied from another file. Replace it with standard "AUTHOR AND CONTRIBUTORS" form. Approvided by: grehan@
* Partially saved extended state must be handled always, i.e. for bothkib2013-05-011-26/+24
| | | | | | | | | | | | fpu-owned context, and for pcb-saved one. More, the XSAVE could do partial save, same as XSAVEOPT, so qualifier for the handler should be use_xsave and not use_xsaveopt. Since xsave_area_desc is now needed regardless of the XSAVEOPT use, remove the write-only use_xsaveopt variable. In collaboration with: jhb MFC after: 1 week
* The check to ensure that xstate_bv always has XFEATURE_ENABLED_X87 andkib2013-05-011-3/+0
| | | | | | | | | | | | XFEATURE_ENABLED_SSE bits set is not needed. CPU correctly handles any bitmask which is subset of the enabled bits in %XCR0. More, CPU instructions XSAVE and XSAVEOPT could write the mask without e.g. XFEATURE_ENABLED_SSE, after the VZEROALL. The check prevents the restoration of the otherwise valid FPU save area. In collaboration with: jhb MFC after: 1 week
* Add a new driver to support the Intel Non-Transparent Bridge(NTB).carl2013-04-291-0/+4
| | | | | | | | | | | | | | | | | | | | The NTB allows you to connect two systems with this device using a PCI-e link. The driver is made of two modules: - ntb_hw which is a basic hardware abstraction layer for the device. - if_ntb which implements the ntb network device and the communication protocol. The driver is limited at the moment to CPU memcpy instead of using DMA, and only Back-to-Back mode is supported. Also the network device isn't full featured yet. These changes will be coming soon. The DMA change will also bring in the ioat driver from the project branch it is on now. This is an initial port of the GPL/BSD Linux driver contributed by Jon Mason from Intel. Any bugs are my contributions. Sponsored by: Intel Reviewed by: jimharris, joel (man page only) Approved by: jimharris (mentor)
* Add RIP-relative addressing to the instruction decoder.grehan2013-04-256-79/+72
| | | | | | | | | | | | Rework the guest register fetch code to allow the RIP to be extracted from the VMCS while the kernel decoder is functioning. Hit by the OpenBSD local-apic code. Submitted by: neel Reviewed by: grehan Obtained from: NetApp
* Print RDSEED, ADX, and SMAP.rpaulo2013-04-181-0/+6
| | | | Pointed out by: kib
* - Correct spelling in commentsgabor2013-04-171-1/+3
| | | | Submitted by: Christoph Mallon <christoph.mallon@gmx.de> (via private mail)
* Print more bits from the standard extended features CPUID which will berpaulo2013-04-171-0/+13
| | | | available in the Haswell architecture (c.f. Intel Document #319433-012A).
* Create sysctl node 'hw.vmm.vmx' and populate it with oids that expose the VMXneel2013-04-131-0/+19
| | | | | | hardware capabilities. Obtained from: NetApp
* Fix the name of the pcb member in the comments.kib2013-04-131-2/+2
| | | | | Submitted by: Oliver Pinter <oliver.pntr@gmail.com> MFC after: 3 days
* Use the MAKEDEV_CHECKNAME flag to check for an invalid device name and returnneel2013-04-131-2/+6
| | | | | | an error instead of panicking. Obtained from: NetApp
* Remove ctl(4) from GENERIC. Also remove 'options CTL_DISABLE'trasz2013-04-121-4/+1
| | | | | | | | | | | and kern.cam.ctl.disable tunable; those were introduced as a workaround to make it possible to boot GENERIC on low memory machines. With ctl(4) being built as a module and automatically loaded by ctladm(8), this makes CTL work out of the box. Reviewed by: ken Sponsored by: FreeBSD Foundation
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