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* Welcome drm support for VIA unichrome chips.rnoland2010-01-311-0/+1
| | | | MFC after: 2 weeks
* add static qualifier to definition of a function already declared staticavg2010-01-291-1/+1
| | | | | | This is for improving code readibility only. MFC after: 1 week
* Fix array overflow. This routine is only called from procfs,trasz2010-01-241-2/+0
| | | | | | | which is not mounted by default, and I've been unable to trigger a panic without this fix applied anyway. Reviewed by: kib, cperciva
* Simplify the mapping of the system message buffer. Use the direct map justalc2010-01-232-12/+4
| | | | like ia64 does.
* For PT_TO_SCE stop that stops the ptraced process upon syscall entry,kib2010-01-232-125/+200
| | | | | | | | | | | | | | | | | | | | | | syscall arguments are collected before ptracestop() is called. As a consequence, debugger cannot modify syscall or its arguments. For i386, amd64 and ia32 on amd64 MD syscall(), reread syscall number and arguments after ptracestop(), if debugger modified anything in the process environment. Since procfs stopeven requires number of syscall arguments in p_xstat, this cannot be solved by moving stop/trace point before argument fetching. Move the code to read arguments into separate function fetch_syscall_args() to avoid code duplication. Note that ktrace point for modified syscall is intentionally recorded twice, once with original arguments, and second time with the arguments set by debugger. PT_TO_SCX stop is executed after cpu_syscall_set_retval() already. Reported by: Ali Polatel <alip exherbo org> Briefly discussed with: jhb MFC after: 3 weeks
* Move the examples for the 'hints' and 'env' keywords from various GENERICjhb2010-01-192-18/+0
| | | | | | kernel configs into NOTES. Reviewed by: imp
* Recommit r193732:ed2010-01-191-1/+1
| | | | | | | | | | | | | | | | Remove __gnu89_inline. Now that we use C99 almost everywhere, just use C99-style in the pmap code. Since the pmap code is the only consumer of __gnu89_inline, remove it from cdefs.h as well. Because the flag was only introduced 17 months ago, I don't expect any problems. Reviewed by: alc It was backed out, because it prevented us from building kernels using a 7.x compiler. Now that most people use 8.x, there is nothing that holds us back. Even if people run 7.x, they should be able to build a kernel if they run `make kernel-toolchain' or `make buildworld' first.
* Handling all the three clocks (hardclock, softclock, profclock) with theattilio2010-01-153-36/+58
| | | | | | | | | | | | | | | | | | LAPIC may lead to aliasing for softclock and profclock because frequencies are sized in order to fit mainly hardclock. atrtc used to take care of the softclock and profclock and it does still do, if the LAPIC can't handle the clocks properly. Revert the change when the LAPIC started taking charge of all three of them and let atrtc handle softclock and profclock if not explicitly requested. Such request can be made setting != 0 the new tunable machdep.lapic_allclocks or if the new device ATPIC is not present within the i386 kernel config (atrtc is linked to atpic presence). Diagnosed by: Sandvine Incorporated Reviewed by: jhb, emaste Sponsored by: Sandvine Incorporated MFC: 3 weeks
* Update the ident for the XENHVM kernel config to match the filename.jhb2010-01-141-1/+1
| | | | MFC after: 1 week
* Spell "Hz" correctly wherever it is user-visible.gavin2010-01-121-1/+1
| | | | | | | PR: bin/142566 Submitted by: N.J. Mann njm njm.me.uk Approved by: ed (mentor) MFC after: 2 weeks
* Use io(4) for I/O port access on ia64, rather than through sysarch(2).marcel2010-01-112-0/+10
| | | | | | | | | | | | | | | | | I/O port access is implemented on Itanium by reading and writing to a special region in memory. To hide details and avoid misaligned memory accesses, a process did I/O port reads and writes by making a MD system call. There's one fatal problem with this approach: unprivileged access was not being prevented. /dev/io serves that purpose on amd64/i386, so employ it on ia64 as well. Use an ioctl for doing the actual I/O and remove the sysarch(2) interface. Backward compatibility is not being considered. The sysarch(2) approach was added to support X11, but support for FreeBSD/ia64 was never fully implemented in X11. Thus, nothing gets broken that didn't need more work to begin with. MFC after: 1 week
* Simplify pmap_init(). Additionally, correct a harmless misbehavior on i386.alc2010-01-111-8/+2
| | | | | | | | | Specifically, where locore had created large page mappings for the kernel, the wrong vm page array entries were being initialized. The vm page array entries for the pages containing the kernel were being initialized instead of the vm page array entries for page table pages. MFC after: 1 week
* Eliminate unused declarations.alc2010-01-101-6/+0
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* Add INCLUDE_CONFIG_FILE in GENERIC on all non-embedded platforms.imp2010-01-101-0/+1
| | | | | | # This is the resolution of removing it from DEFAULTS... MFC after: 5 days
* Set md_ldt (pointer to the LDT) after md_ldt_sd (system segmentkib2010-01-091-1/+2
| | | | | | | | | | | | | | descriptor for the LDT) is populated. md_ldt is used by context-switch code as indicator that LDT segment register shall be loaded with GUSERLDT segment instead of 0, so context switch at the wrong time may cause attempt to load non-populated descriptor. Use store with the barrier to prevent other CPUs from seeing updated md_ldt but not seeing updated md_ldt_sd. Multithreaded process may context-switch to another thread of the process on another CPU and read md_ldt. MFC after: 1 week
* In sys/<arch>/conf/Makefile set TARGET to <arch>. That allowsbz2010-01-081-0/+2
| | | | | | | | | | | | | | | | sys/conf/makeLINT.mk to only do certain things for certain architectures. Note that neither arm nor mips have the Makefile there, thus essentially not (yet) supporting LINT. This would enable them do add special treatment to sys/conf/makeLINT.mk as well chosing one of the many configurations as LINT. This is a hack of doing this and keeping it in a separate commit will allow us to more easily identify and back it out. Discussed on/with: arch, jhb (as part of the LINT-VIMAGE thread) MFC after: 1 month
* Revert 200594. This file isn't intended for these sorts of things.imp2010-01-041-7/+0
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* Add vlan(4) to all GENERIC kernels.brooks2010-01-031-0/+1
| | | | MFC after: 1 week
* Quiet variable "shadows" warning:obrien2010-01-011-18/+18
| | | | | | | sys/vmmeter.h: warning: shadowed declaration is here machine/cpufunc.h: In function 'insw': machine/cpufunc.h: warning: declaration of 'cnt' shadows a global declaration ..snip..
* Update d_mmap() to accept vm_ooffset_t and vm_memattr_t.rnoland2009-12-291-2/+2
| | | | | | | | | | | | | This replaces d_mmap() with the d_mmap2() implementation and also changes the type of offset to vm_ooffset_t. Purge d_mmap2(). All driver modules will need to be rebuilt since D_VERSION is also bumped. Reviewed by: jhb@ MFC after: Not in this lifetime...
* - Create a separate section in in the MI NOTES file for PCI wireless NICjhb2009-12-181-9/+0
| | | | | | | drivers and move bwi(4) there from the PCI Ethernet NIC section. - Move ath(4) and ral(4) to the MI NOTES file. Reviewed by: rpaulo
* Add INCLUDE_CONFIG_FILE, and a note in comments about how to alsodougb2009-12-161-0/+6
| | | | include the comments with CONFIGARGS
* For ia32 syscall(), call cpu_set_syscall_retval(). Update comment insidekib2009-12-122-30/+6
| | | | | | cpu_set_syscall_retval() accordingly. MFC after: 1 week
* Simplify a macro not to generate unncessary symbols.jkim2009-12-081-14/+1
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* mca: small enhancements related to cpu quirksavg2009-12-031-8/+22
| | | | | | | | | | | | - use utility macros for CPU family/model checking - limit Intel P6 quirk to pre-Nehalem models (taken from OpenSolaris) - add AMD GartTblWkEn quirk for families 0Fh and 10h; I haven't experienced any problems without the quirk but both Linux and OpenSolaris do this - slightly re-arrange quirk code to provide for the future generalization and separation of vendor-specific quirk functions Reviewed by: jhb MFC after: 1 week
* mca: improve status checking, recording and reportingavg2009-12-022-49/+63
| | | | | | | | | | - directly print mca information in case we fail to allocate memory for a record - include bank number into mca record - print raw mca status value for extended information Reviewed by: jhb MFC after: 10 days
* amdsbwd: new driver for AMD SB600/SB7xx watchdog timeravg2009-11-301-0/+2
| | | | | | | | | | | | The hardware is compliant with WDRT specification, so I originally considered including generic WDRT watchdog support, but decided against it, because I couldn't find anyone to the code for me. WDRT seems to be not very popular. Besides, generic WDRT porbably requires a slightly different driver approach. Reviewed by: des, gavin, rpaulo MFC after: 3 weeks
* x86 cpu features: add MOVBE reporting and flagavg2009-11-302-1/+2
| | | | | The check is glimpsed from Linux and OpenSolaris. MOVBE instruction is found in Intel Atom processors.
* Simplify the invocation of vm_fault(). Specifically, eliminate the flagalc2009-11-271-3/+1
| | | | | | | VM_FAULT_DIRTY. The information provided by this flag can be trivially inferred by vm_fault(). Discussed with: kib
* - Add more aggressive BPF JIT optimization. This is in more favor of i386jkim2009-11-232-46/+68
| | | | | | | while the previous commit was more amd64-centric. - Use calloc(3) instead of malloc(3)/memset(3) in user land[1]. Submitted by: ed[1]
* Add an experimental and rudimentary JIT optimizer to reduce unncessaryjkim2009-11-212-51/+160
| | | | overhead from short BPF filter programs such as "get the first 96 bytes".
* General style cleanup, no functional change.jkim2009-11-201-32/+29
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* - Allocate scratch memory on stack instead of pre-allocating it withjkim2009-11-202-61/+66
| | | | | | | | | the filter as we do from bpf_filter()[1]. - Revert experimental use of contigmalloc(9)/contigfree(9). It has no performance benefit over malloc(9)/free(9)[2]. Requested by: rwatson[1] Pointed out by: rwatson, jhb, alc[2]
* Fix tinderbox build for i386 and sync amd64 with it.jkim2009-11-191-1/+1
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* - Change internal function bpf_jit_compile() to return allocated size ofjkim2009-11-181-9/+7
| | | | | | the generated binary and remove page size limitation for userland. - Use contigmalloc(9)/contigfree(9) instead of malloc(9)/free(9) to make sure the generated binary aligns properly and make it physically contiguous.
* - Make BPF JIT compiler working again in userland. We are limiting size ofjkim2009-11-182-12/+25
| | | | | generated native binary to page size for now. - Update copyright date and fix some style nits.
* Uppercase the UL suffix on a constant, so Flexelint doesn't worry thatphk2009-11-161-1/+1
| | | | | 'u1' might have been intended. No, that does not make sense and yes I have told them.
* Amd64 init_secondary() calls initializecpu() while curthread is stillkib2009-11-133-0/+7
| | | | | | | | | | | | | | | | not properly set up. r199067 added the call to TUNABLE_INT_FETCH() to initializecpu() that results in hang because AP are started when kernel environment is already dynamic and thus needs to acquire mutex, that is too early in AP start sequence to work. Extract the code that should be executed only once, because it sets up global variables, from initializecpu() to initializecpucache(), and call the later only from hammer_time() executed on BSP. Now, TUNABLE_INT_FETCH() is done only once at BSP at the early boot stage. In collaboration with: Mykola Dzham <freebsd levsha org ua> Reviewed by: jhb Tested by: ed, battlez
* - Style nits.kuriyama2009-11-121-3/+1
| | | | | | - Remove unneeded TUNABLE_INT(). Suggested by: avg, kib
* reflect that pg_ps_enabled is a tunable, not just a read-only sysctlavg2009-11-111-1/+1
| | | | Nod from: jhb
* Extract the code that records syscall results in the frame into MDkib2009-11-102-33/+40
| | | | | | | | | | | function cpu_set_syscall_retval(). Suggested by: marcel Reviewed by: marcel, davidxu PowerPC, ARM, ia64 changes: marcel Sparc64 tested and reviewed by: marius, also sunv reviewed MIPS tested by: gonzo MFC after: 1 month
* Make isa_dma functions MPSAFE by introducing its own private lock. Theserdivacky2009-11-091-27/+83
| | | | | | | | | | | | | | | | | | functions are selfcontained (ie. they touch only isa_dma.c static variables and hardware) so a private lock is sufficient to prevent races. This changes only i386/amd64 while there are also isa_dma functions for ia64/sparc64. Sparc64 are ones empty stubs and ia64 ones are unused as ia64 does not have isa (says marcel). This patch removes explicit locking of Giant from a few drivers (there are some that requires this but lack ones - this patch fixes this) and also removes the need for implicit locking of Giant from attach routines where it's provided by newbus. Approved by: ed (mentor, implicit) Reviewed by: jhb, attilio (glanced by) Tested by: Giovanni Trematerra <giovanni.trematerra gmail com> IA64 clue: marcel
* - Add hw.clflush_disable loader tunable to avoid panic (trap 9) atkuriyama2009-11-091-1/+18
| | | | | | | | | | | | | | map_invalidate_cache_range() even if CPU is not Intel. - This tunable can be set to -1 (default), 0 and 1. -1 is same as current behavior, which automatically disable CLFLUSH on Intel CPUs without CPUID_SS (should be occured on Xen only). You can specify 1 when this panic happened on non-Intel CPUs (such as AMD's). Because disabling CLFLUSH may reduce performance, you can try with setting 0 on Intel CPUs without SS to use CLFLUSH feature. Reviewed by: kib Reported by: karl, kuriyama Related to: kern/138863
* Strip from messages for users external URLs the project cannot directlyattilio2009-11-051-4/+1
| | | | | | control. Requested by: kib, rwatson
* Tweak memory allocation for amd64 suspend/resume CPU context.jkim2009-11-042-19/+17
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* Opteron rev E family of processor expose a bug where, in very rareattilio2009-11-041-0/+18
| | | | | | | | | | | | | | | | ocassions, memory barriers semantic is not honoured by the hardware itself. As a result, some random breakage can happen in uninvestigable ways (for further explanation see at the content of the commit itself). As long as just a specific familly is bugged of an entire architecture is broken, a complete fix-up is impratical without harming to some extents the other correct cases. Considering that (and considering the frequency of the bug exposure) just print out a warning message if the affected machine is identified. Pointed out by: Samy Al Bahra <sbahra at repnop dot org> Help on wordings by: jeff MFC: 3 days
* Fix some problems with effective mmap() offsets > 32 bits. This wasjhb2009-10-281-36/+30
| | | | | | | | | | | | partially fixed on amd64 earlier. Rather than forcing linux_mmap_common() to use a 32-bit offset, have it accept a 64-bit file offset. This offset is then passed to the real mmap() call. Rather than inventing a structure to hold the normal linux_mmap args that has a 64-bit offset, just pass each of the arguments individually to linux_mmap_common() since that more closes matches the existing style of various kern_foo() functions. Submitted by: Christian Zander @ Nvidia MFC after: 1 week
* In r197963, a race with thread being selected for signal deliverykib2009-10-273-40/+16
| | | | | | | | | | | | | while in kernel mode, and later changing signal mask to block the signal, was fixed for sigprocmask(2) and ptread_exit(3). The same race exists for sigreturn(2), setcontext(2) and swapcontext(2) syscalls. Use kern_sigprocmask() instead of direct manipulation of td_sigmask to reschedule newly blocked signals, closing the race. Reviewed by: davidxu Tested by: pho MFC after: 1 month
* Try hiding annoying text cursor after the video controller is reset.jkim2009-10-231-0/+5
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* o Introduce vm_sync_icache() for making the I-cache coherent withmarcel2009-10-211-0/+5
| | | | | | | | | | | | | | | | | | | | | the memory or D-cache, depending on the semantics of the platform. vm_sync_icache() is basically a wrapper around pmap_sync_icache(), that translates the vm_map_t argumument to pmap_t. o Introduce pmap_sync_icache() to all PMAP implementation. For powerpc it replaces the pmap_page_executable() function, added to solve the I-cache problem in uiomove_fromphys(). o In proc_rwmem() call vm_sync_icache() when writing to a page that has execute permissions. This assures that when breakpoints are written, the I-cache will be coherent and the process will actually hit the breakpoint. o This also fixes the Book-E PMAP implementation that was missing necessary locking while trying to deal with the I-cache coherency in pmap_enter() (read: mmu_booke_enter_locked). The key property of this change is that the I-cache is made coherent *after* writes have been done. Doing it in the PMAP layer when adding or changing a mapping means that the I-cache is made coherent *before* any writes happen. The difference is key when the I-cache prefetches.
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