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* Add PV list locking to pmap_enter(). Its execution is no longer serializedalc2012-06-261-57/+70
| | | | | | by the pvh global lock. Add a needed atomic operation to pmap_object_init_pt().
* Add PV chunk and list locking to pmap_change_wiring(), pmap_protect(), andalc2012-06-251-57/+109
| | | | | | | | pmap_remove(). The execution of these functions is no longer serialized by the pvh global lock. Make some stylistic changes to the affected code for the sake of consistency with related code elsewhere in the pmap.
* Introduce reserve_pv_entry() and use it in pmap_pv_demote_pde(). In orderalc2012-06-231-1/+83
| | | | | | | | | to add PV list locking to pmap_pv_demote_pde(), it is necessary to change the way that pmap_pv_demote_pde() allocates PV entries. Specifically, once pmap_pv_demote_pde() begins modifying the PV lists, it can't allocate any new PV chunks, because that could require the PV list lock to be dropped. So, all necessary PV chunks must be allocated in advance. To my surprise, this new approach is a few percent faster than the old one.
* Implement mechanism to export some kernel timekeeping data tokib2012-06-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usermode, using shared page. The structures and functions have vdso prefix, to indicate the intended location of the code in some future. The versioned per-algorithm data is exported in the format of struct vdso_timehands, which mostly repeats the content of in-kernel struct timehands. Usermode reading of the structure can be lockless. Compatibility export for 32bit processes on 64bit host is also provided. Kernel also provides usermode with indication about currently used timecounter, so that libc can fall back to syscall if configured timecounter is unknown to usermode code. The shared data updates are initiated both from the tc_windup(), where a fast task is queued to do the update, and from sysctl handlers which change timecounter. A manual override switch kern.timecounter.fast_gettime allows to turn off the mechanism. Only x86 architectures export the real algorithm data, and there, only for tsc timecounter. HPET counters page could be exported as well, but I prefer to not further glue the kernel and libc ABI there until proper vdso-based solution is developed. Minimal stubs neccessary for non-x86 architectures to still compile are provided. Discussed with: bde Reviewed by: jhb Tested by: flo MFC after: 1 month
* Reserve AT_TIMEKEEP auxv entry for providing usermode the pointer tokib2012-06-221-0/+1
| | | | | | timekeeping information. MFC after: 1 week
* Introduce CHANGE_PV_LIST_LOCK_TO_{PHYS,VM_PAGE}() to avoid duplication ofalc2012-06-221-24/+20
| | | | code.
* Update the PV stats in free_pv_entry() using atomics. After which, it isalc2012-06-211-38/+14
| | | | | | | | | no longer necessary for free_pv_entry() to be serialized by the pvh global lock. Retire pmap_insert_entry() and pmap_remove_entry(). Once upon a time, these functions were called from multiple places within the pmap. Now, each has only one caller.
* Add PV list locking to pmap_copy(), pmap_enter_object(), andalc2012-06-201-31/+61
| | | | | | | | pmap_enter_quick(). These functions are no longer serialized by the pvh global lock. There is no need to release the PV list lock before calling free_pv_chunk() in pmap_remove_pages().
* Condition the implementation of pv_entry_count on PV_STATS. On amd64,alc2012-06-191-16/+16
| | | | | | | pv_entry_count is purely informational. It does not serve any functional purpose. Add PV chunk locking to get_pv_entry().
* - Updated TOE support in the kernel.np2012-06-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Stateful TCP offload drivers for Terminator 3 and 4 (T3 and T4) ASICs. These are available as t3_tom and t4_tom modules that augment cxgb(4) and cxgbe(4) respectively. The cxgb/cxgbe drivers continue to work as usual with or without these extra features. - iWARP driver for Terminator 3 ASIC (kernel verbs). T4 iWARP in the works and will follow soon. Build-tested with make universe. 30s overview ============ What interfaces support TCP offload? Look for TOE4 and/or TOE6 in the capabilities of an interface: # ifconfig -m | grep TOE Enable/disable TCP offload on an interface (just like any other ifnet capability): # ifconfig cxgbe0 toe # ifconfig cxgbe0 -toe Which connections are offloaded? Look for toe4 and/or toe6 in the output of netstat and sockstat: # netstat -np tcp | grep toe # sockstat -46c | grep toe Reviewed by: bz, gnn Sponsored by: Chelsio communications. MFC after: ~3 months (after 9.1, and after ensuring MFC is feasible)
* Adjust the fix in r236953, by not generating the signal manually, butkib2012-06-181-11/+5
| | | | | | | | | performing the return to usermode using full return path. This consolidates the handling of exceptional situations in less number of places, and is less code as well. Reviewed by: jhb MFC after: 1 week
* Add PV chunk and list locking to pmap_page_exists_quick(),alc2012-06-181-15/+63
| | | | | pmap_page_is_mapped(), and pmap_remove_pages(). These functions are no longer serialized by the pvh global lock.
* The page flag PGA_WRITEABLE is set and cleared exclusively by the pmapalc2012-06-161-0/+1
| | | | | | | | | | | | | | | | layer, but it is read directly by the MI VM layer. This change introduces pmap_page_is_write_mapped() in order to completely encapsulate all direct access to PGA_WRITEABLE in the pmap layer. Aesthetics aside, I am making this change because amd64 will likely begin using an alternative method to track write mappings, and having pmap_page_is_write_mapped() in place allows me to make such a change without further modification to the MI VM layer. As an added bonus, tidy up some nearby comments concerning page flags. Reviewed by: kib MFC after: 6 weeks
* Oops - use the actual 11n enable option.adrian2012-06-151-1/+1
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* Ok, ok. 802.11n can be on by default in GENERIC in -HEAD.adrian2012-06-151-0/+2
| | | | God help me.
* Update a couple comments to reflect r235598.alc2012-06-141-2/+2
| | | | X-MFC after: r235598
* Correctly identify the function in a KASSERT().alc2012-06-141-2/+3
| | | | MFC after: 3 days
* - Remove unused code for CR3 and CR4.jkim2012-06-134-11/+4
| | | | - Fix few style(9) nits while I am here.
* - Fix resumectx() prototypes to reflect reality.jkim2012-06-132-3/+3
| | | | | - For i386, simply jump to resumectx() with PCB in %ecx. - Fix a style(9) nit while I am here.
* Fix a problem where zero-length RDATA fields can cause named(8) to crash.bz2012-06-121-0/+17
| | | | | | | | | | | | | | | | [12:03] Correct a privilege escalation when returning from kernel if running FreeBSD/amd64 on non-AMD processors. [12:04] Fix reference count errors in IPv6 code. [EN-12:02] Security: CVE-2012-1667 Security: FreeBSD-SA-12:03.bind Security: CVE-2012-0217 Security: FreeBSD-SA-12:04.sysret Security: FreeBSD-EN-12:02.ipv6refcount Approved by: so (simon, bz)
* Share IPI init and startup code of mp_machdep.c with acpi_wakeup.ciwasaki2012-06-122-44/+55
| | | | as ipi_startup().
* Avoid unnecessary atomic operations for clearing PGA_WRITEABLE inalc2012-06-111-2/+4
| | | | | | | pmap_remove_pages(). This reduces pmap_remove_pages()'s running time by 4 to 11% in my tests. MFC after: 1 week
* Some fixes for r236772.iwasaki2012-06-101-2/+2
| | | | | | | | - Remove cpuset stopped_cpus which is no longer used. - Add a short comment for cpuset suspended_cpus clearing. - Fix the un-ordered x86/acpica/acpi_wakeup.c in conf/files.amd64 and i386. Pointed-out by: attilio@
* Add x86/acpica/acpi_wakeup.c for amd64 and i386. Difference ofiwasaki2012-06-097-630/+196
| | | | | | | | | | | | | | | | | | | | | | suspend/resume procedures are minimized among them. common: - Add global cpuset suspended_cpus to indicate APs are suspended/resumed. - Remove acpi_waketag and acpi_wakemap from acpivar.h (no longer used). - Add some variables in acpi_wakecode.S in order to minimize the difference among amd64 and i386. - Disable load_cr3() because now CR3 is restored in resumectx(). amd64: - Add suspend/resume related members (such as MSR) in PCB. - Modify savectx() for above new PCB members. - Merge acpi_switch.S into cpu_switch.S as resumectx(). i386: - Merge(and remove) suspendctx() into savectx() in order to match with amd64 code. Reviewed by: attilio@, acpi@
* Various small changes to PV entry management:alc2012-06-041-10/+5
| | | | | | | | | | | | | | | | | | | Constify pc_freemask[]. pmap_pv_reclaim() Eliminate "freemask" because it was a pessimization. Add a comment about the resident count adjustment. free_pv_entry() [i386 only] Merge an optimization from amd64 (r233954). get_pv_entry() Eliminate the move to tail of the pv_chunk on the global pv_chunks list. (The right strategy needs more thought. Moreover, there were unintended differences between the amd64 and i386 implementation.) pmap_remove_pages() Eliminate unnecessary ()'s.
* free wdog_kern_pat calls in post-panic paths from under SW_WATCHDOGavg2012-06-031-4/+2
| | | | | | Those calls are useful with hardware watchdog drivers too. MFC after: 3 weeks
* Isolate the global pv list lock from data and other locks to prevent falsealc2012-06-021-1/+11
| | | | sharing within the cache.
* Use plain store for atomic_store_rel on x86, instead of implicitlykib2012-06-021-37/+37
| | | | | | | | | locked xchg instruction. IA32 memory model guarantees that store has release semantic, since stores cannot pass loads or stores. Reviewed by: bde, jhb Tested by: pho MFC after: 2 weeks
* Consistently use ACPI_SUCCESS() and ACPI_FAILURE() macros wherever possible.jkim2012-06-011-2/+1
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* Tidy up code clutter in SMP case a bit. No functional change.jkim2012-06-011-10/+6
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* Call AcpiSetFirmwareWakingVector() with interrupt disabled for consistency.jkim2012-06-011-2/+2
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* Improve style(9) in the previous commit.jkim2012-06-011-3/+3
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* Call AcpiLeaveSleepStatePrep() in interrupt disabled contextiwasaki2012-06-011-38/+47
| | | | | | | | | | | | | | | | | | (described in ACPICA source code). - Move intr_disable() and intr_restore() from acpi_wakeup.c to acpi.c and call AcpiLeaveSleepStatePrep() in interrupt disabled context. - Add acpi_wakeup_machdep() to execute wakeup MD procedures and call it twice in interrupt disabled/enabled context (ia64 version is just dummy). - Rename wakeup_cpus variable in acpi_sleep_machdep() to suspcpus in order to be shared by acpi_sleep_machdep() and acpi_wakeup_machdep(). - Move identity mapping related code to acpi_install_wakeup_handler() (i386 version) for preparation of x86/acpica/acpi_wakeup.c (MFC candidate). Reviewed by: jkim@ MFC after: 2 days
* Eliminate code duplication in free_pv_entry() and pmap_remove_pages() byalc2012-06-011-9/+10
| | | | introducing free_pv_chunk().
* Eliminate some purely stylistic differences among the amd64, i386 native,alc2012-05-301-2/+2
| | | | and i386 xen PV entry allocators.
* Regenerate system call tables.ed2012-05-255-10/+10
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* Remove use of non-ISO-C integer types from system call tables.ed2012-05-251-2/+2
| | | | | These files already use ISO-C-style integer types, so make them less inconsistent by preferring the standard types.
* Correct an error in pmap_pv_reclaim(). In a rare case, when it should havealc2012-05-251-9/+9
| | | | | returned NULL, it might instead return a pointer to a page that it had just unmapped.
* MFp4 bz_ipv6_fast:bz2012-05-241-0/+4
| | | | | | | | | | | | | | | | | | | | in_cksum.h required ip.h to be included for struct ip. To be able to use some general checksum functions like in_addword() in a non-IPv4 context, limit the (also exported to user space) IPv4 specific functions to the times, when the ip.h header is present and IPVERSION is defined (to 4). We should consider more general checksum (updating) functions to also allow easier incremental checksum updates in the L3/4 stack and firewalls, as well as ponder further requirements by certain NIC drivers needing slightly different pseudo values in offloading cases. Thinking in terms of a better "library". Sponsored by: The FreeBSD Foundation Sponsored by: iXsystems Reviewed by: gnn (as part of the whole) MFC After: 3 days
* Replace all uses of the vm page queues lock by a r/w lock that is privatealc2012-05-201-55/+62
| | | | | | | | | | | | to this pmap.c. This new r/w lock is used primarily to synchronize access to the PV lists. However, it will be used in a somewhat unconventional way. As finer-grained PV list locking is added to each of the pmap functions that acquire this r/w lock, its acquisition will be changed from write to read, enabling concurrent execution of the pmap functions with finer-grained locking. Reviewed by: kib X-MFC after: r235598
* Rename pmap_collect() to pmap_pv_reclaim() and rewrite it such that it noalc2012-05-182-64/+122
| | | | | | | | | | | | | | | longer uses the active and inactive paging queues. Instead, the pmap now maintains an LRU-ordered list of pv entry pages, and pmap_pv_reclaim() uses this list to select pv entries for reclamation. Note: The old pmap_collect() tried to avoid reclaiming mappings for pages that have either a hold_count or a busy field that is non-zero. However, this isn't necessary for correctness, and the locking in pmap_collect() was insufficient to guarantee that such mappings weren't reclaimed. The new pmap_pv_reclaim() doesn't even try. Reviewed by: kib MFC after: 6 weeks
* Centralize declaration of the debug.acpi sysctl node.jhb2012-05-171-2/+0
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* Use singular form for a modifier.kib2012-05-171-1/+1
| | | | | Submitted by: alc MFC after: 3 days
* Fix typo.kib2012-05-171-1/+1
| | | | MFC after: 3 days
* Add `options GEOM_RAID` into i386 and amd64 GENERIC kernels.mav2012-05-101-0/+1
| | | | | | ataraid(4) previously was present there and having GEOM RAID is convinient. Unlike other classes GEOM RAID can be set up from BIOS before install and users are expecting it to be detected automatically.
* The DDB_CTF has little or nothing to do with the debugger so move itbrooks2012-05-091-1/+1
| | | | next KDTRACE_HOOKS.
* - >500 static DTrace probes for the linuxulatornetchild2012-05-052-0/+10
| | | | | | | | | | | | | | | | | | - DTrace scripts to check for errors, performance, ... they serve mostly as examples of what you can do with the static probe;s with moderate load the scripts may be overwhelmed, excessive lock-tracing may influence program behavior (see the last design decission) Design decissions: - use "linuxulator" as the provider for the native bitsize; add the bitsize for the non-native emulation (e.g. "linuxuator32" on amd64) - Add probes only for locks which are acquired in one function and released in another function. Locks which are aquired and released in the same function should be easy to pair in the code, inter-function locking is more easy to verify in DTrace. - Probes for locks should be fired after locking and before releasing to prevent races (to provide data/function stability in DTrace, see the man-page of "dtrace -v ..." and the corresponding DTrace docs).
* Revert part of r234723 by re-enabling the SMP protection forattilio2012-05-031-0/+2
| | | | | | | | | | | | | | | | | intr_bind() on x86. This has been requested by jhb and I strongly disagree with this, but as long as he is the x86 and interrupt subsystem maintainer I will follow his directives. The disagreement cames from what we should really consider as a public KPI. IMHO, if we really need a selection between the kernel functions, we may need an explicit protection like _KERNEL_KPI, which defines which subset of the kernel function might really be considered as part of the KPI (for thirdy part modules) and which not. As long as we don't have this mechanism I just consider any possible function as usable by thirdy part code, thus intr_bind() included. MFC after: 1 week
* Add a convenience macro for the returns_twice attribute, and apply it todim2012-04-291-1/+1
| | | | | | | the prototypes of the appropriate functions (getcontext, savectx, setjmp, sigsetjmp and vfork). MFC after: 2 weeks
* Increase DFLDSIZ from 128 MiB to 32 GiB. On amd64 there's plenty of virtualrmh2012-04-271-1/+1
| | | | | | memory available, so there is no need to be so conservative about it. Reviewed by: arch
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