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* Fix !SMP build after r234074.marius2012-04-101-0/+2
| | | | Reviewed by: attilio, jhb
* BSP is not added to the mask of valid target CPUs for interruptsattilio2012-04-092-4/+5
| | | | | | | | | | | | | | | in set_apic_interrupt_ids(). Besides, set_apic_interrupts_ids() is not called in the !SMP case too. Fix this by: - Adding the BSP as an interrupt target directly in cpu_startup(). - Remove an obsolete optimization where the BSP are skipped in set_apic_interrupt_ids(). Reported by: jh Reviewed by: jhb MFC after: 3 days X-MFC: r233961 Pointy hat to: me
* Recognize the RDRAND instruction feature.jhb2012-04-091-1/+1
| | | | | Submitted by: Michael Fuckner michael fuckner net MFC after: 3 days
* Micro-optimize free_pv_entry() for the expected case.alc2012-04-061-4/+6
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* Add descriptions after the 'device' line for several NICs to match thejhb2012-04-041-8/+8
| | | | existing style.
* Make machine check exception logging more readable. On newer Intel systems,jhb2012-04-021-2/+1
| | | | | | | | | | | | an uncorrected ECC error tends to fire on all CPUs in a package simultaneously and the current printf hacks are not sufficient to make the messages legible. Instead, use the existing mca_lock spinlock to serialize calls to mca_log() and change the machine check code to panic directly when an unrecoverable error is encoutered rather than falling back to a trap_fatal() call in trap() (which adds nearly a screen-full of logging messages that aren't useful for machine checks). MFC after: 2 weeks
* Move the legacy(4) driver to x86.jhb2012-03-302-411/+0
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* Re-initialize model-specific MSRs when we resume CPUs.jkim2012-03-302-0/+2
| | | | MFC after: 1 week
* Work around Erratum 721 for AMD Family 10h and 12h processors.jkim2012-03-301-1/+28
| | | | | | | | | | "Under a highly specific and detailed set of internal timing conditions, the processor may incorrectly update the stack pointer after a long series of push and/or near-call instructions, or a long series of pop and/or near-return instructions. The processor must be in 64-bit mode for this erratum to occur." MFC after: 3 days
* Use a more proper fix for enabling HT MSI mapping windows on Host-PCIjhb2012-03-292-2/+24
| | | | | | | | | | | | | | | | | | | | bridges. Rather than blindly enabling the windows on all of them, only enable the window when an MSI interrupt is enabled for a device behind the bridge, similar to what already happens for HT PCI-PCI bridges. To implement this, each x86 Host-PCI bridge driver has to be able to locate it's actual backing device on bus 0. For ACPI, use the _ADR method to find the slot and function of the device. For the non-ACPI case, the legacy(4) driver already scans bus 0 looking for Host-PCI bridge devices. Now it saves the slot and function of each bridge that it finds as ivars that the Host-PCI bridge driver can then use in its pcib_map_msi() method. This fixes machines where non-MSI interrupts were broken by the previous round of HT MSI changes. Tested by: bapt MFC after: 1 week
* - Rename VM_MEMATTR_UNCACHED to VM_MEMATTR_WEAK_UNCACHEABLE on x86 tojhb2012-03-291-1/+1
| | | | | | | | | be less ambiguous and more clearly identify what it means. This attribute is what Intel refers to as UC-, and it's only difference relative to normal UC memory is that a WC MTRR will override a UC- PAT entry causing the memory to be treated as WC, whereas a UC PAT entry will always override the MTRR. - Remove the VM_MEMATTR_UNCACHED alias from powerpc.
* Add software PMC support.fabient2012-03-282-8/+32
| | | | | | | | | | | | | New kernel events can be added at various location for sampling or counting. This will for example allow easy system profiling whatever the processor is with known tools like pmcstat(8). Simultaneous usage of software PMC and hardware PMC is possible, for example looking at the lock acquire failure, page fault while sampling on instructions. Sponsored by: NETASQ MFC after: 1 month
* Disable detailed PV entry accounting by default. Add a config optionalc2012-03-242-1/+4
| | | | | | to enable it. MFC after: 1 week
* Add cas(4), gem(4) and hme(4) to x86 GENERICs as suggested by netchild@ inmarius2012-03-241-0/+3
| | | | | | | | <20120222095239.Horde.0hpYHJjmRSRPRKzXsoFRbYk@webmail.leidinger.net>. According to some private emails received, it apparently is not unpopular to use at least Quad GigaSwift cards driven by cas(4) in x86 machines. MFC after: 1 week
* Add snd_cmi, snd_csa and snd_emu10kx to GENERIC on i386 and amd64.joel2012-03-221-0/+3
| | | | | | | | | | The GPL infected parts which were blocking the inclusion of snd_csa and snd_emu10kx in GENERIC have recently been removed from the tree. I'm also adding snd_cmi to GENERIC, which I originally intended to add when we enabled sound support by default. Discussed with: jhb, pfg, Yuriy Tsibizov <yuriy.tsibizov@gfk.ru> Approved by: jhb
* Handle spurious page faults that may occur in no-fault sections of thealc2012-03-222-20/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | kernel. When access restrictions are added to a page table entry, we flush the corresponding virtual address mapping from the TLB. In contrast, when access restrictions are removed from a page table entry, we do not flush the virtual address mapping from the TLB. This is exactly as recommended in AMD's documentation. In effect, when access restrictions are removed from a page table entry, AMD's MMUs will transparently refresh a stale TLB entry. In short, this saves us from having to perform potentially costly TLB flushes. In contrast, Intel's MMUs are allowed to generate a spurious page fault based upon the stale TLB entry. Usually, such spurious page faults are handled by vm_fault() without incident. However, when we are executing no-fault sections of the kernel, we are not allowed to execute vm_fault(). This change introduces special-case handling for spurious page faults that occur in no-fault sections of the kernel. In collaboration with: kib Tested by: gibbs (an earlier version) I would also like to acknowledge Hiroki Sato's assistance in diagnosing this problem. MFC after: 1 week
* Change pv_entry_count to a long. During the lifetime of FreeBSD 10.x,alc2012-03-221-2/+2
| | | | | | | physical memory sizes at the high-end will likely reach a point that the number of pv entries could overflow an int. Submitted by: kib
* Remove pty(4) from our kernel configurations.ed2012-03-211-1/+0
| | | | | | | | | | | As of FreeBSD 8, this driver should not be used. Applications that use posix_openpt(2) and openpty(3) use the pts(4) that is built into the kernel unconditionally. If it turns out high profile depend on the pty(4) module anyway, I'd rather get those fixed. So please report any issues to me. The pty(4) module is still available as a kernel module of course, so a simple `kldload pty' can be used to run old-style pseudo-terminals.
* Eliminate vm.pmap.shpgperproc and vm.pmap.pv_entry_max because they noalc2012-03-212-76/+10
| | | | | | | | | | | | | longer serve any purpose. Prior to r157446, they served a purpose because there was a fixed amount of kernel virtual address space reserved for pv entries at boot time. However, since that change pv entries are accessed through the direct map, and so there is no limit imposed by a fixed amount of kernel virtual address space. Fix a couple of nearby style issues. Reviewed by: jhb, kib MFC after: 1 week
* Merge ACPICA 20120320.jkim2012-03-201-1/+1
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* Fix another witness panic. We cannot enter critical section at all becausejkim2012-03-201-2/+3
| | | | | | | | AcpiEnterSleepState() executes (optional) _GTS method since ACPICA 20120215 (r231844). To evaluate the method, we need malloc(9), which may sleep. Reported by: bschmidt MFC after: 3 days
* Copy amd64 sysarch.h to x86 and merge with i386 sysarch.h. Replacetijl2012-03-191-100/+3
| | | | amd64/i386/pc98 sysarch.h with stubs.
* Fix a witness panic introduced in r231797.jkim2012-03-191-2/+2
| | | | | | | Reported by: bschmidt Reviewed by: jhb Pointy hat to: jkim MFC after: 3 days
* Copy i386 specialreg.h to x86 and merge with amd64 specialreg.h. Replacetijl2012-03-191-594/+3
| | | | amd64/i386/pc98 specialreg.h with stubs.
* Copy i386 psl.h to x86 and replace amd64/i386/pc98 psl.h with stubs.tijl2012-03-191-81/+3
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* Move userland bits (and some common kernel bits) from amd64 and i386tijl2012-03-191-150/+1
| | | | | | | segments.h to a new x86 segments.h. Add __packed attribute to some structs (just to be sure). Also make it clear that i386 GDT and LDT entries are used in ia64 code.
* Re-apply r233122 erronously reverted in r233168.kib2012-03-191-5/+4
| | | | | | Submitted by: jhb Pointy hat to: kib MFC after: 2 weeks
* If we ever allow for managed fictitious pages, the pages shall bekib2012-03-191-17/+43
| | | | | | | | | | | | excluded from superpage promotions. At least one of the reason is that pv_table is sized for non-fictitious pages only. Consistently check for the page to be non-fictitious before accesing superpage pv list. Sponsored by: The FreeBSD Foundation Reviewed by: alc MFC after: 2 weeks
* Eliminate ia32_reg.h by moving its contents to x86 and ia64 reg.h.tijl2012-03-181-1/+0
| | | | Reviewed by: kib
* Copy i386 reg.h to x86 and merge with amd64 reg.h. Replace i386/amd64/pc98tijl2012-03-181-138/+3
| | | | | | | | | | | | | | | | | reg.h with stubs. The tREGISTER macros are only made visible on i386. These macros are deprecated and should not be available on amd64. The i386 and amd64 versions of struct reg have been renamed to struct __reg32 and struct __reg64. During compilation either __reg32 or __reg64 is defined as reg depending on the machine architecture. On amd64 the i386 struct is also available as struct reg32 which is used in COMPAT_FREEBSD32 code. Most of compat/ia32/ia32_reg.h is now IA64 only. Reviewed by: kib (previous version)
* Use exact width integer types in amd64/i386 reg.h to prepare for a merge.tijl2012-03-181-31/+31
| | | | The only real change is replacing long with int on i386.
* Style fix to pmap_protect().alc2012-03-181-5/+4
| | | | Submitted by: bde
* With the changes over the past year to how accesses to the page's dirtyalc2012-03-171-5/+24
| | | | | | | field are synchronized, there is no need for pmap_protect() to acquire the page queues lock unless it is going to access the pv lists. Reviewed by: kib
* Move userland bits of i386 npx.h and amd64 fpu.h to x86 fpu.h.tijl2012-03-162-84/+7
| | | | | | | | | | | | | | Remove FPU types from compat/ia32/ia32_reg.h that are no longer needed. Create machine/npx.h on amd64 to allow compiling i386 code that uses this header. The original npx.h and fpu.h define struct envxmm differently. Both definitions have been included in the new x86 header as struct __envxmm32 and struct __envxmm64. During compilation either __envxmm32 or __envxmm64 is defined as envxmm depending on machine architecture. On amd64 the i386 struct is also available as struct envxmm32. Reviewed by: kib
* Simplify the error checking in one branch of trap_pfault() and updatealc2012-03-121-10/+5
| | | | | | | | the nearby comment. Add missing whitespace to a return statement in trap_pfault(). Submitted by: kib [2]
* regennetchild2012-03-105-7/+583
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* - add comments to syscalls.master and linux(32)_dummy about which linuxnetchild2012-03-102-1/+102
| | | | | | | | | | kernel version introduced the sysctl (based upon a linux man-page) - add comments to sscalls.master regarding some names of sysctls which are different than the linux-names (based upon the linux unistd.h) - add some dummy sysctls - name an unimplemented sysctl MFC after: 1 month
* Move i386's intr_machdep.c to the x86 tree and share it with amd64.jhb2012-03-091-560/+0
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* Disable the option VFS_ALLOW_NONMPSAFE by default on all the supportedattilio2012-03-061-3/+0
| | | | | | | | | | | | platforms. This will make every attempt to mount a non-mpsafe filesystem to the kernel forbidden, unless it is expressely compiled with VFS_ALLOW_NONMPSAFE option. This patch is part of the effort of killing non-MPSAFE filesystems from the tree. No MFC is expected for this patch.
* Provide wbwd(4), a driver for the watchdog timer found on variousbz2012-03-062-0/+3
| | | | | | | | | | | | | Winbond Super I/O chips. With minor efforts it should be possible the extend the driver to support further chips/revisions available from Winbond. In the simplest case only new IDs need to be added, while different chipsets might require their own function to enter extended function mode, etc. Sponsored by: Sandvine Incorporated ULC (in 2011) Reviewed by: emaste, brueffer MFC after: 2 weeks
* Fix few style nits.jkim2012-03-051-1/+1
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* Exclude USB drivers (except umass and ukbd) from main kernel image on i386rmh2012-03-041-32/+0
| | | | | | | and amd64. Reviewed by: hselasky, arch, usb Approved by: kib (mentor)
* Copy amd64 ptrace.h to x86 and merge with i386 ptrace.h. Replacetijl2012-03-042-38/+9
| | | | | | | | | | amd64/i386/pc98 ptrace.h with stubs. For amd64 PT_GETXSTATE and PT_SETXSTATE have been redefined to match the i386 values. The old values are still supported but should no longer be used. Reviewed by: kib
* Copy amd64 trap.h to x86 and replace amd64/i386/pc98 trap.h with stubs.tijl2012-03-041-92/+3
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* Copy amd64 float.h to x86 and merge with i386 float.h. Replacetijl2012-03-041-91/+3
| | | | amd64/i386/pc98 float.h with stubs.
* Add VESA option to GENERIC for amd64 and i386.jkim2012-03-031-0/+1
| | | | MFC after: 1 month
* Copy amd64 stdarg.h to x86 and replace amd64/i386/pc98 stdarg.h with stubs.tijl2012-02-281-72/+3
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* Copy amd64 setjmp.h to x86 and replace amd64/i386/pc98 setjmp.h with stubs.tijl2012-02-281-47/+3
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* Copy amd64 endian.h to x86 and merge with i386 endian.h. Replacetijl2012-02-281-142/+3
| | | | | | | | | | amd64/i386/pc98 endian.h with stubs. In __bswap64_const(x) the conflict between 0xffUL and 0xffULL has been resolved by reimplementing the macro in terms of __bswap32(x). As a side effect __bswap64_var(x) is now implemented using two bswap instructions on i386 and should be much faster. __bswap32_const(x) has been reimplemented in terms of __bswap16(x) for consistency.
* Copy amd64 _stdint.h to x86 and merge with i386 _stdint.h. Replacetijl2012-02-281-168/+3
| | | | amd64/i386/pc98 _stdint.h with stubs.
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