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* Match PCI Express root bridge _HID directly instead ofjkim2009-07-131-0/+1
* Add support to the virtual memory system for configuring machine-alc2009-07-123-16/+48
* Implementation of the upcoming Wireless Mesh standard, 802.11s, on therpaulo2009-07-111-0/+1
* When amd64 CPU cannot load segment descriptor during trap return tokib2009-07-101-12/+12
* Restore the segment registers and segment base MSRs for amd64 syscallkib2009-07-0911-15/+60
* When pmap_change_attr() changes the PAT setting on a kernel mapping, it hasalc2009-07-061-3/+11
* After the per-CPU IDT changes, the IDT vector of an interrupt could changejhb2009-07-062-6/+22
* MFi386: Add a 'show idt' command to DDB to display the non-default functionjhb2009-07-061-1/+26
* Cleanup ALIGNED_POINTER:sam2009-07-051-10/+7
* Enable POSIX semaphores on all non-embedded architectures by default.ed2009-07-021-0/+1
* Improve the handling of cpuset with interrupts.jhb2009-07-016-45/+102
* Don't include rpcv2.h - it has been removed.dfr2009-07-011-1/+0
* remove unused/unneeded extern declarationsavg2009-06-301-3/+0
* Catch missed AUDIT_ARG() -> AUDIT_ARG_CMD() on amd64.rwatson2009-06-271-1/+1
* Replace AUDIT_ARG() with variable argument macros with a set more morerwatson2009-06-271-1/+1
* Correct the #endif comment.alc2009-06-261-1/+1
* This change is the next step in implementing the cache control functionalityalc2009-06-261-0/+45
* Fix kernels compiled without SMP support. Make intr_next_cpu() availablejhb2009-06-252-2/+10
* - Restore the behavior of pre-allocating IDT vectors for MSI interrupts.jhb2009-06-254-55/+77
* Whitespace fix.jhb2009-06-241-0/+1
* Make algorithm a bit more bulletproof.mav2009-06-231-2/+2
* Implement a facility for dynamic per-cpu variables.jeff2009-06-232-1/+6
* Fix variable name.mav2009-06-231-1/+1
* Rework r193814:mav2009-06-231-34/+31
* Eliminate dead code. These definitions should have been deleted with thealc2009-06-221-10/+0
* I have several machines where the following warning is printed:ps2009-06-151-0/+3
* Forbid multi-vector MSI interrupt vectors migration to another CPU oncemav2009-06-151-0/+2
* Long, long ago in r27464 special case code for mapping device-backedalc2009-06-141-49/+45
* Enable PRINTF_BUFR_SIZE on i386 and amd64 by default.ed2009-06-141-0/+1
* Add alc(4), a driver for Atheros AR8131/AR8132 PCIe ethernetyongari2009-06-101-0/+1
* opt in to flowtable on i386/amd64kmacy2009-06-091-0/+1
* remove flowtable from DEFAULTSkmacy2009-06-091-1/+0
* Unbreak the build for amd64 after r193814 using correct variable names.bz2009-06-091-2/+2
* When using i8254 as the only kernel timer source:ariff2009-06-091-7/+31
* Move C1E workaround into its own idle function. Previous workaround worksariff2009-06-092-23/+73
* Rewrite OsdSynch.c to reflect the latest ACPICA more closely:jkim2009-06-081-3/+0
* Revert my change; reintroduce __gnu89_inline.ed2009-06-081-1/+1
* Remove __gnu89_inline.ed2009-06-081-1/+1
* Now that amd64's kernel map is 512GB (SVN rev 192216), there is no reasonalc2009-06-081-9/+0
* Put intrcnt, eintrcnt, intrnames and eintrnames into the .data section.kib2009-06-051-0/+1
* Import ACPICA 20090521.jkim2009-06-054-7/+11
* Remove MAC kernel config files and add "options MAC" to GENERIC, with therwatson2009-06-022-28/+1
* Implement accept4 syscall.dchagin2009-06-011-0/+1
* Regenerate generated syscall files following changes to struct sysent inrwatson2009-06-011-317/+317
* Place hostnames and similar information fully under the prison system.jamie2009-05-292-2/+0
* Don't bother reading the initial value of the machine check banks duringjhb2009-05-201-4/+0
* - Add a tunable 'hw.mca.enabled' that can be used to enable/disable thejhb2009-05-181-11/+14
* Add a read-only sysctl hw.pci.mcfg to mirror the tunable by the same name.jhb2009-05-181-0/+5
* Bump CACHE_LINE_SIZE to 128 for x86. Intel's manuals explicitly recommendjhb2009-05-181-1/+1
* Add cpu_flush_dcache() for use after non-DMA based I/O so that amarcel2009-05-181-0/+10
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