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* Revert r243960 based on feedback regarding keeping x86 headers unifiedjimharris2012-12-131-149/+2
| | | | | | (mdf@, tijl@) and use of KASSERT/systm.h in bus.h (zeising@, bde@). Alternate implementation will be made in a separate commit.
* Implement an API to allow a hypervisor to save/restoregrehan2012-12-122-1/+36
| | | | | | | | | | | | | guest floating point state without having to know the size of floating-point state. Unstaticize fpurestore to allow the hypervisor to save/restore guest state using fpusave/fpurestore on the allocated FPU state area. Reviewed by: kib Obtained from: NetApp/bhyve MFC after: 1 week
* Add amd64-specific ddb command "show pte". The command displays thekib2012-12-101-0/+43
| | | | | | | | hierarchy of the page table entries which map the specified address. Reviewed by: alc (previous version) Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Add amd64 implementations for 8-byte bus_space routines.jimharris2012-12-061-2/+149
| | | | | | | Submitted by: Carl Delsey <carl.r.delsey@intel.com> Discussed with: jhb, rwatson Reviewed by: jimharris MFC after: 1 week
* Print the frame addresses for the backtraces on i386 and amd64. Itkib2012-12-031-6/+11
| | | | | | | | allows both to inspect the frame sizes and to manually peek into the frames from ddb, if needed. Reviewed by: dim MFC after: 2 weeks
* Remove duplicate code. Reduce diff between amd64 and i386.jkim2012-12-011-6/+7
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* Use volatile keywords properly.jkim2012-11-301-11/+11
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* Tidy up inline assembly. No functional change.jkim2012-11-301-8/+8
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* Move the declaration of vm_phys_paddr_to_vm_page() from vm/vm_page.hkib2012-11-161-0/+1
| | | | | | | to vm/vm_phys.h, where it belongs. Requested and reviewed by: alc MFC after: 2 weeks
* Flip the semantic of M_NOWAIT to only require the allocation to notkib2012-11-141-6/+2
| | | | | | | | | | | | | | | | | | | | sleep, and perform the page allocations with VM_ALLOC_SYSTEM class. Previously, the allocation was also allowed to completely drain the reserve of the free pages, being translated to VM_ALLOC_INTERRUPT request class for vm_page_alloc() and similar functions. Allow the caller of malloc* to request the 'deep drain' semantic by providing M_USE_RESERVE flag, now translated to VM_ALLOC_INTERRUPT class. Previously, it resulted in less aggressive VM_ALLOC_SYSTEM allocation class. Centralize the translation of the M_* malloc(9) flags in the single inline function malloc2vm_flags(). Discussion started by: "Sears, Steven" <Steven.Sears@netapp.com> Reviewed by: alc, mdf (previous version) Tested by: pho (previous version) MFC after: 2 weeks
* Do not try to enable new features in the %cr4 if running underkib2012-11-091-1/+15
| | | | | | | | | | | | hypervisor. Apparently, hypervisors failed to filter out 'Standard Extended Features' report from CPUID, but deliver #gp when corresponding bit in %cr4 is toggled. This shall be reconsidered later, after hypervisors correct the bug. Reported and tested by: joel Reviewed by: avg MFC after: 2 weeks
* Rework the known rwlock to benefit about staying on their ownattilio2012-11-031-10/+1
| | | | | | | cache line in order to avoid manual frobbing but using struct rwlock_padalign. Reviewed by: alc, jimharris
* Enable the new instructions for reading and writing bases for %fs,kib2012-11-012-1/+18
| | | | | | | | | | | | | | | | %gs, when supported. Note that WRFSBASE and WRGSBASE are not very useful on FreeBSD right now, because a return from the kernel mode to userspace reloads the bases specified by the sysarch(2) syscall, most likely. Enable the Supervisor Mode Execution Prevention (SMEP) when supported. Since the loader(8) performs hand-off to the kernel with the page tables which contradict the SMEP, postpone enabling the SMEP on BSP until pmap switched for the proper kernel tables. Debugged with the help from: avg Tested by: avg, Michael Moll <kvedulv@kvedulv.de> MFC after: 1 month
* Provide the reading and display of the Standard Extended Features,kib2012-11-013-0/+19
| | | | | | | | introduced with the IvyBridge CPUs. Provide the definitions for new bits in CR3 and CR4 registers. Tested by: avg, Michael Moll <kvedulv@kvedulv.de> MFC after: 2 weeks
* The 'testing memory' patch gets printed too many timeseadler2012-10-221-2/+0
| | | | Approved by: cperciva (implicit)
* Explain the upcoming delay by printing a message when the kerneleadler2012-10-221-0/+2
| | | | | | | | is about to begin testing memory. Reviewed by: dteske, adri Approved by: cperciva MFC after: 1 week
* Print the %rip value for uprintf_signal.kib2012-10-141-1/+3
| | | | MFC after: 1 week
* pciereg_cfg*: use assembly to access the mem-mapped cfg spaceavg2012-10-141-6/+19
| | | | | | | | | AMD BKDG for CPU families 10h and later requires that the memory mapped config is always read into or written from al/ax/eax register. Discussed with: kib, alc Reviewed by: kib (earlier version) MFC after: 25 days
* Revert previous commit...kevlo2012-10-101-1/+1
| | | | Pointyhat to: kevlo (myself)
* Add an unified macro to deny ability from the compiler to reorderattilio2012-10-091-2/+2
| | | | | | | | | | instruction loads/stores at its will. The macro __compiler_membar() is currently supported for both gcc and clang, but kernel compilation will fail otherwise. Reviewed by: bde, kib Discussed with: dim, theraven MFC after: 2 weeks
* Reverts r234074,234105,234564,234723,234989,235231-235232 and part ofattilio2012-10-093-5/+6
| | | | | | | | r234247. Use, instead, the static intializer introduced in r239923 for x86 and sparc64 intr_cpus, unwinding the code to the initial version. Reviewed by: marius
* Prefer NULL over 0 for pointerskevlo2012-10-091-1/+1
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* - Re-shuffle the <machine/pc/bios.h> headers to move all kernel-specificjhb2012-09-281-10/+42
| | | | | | | | | | | bits under #ifdef _KERNEL but leave definitions for various structures defined by standards ($PIR table, SMAP entries, etc.) available to userland. - Consolidate duplicate SMBIOS table structure definitions in ipmi(4) and smbios(4) in <machine/pc/bios.h> and make them available to userland. MFC after: 2 weeks
* Eliminate a stale comment. It describes another use case for the pmap inalc2012-09-281-7/+0
| | | | Mach that doesn't exist in FreeBSD.
* After r205013, amd64 and i386 CPU family and model IDs were printed outdim2012-09-211-2/+2
| | | | | | in hexadecimal, but without any 0x prefix, which can be very misleading. MFC after: 3 days
* Integrate nvme(4) and nvd(4) into the amd64 and i386 builds.jimharris2012-09-171-0/+5
| | | | Sponsored by: Intel
* Rename the IVY_RNG option to RDRAND_RNG.kib2012-09-131-1/+1
| | | | | Based on submission by: Arthur Mesh <arthurmesh@gmail.com> MFC after: 2 weeks
* Simplify pmap_unmapdev(). Since kmem_free() eventually calls pmap_remove(),alc2012-09-101-4/+1
| | | | | | | | | | | | | pmap_unmapdev()'s own direct efforts to destroy the page table entries are redundant, so eliminate them. Don't set PTE_W on the page table entry in pmap_kenter{,_attr}() on MIPS. Setting PTE_W on MIPS is inconsistent with the implementation of this function on other architectures. Moreover, PTE_W should not be set, unless the pmap's wired mapping count is incremented, which pmap_kenter{,_attr}() doesn't do. MFC after: 10 days
* userret() already checks for td_locks when INVARIANTS is enabled, soattilio2012-09-081-1/+0
| | | | | | | there is no need to check if Giant is acquired after it. Reviewed by: kib MFC after: 1 week
* Add support for new Intel on-CPU Bull Mountain random numberkib2012-09-051-0/+2
| | | | | | | | | | | | | | | | | | | generator, found on IvyBridge and supposedly later CPUs, accessible with RDRAND instruction. From the Intel whitepapers and articles about Bull Mountain, it seems that we do not need to perform post-processing of RDRAND results, like AES-encryption of the data with random IV and keys, which was done for Padlock. Intel claims that sanitization is performed in hardware. Make both Padlock and Bull Mountain random generators support code covered by kernel config options, for the benefit of people who prefer minimal kernels. Also add the tunables to disable hardware generator even if detected. Reviewed by: markm, secteam (simon) Tested by: bapt, Michael Moll <kvedulv@kvedulv.de> MFC after: 3 weeks
* Rename {_,}pmap_unwire_pte_hold() to {_,}pmap_unwire_ptp() and update thealc2012-09-051-22/+22
| | | | | | | | | | comment describing them. Both the function names and the comment had grown stale. Quite some time has passed since these pmap implementations last used the page's hold count to track the number of valid mapping within a page table page. Also, returning TRUE from pmap_unwire_ptp() rather than _pmap_unwire_ptp() eliminates a few instructions from callers like pmap_enter_quick_locked() where pmap_unwire_ptp()'s return value is used directly by a conditional statement.
* Add hpt27xx to GENERIC kernel for amd64 and i386 systems.delphij2012-09-041-0/+1
| | | | MFC after: 2 weeks
* Fix duplicate entries for mwl(4):jhb2012-09-041-6/+1
| | | | | | | - Move mwlfw from {amd64,i386}/conf/NOTES to sys/conf/NOTES (mwl(4) is already present in sys/conf/NOTES). - Remove duplicate mwl(4) entries from {amd64,i386}/conf/NOTES. - While here, add a description to the sfxge line in amd64/conf/NOTES.
* Fix misspelled "Infiniband".jhb2012-08-281-1/+1
| | | | | Submitted by: gcooper MFC after: 3 days
* Grammar fix: s/NIC's/NICs/gjb2012-08-261-1/+1
| | | | MFC after: 3 days
* As discussed on -current, remove the hardcoded default maxswzone.des2012-08-141-8/+0
| | | | MFC after: 3 weeks
* Add a hackish debugging facility to provide a bit of information aboutkib2012-08-141-2/+20
| | | | | | | | | | | | | | reason for generated trap. The dump of basic signal information and 8 bytes of the faulting instruction are printed on the controlling terminal of the process, if the machdep.uprintf_signal syscal is enabled. The print is the only practical way to debug traps from a.out processes I am aware of. Because I have to reimplement it each time I debug an issue with a.out support on amd64, commit the hack to main tree. MFC after: 1 week
* Real hardware, as opposed to QEMU, does not allow to have a call gatekib2012-08-142-6/+27
| | | | | | | | | | | | in long mode which transfers control to 32bit code segment. Unbreak the lcall $7,$0 implementation on amd64 by putting the 64bit user code segment' selector into call gate, and execute the 64bit trampoline which converts the return frame into 32bit format and switches back to 32bit mode for executing int $0x80 trampoline. Note that all jumps over the hoops are performed in the user mode. MFC after: 1 week
* Remove the deassert INIT IPI from the IPI startup sequence for APs.jhb2012-08-131-16/+1
| | | | | | | | | It is not listed in the boot sequence in the MP specification (1.4), and it is explicitly ignored on modern CPUs. It was only ever required when bootstrapping systems with external APICs (that is, SMP machines with 486s), which FreeBSD has never supported (and never will). While here, tidy some comments and remove some banal ones.
* Add a 10 millisecond delay after sending the initial INIT IPI. Thisjhb2012-08-131-1/+2
| | | | | | matches the algorithm in the MP specification (1.4). Previously we were sending out the deassert INIT IPI immediately after the initial INIT IPI was sent.
* Build modules along with the XENHVM kernels.cperciva2012-08-131-2/+0
| | | | | No objections from: freebsd-xen mailing list MFC after: 1 week
* The assertion that I added in r238889 could legitimately fail when aalc2012-08-081-1/+2
| | | | | | | debugger creates a breakpoint. Replace that assertion with a narrower one that still achieves my objective. Reported and tested by: kib
* Do not apply errata 721 workaround when under hypervisor, sincekib2012-08-071-1/+7
| | | | | | | | | typical hypervisor does not implement access to the required MSR, causing #GP on boot. Reported and tested by: olgeni PR: amd64/170388 MFC after: 3 days
* Remove duplicate header inclusion of <sys/sysent.h>pluknet2012-08-071-1/+0
| | | | Discussed with: bz
* Shave off a few more cycles from the average execution time of pmap_enter()alc2012-08-051-7/+2
| | | | by simplifying the control flow and reducing the live range of "om".
* Add lfence().kib2012-08-011-0/+7
| | | | MFC after: 1 week
* Revise pmap_enter()'s handling of mapping updates that change thealc2012-08-011-22/+30
| | | | | | | | | | | | | | PTE's PG_M and PG_RW bits but not the physical page frame. First, only perform vm_page_dirty() on a managed vm_page when the PG_M bit is being cleared. If the updated PTE continues to have PG_M set, then there is no requirement to perform vm_page_dirty(). Second, flush the mapping from the TLB when PG_M alone is cleared, not just when PG_M and PG_RW are cleared. Otherwise, a stale TLB entry may stop PG_M from being set again on the next store to the virtual page. However, since the vm_page's dirty field already shows the physical page as being dirty, no actual harm comes from the PG_M bit not being set. Nonetheless, it is potentially confusing to someone expecting to see the PTE change after a store to the virtual page.
* Change (unused) prototype for stmxcsr() to match reality.kib2012-07-301-1/+1
| | | | | Noted by: jhb MFC after: 1 week
* Shave off a few more cycles from pmap_enter()'s critical section. Inalc2012-07-291-14/+17
| | | | particular, do a little less work with the PV list lock held.
* Forcibly shut up clang warning about NULL pointer dereference.kib2012-07-231-0/+7
| | | | MFC after: 3 weeks
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