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* Correct a critical accounting error in pmap_demote_pde(). Specifically,kib2009-08-171-0/+2
| | | | | | | | | | | | | | | | | | when pmap_demote_pde() allocates a page table page to implement a user-space demotion, it must increment the pmap's resident page count. Not doing so, can lead to an underflow during address space termination that causes pmap_remove() to exit prematurely, before it has destroyed all of the mappings within the specified range. The ultimate effect or symptom of this error is an assertion failure in vm_page_free_toq() because the page being freed is still mapped. This error is only possible when superpage promotion is enabled. Thus, it only affects FreeBSD versions greater than 7.2. Tested by: pho, alc Reviewed by: alc Approved by: re (rwatson) MFC after: 1 week
* Adjust the handling of the local APIC PMC interrupt vector:jhb2009-08-143-4/+86
| | | | | | | | | | | | | | | | - Provide lapic_disable_pmc(), lapic_enable_pmc(), and lapic_reenable_pmc() routines in the local APIC code that the hwpmc(4) driver can use to manage the local APIC PMC interrupt vector. - Do not enable the local APIC PMC interrupt vector by default when HWPMC_HOOKS is enabled. Instead, the hwpmc(4) driver explicitly enables the interrupt when it is succesfully initialized and disables the interrupt when it is unloaded. This avoids enabling the interrupt on unsupported CPUs which may result in spurious NMIs. Reported by: rnoland Reviewed by: jkoshy Approved by: re (kib) MFC after: 2 weeks
* * Completely Remove the option STOP_NMI from the kernel. This optionattilio2009-08-138-89/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | has proven to have a good effect when entering KDB by using a NMI, but it completely violates all the good rules about interrupts disabled while holding a spinlock in other occasions. This can be the cause of deadlocks on events where a normal IPI_STOP is expected. * Adds an new IPI called IPI_STOP_HARD on all the supported architectures. This IPI is responsible for sending a stop message among CPUs using a privileged channel when disponible. In other cases it just does match a normal IPI_STOP. Right now the IPI_STOP_HARD functionality uses a NMI on ia32 and amd64 architectures, while on the other has a normal IPI_STOP effect. It is responsibility of maintainers to eventually implement an hard stop when necessary and possible. * Use the new IPI facility in order to implement a new userend SMP kernel function called stop_cpus_hard(). That is specular to stop_cpu() but it does use the privileged channel for the stopping facility. * Let KDB use the newly introduced function stop_cpus_hard() and leave stop_cpus() for all the other cases * Disable interrupts on CPU0 when starting the process of APs suspension. * Style cleanup and comments adding This patch should fix the reboot/shutdown deadlocks many users are constantly reporting on mailing lists. Please don't forget to update your config file with the STOP_NMI option removal Reviewed by: jhb Tested by: pho, bz, rink Approved by: re (kib)
* Make the MacBook3,1 boot again.ed2009-08-021-0/+1
| | | | Approved by: re (kib)
* Refine the MacBook hack to only match early models that have Intel ICH.rpaulo2009-07-271-1/+4
| | | | | Discussed with: kjim Approved by: re (kib)
* Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar tojhb2009-07-241-1/+1
| | | | | | | | | | | a device pager (OBJT_DEVICE) object in that it uses fictitious pages to provide aliases to other memory addresses. The primary difference is that it uses an sglist(9) to determine the physical addresses for a given offset into the object instead of invoking the d_mmap() method in a device driver. Reviewed by: alc Approved by: re (kensmith) MFC after: 2 weeks
* When the page caching attributes are changed, after new mapping iskib2009-07-224-14/+66
| | | | | | | | | | | | | | | established, OS shall flush the caches on all processors that may have used the mapping previously. This operation is not needed if processors support self-snooping. If not, but clflush instruction is implemented on the CPU, series of the clflush can be used on the mapping region. Otherwise, we have to flush the whole cache. The later operation is very expensive, and AMD-made CPUs do not have self-snooping. Implement cache flush for remapped region by using clflush for amd64, when supported by CPU. Proposed and reviewed by: alc Approved by: re (kensmith)
* Change the handling of fictitious pages by pmap_page_set_memattr() onalc2009-07-191-2/+5
| | | | | | | | | | | | | | | | | amd64 and i386. Essentially, fictitious pages provide a mechanism for creating aliases for either normal or device-backed pages. Therefore, pmap_page_set_memattr() on a fictitious page needn't update the direct map or flush the cache. Such actions are the responsibility of the "primary" instance of the page or the device driver that "owns" the physical address. For example, these actions are already performed by pmap_mapdev(). The device pager needn't restore the memory attributes on a fictitious page before releasing it. It's now pointless. Add pmap_page_set_memattr() to the Xen pmap. Approved by: re (kib)
* An addendum to r195649, "Add support to the virtual memory system foralc2009-07-181-17/+6
| | | | | | | | | | | | | | | | configuring machine-dependent memory attributes...": Don't set the memory attribute for a "real" page that is allocated to a device object in vm_page_alloc(). It is a pointless act, because the device pager replaces this "real" page with a "fake" page and sets the memory attribute on that "fake" page. Eliminate pointless code from pmap_cache_bits() on amd64. Employ the "Self Snoop" feature supported by some x86 processors to avoid cache flushes in the pmap. Approved by: re (kib)
* Match PCI Express root bridge _HID directly instead ofjkim2009-07-131-0/+1
| | | | | | | relying on _CID. Reviewed by: jhb Approved by: re (kib)
* Add support to the virtual memory system for configuring machine-alc2009-07-123-16/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dependent memory attributes: Rename vm_cache_mode_t to vm_memattr_t. The new name reflects the fact that there are machine-dependent memory attributes that have nothing to do with controlling the cache's behavior. Introduce vm_object_set_memattr() for setting the default memory attributes that will be given to an object's pages. Introduce and use pmap_page_{get,set}_memattr() for getting and setting a page's machine-dependent memory attributes. Add full support for these functions on amd64 and i386 and stubs for them on the other architectures. The function pmap_page_set_memattr() is also responsible for any other machine-dependent aspects of changing a page's memory attributes, such as flushing the cache or updating the direct map. The uses include kmem_alloc_contig(), vm_page_alloc(), and the device pager: kmem_alloc_contig() can now be used to allocate kernel memory with non-default memory attributes on amd64 and i386. vm_page_alloc() and the device pager will set the memory attributes for the real or fictitious page according to the object's default memory attributes. Update the various pmap functions on amd64 and i386 that map pages to incorporate each page's memory attributes in the mapping. Notes: (1) Inherent to this design are safety features that prevent the specification of inconsistent memory attributes by different mappings on amd64 and i386. In addition, the device pager provides a warning when a device driver creates a fictitious page with memory attributes that are inconsistent with the real page that the fictitious page is an alias for. (2) Storing the machine-dependent memory attributes for amd64 and i386 as a dedicated "int" in "struct md_page" represents a compromise between space efficiency and the ease of MFCing these changes to RELENG_7. In collaboration with: jhb Approved by: re (kib)
* Implementation of the upcoming Wireless Mesh standard, 802.11s, on therpaulo2009-07-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | net80211 wireless stack. This work is based on the March 2009 D3.0 draft standard. This standard is expected to become final next year. This includes two main net80211 modules, ieee80211_mesh.c which deals with peer link management, link metric calculation, routing table control and mesh configuration and ieee80211_hwmp.c which deals with the actually routing process on the mesh network. HWMP is the mandatory routing protocol on by the mesh standard, but others, such as RA-OLSR, can be implemented. Authentication and encryption are not implemented. There are several scripts under tools/tools/net80211/scripts that can be used to test different mesh network topologies and they also teach you how to setup a mesh vap (for the impatient: ifconfig wlan0 create wlandev ... wlanmode mesh). A new build option is available: IEEE80211_SUPPORT_MESH and it's enabled by default on GENERIC kernels for i386, amd64, sparc64 and pc98. Drivers that support mesh networks right now are: ath, ral and mwl. More information at: http://wiki.freebsd.org/WifiMesh Please note that this work is experimental. Also, please note that bridging a mesh vap with another network interface is not yet supported. Many thanks to the FreeBSD Foundation for sponsoring this project and to Sam Leffler for his support. Also, I would like to thank Gateworks Corporation for sending me a Cambria board which was used during the development of this project. Reviewed by: sam Approved by: re (kensmith) Obtained from: projects/mesh11s
* When amd64 CPU cannot load segment descriptor during trap return tokib2009-07-101-12/+12
| | | | | | | | | | | | | | usermode, it generates GPF, that is mirrored to user mode as SIGSEGV. The offending register in mcontext should contain the value loading of which generated the GPF, and it is so on i386. On amd64, we currently report segment descriptor in tf_err, while segment register contains the corrected value loaded by trap handler. Fix the issue by behaving like i386, reloading segment register in trap frame after signal frame is pushed onto user stack. Noted and tested by: pho Approved by: re (kensmith)
* Restore the segment registers and segment base MSRs for amd64 syscallkib2009-07-0911-15/+60
| | | | | | | | | | | | | | | | | return path only when neither thread was context switched while executing syscall code nor syscall explicitely modified LDT or MSRs. Save segment registers in trap handlers before interrupts are enabled, to not allow context switches to happen before registers are saved. Use separated byte in pcb for indication of fast/full return, since pcb_flags are not synchronized with context switches. The change puts back syscall microbenchmark numbers that were slowed down after commit of the support for LDT on amd64. Reviewed by: jeff Tested (and tested, and tested ...) by: pho Approved by: re (kensmith)
* When pmap_change_attr() changes the PAT setting on a kernel mapping, it hasalc2009-07-061-3/+11
| | | | | | | | | | | | | | | | to simultaneously change the PAT setting for the same pages within the direct map region. This may require the demotion of a 2MB page mapping and the allocation of a page table page. This revision gives the highest possible priority (VM_ALLOC_INTERRUPT) to this page allocation, so that pmap_change_attr() is less likely to fail. (In general, kernel page table page allocations have the highest priority, so this is not creating a new precedent.) (Demotion of 1GB page mappings within the direct map already specifies VM_ALLOC_INTERRUPT to vm_page_alloc(), so only pmap_demote_pde() must be changed.) Approved by: re (kib)
* After the per-CPU IDT changes, the IDT vector of an interrupt could changejhb2009-07-062-6/+22
| | | | | | | | | | | | | | | | | | | | | when the interrupt was moved from one CPU to another. If the interrupt was enabled, then the old IDT vector needs to be disabled and the new IDT vector needs to be enabled. This was mostly masked prior to the recent MSI changes since in the older code almost all allocated IDT vectors were already enabled and the enabled vectors on the BSP during boot covered enough of the IDT range. However, after the MSI changes, MSI interrupts that were allocated but not enabled (e.g. DRM with MSI) during boot could result in an allocated IDT vector that wasn't enabled. The round-robin at the end of boot could place another interrupt at the same IDT vector without enabling the IDT vector causing trap 30 faults. Fix this by explicitly disabling/enabling the old and new IDT vectors for enabled interrupt sources when moving an interrupt between CPUs via the pic_assign_cpu() method. While here, fix a bug in my earlier changes so that an I/O APIC interrupt pin is left unchanged if ioapic_assign_cpu() fails to allocate a new IDT vector and returns ENOSPC. Approved by: re (kensmith)
* MFi386: Add a 'show idt' command to DDB to display the non-default functionjhb2009-07-061-1/+26
| | | | | | pointers in the interrupt descriptor table. Approved by: re (kensmith)
* Cleanup ALIGNED_POINTER:sam2009-07-051-10/+7
| | | | | | | | | | | o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v) o define as "1" on amd64 and i386 where there is no restriction o make the type returned consistent with ALIGN o remove _ALIGNED_POINTER o make associated comments consistent Reviewed by: bde, imp, marcel Approved by: re (kensmith)
* Enable POSIX semaphores on all non-embedded architectures by default.ed2009-07-021-0/+1
| | | | | | | | | More applications (including Firefox) seem to depend on this nowadays, so not having this enabled by default is a bad idea. Proposed by: miwi Patch by: Florian Smeets <flo kasimir com> Approved by: re (kib)
* Improve the handling of cpuset with interrupts.jhb2009-07-016-45/+102
| | | | | | | | | | | | | | | | | | | | | - For x86, change the interrupt source method to assign an interrupt source to a specific CPU to return an error value instead of void, thus allowing it to fail. - If moving an interrupt to a CPU fails due to a lack of IDT vectors in the destination CPU, fail the request with ENOSPC rather than panicing. - For MSI interrupts on x86 (but not MSI-X), only allow cpuset to be used on the first interrupt in a group. Moving the first interrupt in a group moves the entire group. - Use the icu_lock to protect intr_next_cpu() on x86 instead of the intr_table_lock to fix a LOR introduced in the last set of MSI changes. - Add a new privilege PRIV_SCHED_CPUSET_INTR for using cpuset with interrupts. Previously, binding an interrupt to a CPU only performed a privilege check if the interrupt had an interrupt thread. Interrupts without a thread could be bound by non-root users as a result. - If an interrupt event's assign_cpu method fails, then restore the original cpuset mask for the associated interrupt thread. Approved by: re (kib)
* Don't include rpcv2.h - it has been removed.dfr2009-07-011-1/+0
| | | | | Submitted by: ed@ Approved by: re
* remove unused/unneeded extern declarationsavg2009-06-301-3/+0
| | | | | | | | This should result in no changes to compiled code. Reviewed by: alc Approved by: re (kib) MFC after: 1 day
* Catch missed AUDIT_ARG() -> AUDIT_ARG_CMD() on amd64.rwatson2009-06-271-1/+1
| | | | | | Submitted by: Florian Smeets <flo at kasimir.com> Approved by: re (kib) (implicit) MFC after: 1 week
* Replace AUDIT_ARG() with variable argument macros with a set more morerwatson2009-06-271-1/+1
| | | | | | | | | | | | | | specific macros for each audit argument type. This makes it easier to follow call-graphs, especially for automated analysis tools (such as fxr). In MFC, we should leave the existing AUDIT_ARG() macros as they may be used by third-party kernel modules. Suggested by: brooks Approved by: re (kib) Obtained from: TrustedBSD Project MFC after: 1 week
* Correct the #endif comment.alc2009-06-261-1/+1
| | | | | Noticed by: jmallett Approved by: re (kib)
* This change is the next step in implementing the cache control functionalityalc2009-06-261-0/+45
| | | | | | | | | | | required by video card drivers. Specifically, this change introduces vm_cache_mode_t with an appropriate VM_CACHE_DEFAULT definition on all architectures. In addition, this changes adds a vm_cache_mode_t parameter to kmem_alloc_contig() and vm_phys_alloc_contig(). These will be the interfaces for allocating mapped kernel memory and physical memory, respectively, with non-default cache modes. In collaboration with: jhb
* Fix kernels compiled without SMP support. Make intr_next_cpu() availablejhb2009-06-252-2/+10
| | | | | | | for UP kernels but as a stub that always returns the single CPU's local APIC ID. Reported by: kib
* - Restore the behavior of pre-allocating IDT vectors for MSI interrupts.jhb2009-06-254-55/+77
| | | | | | | | | | | | | | | | | | This is mostly important for the multiple MSI message case where the IDT vectors for the entire group need to be allocated together. This also restores the assumptions made by the PCI bus code that it could invoke PCIB_MAP_MSI() once MSI vectors were allocated. - To avoid whiplash with CPU assignments, change the way that CPUs are assigned to interrupt sources on activation. Instead of assigning the CPU via pic_assign_cpu() before calling enable_intr(), allow the different interrupt source drivers to ask the MD interrupt code which CPU to use when they allocate an IDT vector. I/O APIC interrupt pins do this in their pic_enable_intr() routines giving the same behavior as before. MSI sources do it when the IDT vectors are allocated during msi_alloc() and msix_alloc(). - Change the intr_table_lock from an sx lock to a mutex. Tested by: rnoland
* Whitespace fix.jhb2009-06-241-0/+1
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* Make algorithm a bit more bulletproof.mav2009-06-231-2/+2
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* Implement a facility for dynamic per-cpu variables.jeff2009-06-232-1/+6
| | | | | | | | | | | | | | | - Modules and kernel code alike may use DPCPU_DEFINE(), DPCPU_GET(), DPCPU_SET(), etc. akin to the statically defined PCPU_*. Requires only one extra instruction more than PCPU_* and is virtually the same as __thread for builtin and much faster for shared objects. DPCPU variables can be initialized when defined. - Modules are supported by relocating the module's per-cpu linker set over space reserved in the kernel. Modules may fail to load if there is insufficient space available. - Track space available for modules with a one-off extent allocator. Free may block for memory to allocate space for an extent. Reviewed by: jhb, rwatson, kan, sam, grehan, marius, marcel, stas
* Fix variable name.mav2009-06-231-1/+1
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* Rework r193814:mav2009-06-231-34/+31
| | | | | | | | | | | While general idea of patch was good, it was not working properly due the way it was implemented. When we are using same timer interrupt for several of hard/prof/stat purposes we should not send several IPIs same time to other CPUs. Sending several IPIs same time leads to terrible accounting/profiling results due to strong synchronization effect, when the second interrupt handler accounts processing of the first one. Interlink timer events in a such way, that no more then one IPI is sent for any original timer interrupt.
* Eliminate dead code. These definitions should have been deleted with thealc2009-06-221-10/+0
| | | | | | introduction of i686_mem.c in r45405. Merge adjacent #ifdef _KERNEL/#endif blocks.
* I have several machines where the following warning is printed:ps2009-06-151-0/+3
| | | | | | | | | warning: no time-of-day clock registered, system time will not be set accurately Provide hints to atrtc on amd64 since it's not being described in ACPI on some systems. Reviewed by: jhb
* Forbid multi-vector MSI interrupt vectors migration to another CPU oncemav2009-06-151-0/+2
| | | | | | | | allocated. MSI have strict vectors allocation requirements, which are not satisfied now during reallocation. This is not the best possible solution, but better then just broken, as it was. No objections: current@, arch@, jhb@
* Long, long ago in r27464 special case code for mapping device-backedalc2009-06-141-49/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | memory with 4MB pages was added to pmap_object_init_pt(). This code assumes that the pages of a OBJT_DEVICE object are always physically contiguous. Unfortunately, this is not always the case. For example, jhb@ informs me that the recently introduced /dev/ksyms driver creates a OBJT_DEVICE object that violates this assumption. Thus, this revision modifies pmap_object_init_pt() to abort the mapping if the OBJT_DEVICE object's pages are not physically contiguous. This revision also changes some inconsistent if not buggy behavior. For example, the i386 version aborts if the first 4MB virtual page that would be mapped is already valid. However, it incorrectly replaces any subsequent 4MB virtual page mappings that it encounters, potentially leaking a page table page. The amd64 version has a bug of my own creation. It potentially busies the wrong page and always an insufficent number of pages if it blocks allocating a page table page. To my knowledge, there have been no reports of these bugs, hence, their persistance. I suspect that the existing restrictions that pmap_object_init_pt() placed on the OBJT_DEVICE objects that it would choose to map, for example, that the first page must be aligned on a 2 or 4MB physical boundary and that the size of the mapping must be a multiple of the large page size, were enough to avoid triggering the bug for drivers like ksyms. However, one side effect of testing the OBJT_DEVICE object's pages for physical contiguity is that a dubious difference between pmap_object_init_pt() and the standard path for mapping devices pages, i.e., vm_fault(), has been eliminated. Previously, pmap_object_init_pt() would only instantiate the first PG_FICTITOUS page being mapped because it never examined the rest. Now, however, pmap_object_init_pt() uses the new function vm_object_populate() to instantiate them all (in order to support testing their physical contiguity). These pages need to be instantiated for the mechanism that I have prototyped for automatically maintaining the consistency of the PAT settings across multiple mappings, particularly, amd64's direct mapping, to work. (Translation: This change is also being made to support jhb@'s work on the Nvidia feature requests.) Discussed with: jhb@
* Enable PRINTF_BUFR_SIZE on i386 and amd64 by default.ed2009-06-141-0/+1
| | | | | | | | In the past there have been some reports of PRINTF_BUFR_SIZE not functioning correctly. Instead of having garbled console messages, we should just see whether the issues are still there and analyze them. Approved by: re
* Add alc(4), a driver for Atheros AR8131/AR8132 PCIe ethernetyongari2009-06-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | controller. These controllers are also known as L1C(AR8131) and L2C(AR8132) respectively. These controllers resembles the first generation controller L1 but usage of different descriptor format and new register mappings over L1 register space requires a new driver. There are a couple of registers I still don't understand but the driver seems to have no critical issues for performance and stability. Currently alc(4) supports the following hardware features. o MSI o TCP Segmentation offload o Hardware VLAN tag insertion/stripping o Tx/Rx interrupt moderation o Hardware statistics counters(dev.alc.%d.stats) o Jumbo frame o WOL AR8131/AR8132 also supports Tx checksum offloading but I disabled it due to stability issues. I'm not sure this comes from broken sample boards or hardware bugs. If you know your controller works without problems you can still enable it. The controller has a silicon bug for Rx checksum offloading, so the feature was not implemented. I'd like to say big thanks to Atheros. Atheros kindly sent sample boards to me and answered several questions I had. HW donated by: Atheros Communications, Inc.
* opt in to flowtable on i386/amd64kmacy2009-06-091-0/+1
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* remove flowtable from DEFAULTSkmacy2009-06-091-1/+0
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* Unbreak the build for amd64 after r193814 using correct variable names.bz2009-06-091-2/+2
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* When using i8254 as the only kernel timer source:ariff2009-06-091-7/+31
| | | | | | | | | - Interpolate stat/prof clock using clkintr() in a similar fashion to local APIC timer, since statclock usually run slower. - Liberate hardclockintr() from taking the burden of handling both stat and prof clock interrupt. Instead, send IPIs within clkintr() to handle those.
* Move C1E workaround into its own idle function. Previous workaround worksariff2009-06-092-23/+73
| | | | | | | | | | | | | | only during initial booting process, while there are laptops/BIOSes that tend to act 'smarter' by force enabling C1E if the main power adapter being pulled out, rendering previous workaround ineffective. Given the fact that we still rely on local APIC to drive timer interrupt, this workaround should keep all Turion (probably Phenom too) X\d+ alive whether its on battery power or not. URL: http://lists.freebsd.org/pipermail/freebsd-acpi/2008-April/004858.html http://lists.freebsd.org/pipermail/freebsd-acpi/2008-May/004888.html Tested by: Peter Jeremy <peterjeremy at optushome d com d au>
* Rewrite OsdSynch.c to reflect the latest ACPICA more closely:jkim2009-06-081-3/+0
| | | | | | - Implement ACPI semaphore (ACPI_SEMAPHORE) with condvar(9) and mutex(9). - Implement ACPI mutex (ACPI_MUTEX) with mutex(9). - Implement ACPI lock (ACPI_SPINLOCK) with spin mutex(9).
* Revert my change; reintroduce __gnu89_inline.ed2009-06-081-1/+1
| | | | | | | | | It turns out our compiler in stable/7 can't build this code anymore. Even though my opinion is that those people should just run `make kernel-toolchain' before building a kernel, I am willing to wait and commit this after we've branched stable/8. Requested by: rwatson
* Remove __gnu89_inline.ed2009-06-081-1/+1
| | | | | | | | | Now that we use C99 almost everywhere, just use C99-style in the pmap code. Since the pmap code is the only consumer of __gnu89_inline, remove it from cdefs.h as well. Because the flag was only introduced 17 months ago, I don't expect any problems. Reviewed by: alc
* Now that amd64's kernel map is 512GB (SVN rev 192216), there is no reasonalc2009-06-081-9/+0
| | | | | | to cap its buffer map at 1GB. MFC after: 6 weeks
* Put intrcnt, eintrcnt, intrnames and eintrnames into the .data section.kib2009-06-051-0/+1
| | | | | Noted by: "Tseng, Kuo-Lang" <kuo-lang.tseng intel com>, bde MFC after: 3 days
* Import ACPICA 20090521.jkim2009-06-054-7/+11
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