summaryrefslogtreecommitdiffstats
path: root/sys/amd64
Commit message (Expand)AuthorAgeFilesLines
...
* Whitespace.jhb2003-11-131-5/+5
* Fix a typo.jhb2003-11-131-1/+1
* Stop pretending to support kernel profiling. The FAKE_MCOUNT() etcpeter2003-11-133-13/+0
* - Move manipulation of td_intr_nesting_level out of assembly interruptjhb2003-11-128-98/+75
* Cosmetic sync with i386peter2003-11-121-0/+2
* Don't probe busses in the MP Table for the MP Table PCI bridge driversjhb2003-11-111-0/+2
* Some motherboards like to remap the SCI (normally IRQ 9) up to a PCIjhb2003-11-111-1/+6
* Enable HTT CPUs by default instead of halting them by default. Usersjhb2003-11-111-1/+1
* Disable probing of HTT CPUs by default for the MP Table case. HTT CPUsjhb2003-11-111-0/+7
* MFamd64 (via P4, not in CVS yet):jhb2003-11-101-21/+21
* Bump APIC ID limits up to 32 since a machine with 16 CPUs will have APICjhb2003-11-102-3/+3
* Change the clear_ret argument of get_mcontext() to be a flags argument.marcel2003-11-091-2/+2
* Move a MD 32 bit binary support routine into the MD areas. exec_setregspeter2003-11-081-0/+41
* Update the graffiti.peter2003-11-0813-3/+18
* Switch from having a fpu "device" to something that is more like thepeter2003-11-083-129/+32
* The great s/npx/fpu/gipeter2003-11-0812-183/+128
* Converge with i386/GENERICpeter2003-11-081-14/+15
* Rename npx* to fpu*. I haven't done the flags/function names yet.peter2003-11-087-848/+8
* There isn't much point printing 'npx0: INT 16 interface' because that ispeter2003-11-082-2/+0
* Dump the trigger and polarity of each intpin's default setting in thejhb2003-11-071-2/+5
* Document the lockfunc and lockfuncarg arguments to bus_dma_tag_create() inscottl2003-11-071-0/+4
* Only disable the old pin when doing a remap if it's current vector is stilljhb2003-11-061-1/+2
* OK, this might be a bit silly, but add another popcnt() candidate.peter2003-11-061-0/+6
* When remapping an ISA interrupt from one intpin to another, disable thejhb2003-11-052-9/+21
* Two style nits.jhb2003-11-051-0/+2
* - Adjust some of the bitfields in the ioapic_intsrc struct to be unsignedjhb2003-11-051-18/+18
* Add a workaround for MP Tables that list the same PCI IRQ twice withjhb2003-11-051-3/+16
* Tweak the version string output for ioapic devices.jhb2003-11-041-2/+3
* Fix to support pc98.nyan2003-11-041-0/+6
* Split pc98 support into pc98/pc98/nmi.c.nyan2003-11-041-22/+1
* Make this compile with PAE.peter2003-11-041-5/+6
* New i386 SMP code:jhb2003-11-032-1993/+359
* Don't probe PnP BIOS devices for PICs for now to avoid problems with thosejhb2003-11-031-9/+3
* Add the ACPI MADT table APIC enumerator. This code uses the ACPI Multiplejhb2003-11-031-0/+650
* Add the MP Table APIC enumerator. This code uses the BIOS MP Table tojhb2003-11-033-5346/+862
* New APIC support code:jhb2003-11-035-350/+1725
* Add the new atpic(4) driver for the 8259A master and slave PICs. Byjhb2003-11-032-178/+492
* New device interrupt code. This defines an interrupt source abstractionjhb2003-11-032-0/+387
* Move the NMI handling code out to its own file.jhb2003-11-031-586/+2
* Include "opt_pmap.h" so that the DISABLE_P* options are honored.jhb2003-10-301-0/+2
* Always export r_gdt and r_idt and give them extern declarations injhb2003-10-303-9/+0
* MFi386: thread specific fpu state optimizationspeter2003-10-301-1/+3
* MFi386: rev 1.451 (jhb): call pmap_kremove() rather than duplicate itpeter2003-10-301-5/+2
* MFi386: trap.c rev 1.259: fetch thread mailbox address in page fault trappeter2003-10-301-0/+2
* Oops. Remove some rather noisy debug printfs that slipped in therepeter2003-10-281-9/+0
* A few whitespace and comment tweaks.jhb2003-10-243-18/+9
* Add __va_copy and make it always visible, in spite of the __ISO_C_VISIBLEpeter2003-10-241-1/+4
* Use a more robust API altogether for the amd64_get_fsbase() etc functions.peter2003-10-231-4/+4
* Renumber the sysarch vectors for amd64 specific syscalls so that I canpeter2003-10-231-6/+5
* Change all SYSCTLS which are readonly and have a related TUNABLEsilby2003-10-212-2/+2
OpenPOWER on IntegriCloud