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* MFC r272193grehan2014-10-011-13/+12
* MFC r270689:grehan2014-09-161-13/+91
* MFC r267921, r267934, r267949, r267959, r267966, r268202, r268276,grehan2014-08-1910-316/+1177
* MFC r267311, r267330, r267811, r267884grehan2014-08-174-39/+118
* MFC r267178, r267300grehan2014-08-173-53/+192
* MFC r267216grehan2014-08-174-80/+149
* MFC r266933grehan2014-08-173-14/+48
* MFC 266424,266476,266524,266573,266595,266626,266627,266633,266641,266642,jhb2014-07-227-101/+618
* MFC 266125:jhb2014-07-223-0/+44
* MFC 264353,264509,264768,264770,264825,264846,264988,265114,265165,265365,jhb2014-07-219-64/+92
* MFC 264347:jhb2014-07-211-1/+10
* MFC 263780,264516,265062,265101,265203,265364:jhb2014-07-214-70/+189
* MFC 259942,262274,263035,263054,263211,263744,264179,264324,264468,264631,jhb2014-07-1911-14/+1629
* MFC 262139,262140,262236,262281,262532:jhb2014-06-138-62/+267
* MFC 262615,262624:jhb2014-06-121-0/+7
* MFC 261638,262144,262506,266765:jhb2014-06-128-84/+345
* MFC 261504:jhb2014-06-123-27/+112
* MFC 261503,264501:jhb2014-06-121-0/+123
* MFC 260239,261268,265058:jhb2014-06-121-0/+3
* MFC 260972:jhb2014-06-044-7/+34
* MFC 260802,260836,260863,261001,261074,261617:jhb2014-05-234-81/+232
* MFC 260237:jhb2014-05-201-67/+84
* MFC 259737, 262646:jhb2014-05-182-24/+61
* MFC 259641,259863,259924,259937,259961,259978,260380,260383,260410,260466,jhb2014-05-1721-583/+1709
* MFC 258860,260167,260238,260397:jhb2014-04-174-419/+215
* MFC 259542:jhb2014-02-234-149/+62
* MFC 258859,259081,259085,259205,259213,259275,259482,259537,259702,259779:jhb2014-02-2313-309/+861
* MFC 257297:jhb2014-02-227-9/+0
* MFC r258779,r258780,r258787,r258822:eadler2014-02-043-4/+4
* MFC 259782:jhb2014-01-293-0/+25
* MFC 257422,257661,258075,258476,258494,258579,258609,258699:jhb2014-01-2314-440/+1497
* MFC r256645.neel2013-10-224-3/+40
* MFC r256570:neel2013-10-161-26/+38
* Merge projects/bhyve_npt_pmap into head.neel2013-10-0516-652/+977
* Return 0 for a rdmsr of MSR_IA32_PLATFORM_ID. Thisgrehan2013-09-271-1/+5
* Hide TSC-deadline APIC timer support from guests. This modegrehan2013-09-171-1/+6
* Fix a bug in decoding an instruction that has an SIB byte as well as anneel2013-09-171-6/+6
* Fix a limitation in bhyve that would limit the number of virtual machines toneel2013-09-113-1/+9
* Allocate VPIDs by using the unit number allocator to keep do the bookkeeping.neel2013-09-071-39/+103
* Mask off the vector from the MSI-x data word.grehan2013-09-071-1/+1
* Emulate reading of the IA32_MISC_ENABLE MSR, by returninggrehan2013-09-061-1/+16
* Allow CPUID leaf 0xD to be read as zeroes.grehan2013-09-062-0/+2
* Add support for emulating the byte move instruction "mov r/m8, r8".neel2013-08-271-2/+10
* Do not create superpage mappings in the iommu.neel2013-08-201-1/+18
* Extract the location of the remapping hardware units from the ACPI DMAR table.neel2013-08-201-60/+54
* Follow-up commit to fix CR0 issues. Maintaingrehan2013-08-031-4/+38
* Moved clearing of vmm_initialized to avoid the casegrehan2013-08-011-1/+6
* Correctly maintain the CR0/CR4 shadow registers.grehan2013-08-011-11/+54
* Add support for emulation of the "or r/m, imm8" instruction.neel2013-07-231-3/+60
* Verify that all bytes in the instruction buffer are consumed during decoding.neel2013-07-031-0/+16
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