summaryrefslogtreecommitdiffstats
path: root/sys/amd64/vmm/vmm_instruction_emul.c
Commit message (Expand)AuthorAgeFilesLines
* vmm(4): Small spelling fixes.pfg2016-05-031-1/+1
* verify_gla() needs to account for non-zero segment base addresses.tychon2015-06-261-7/+44
* Restructure memory allocation in bhyve to support "devmem".neel2015-06-181-5/+7
* The 'verify_gla()' function is used to ensure that the effective addressneel2015-06-051-1/+1
* Remove the verification of instruction length after instruction decode. Theneel2015-05-221-16/+0
* Emulate the "CMP r/m, reg" instruction (opcode 39H).neel2015-05-211-6/+22
* Deprecate the 3-way return values from vm_gla2gpa() and vm_copy_setup().neel2015-05-061-59/+64
* Emulate the 'CMP r/m8, imm8' instruction encountered when booting a Windowsneel2015-05-041-2/+14
* Emulate the 'bit test' instruction. Windows 7 uses 'bit test' to check theneel2015-04-291-0/+52
* STOS/STOSB/STOSW/STOSD/STOSQ instruction emulation.tychon2015-04-251-0/+77
* Enhance the support for Group 1 Extended opcodes:tychon2015-04-061-38/+84
* Fix "MOVS" instruction memory to MMIO emulation. Currently updates totychon2015-04-011-31/+50
* When fetching an instruction in non-64bit mode, consider the value of thetychon2015-03-241-3/+3
* MOVS instruction emulation.neel2015-01-191-4/+267
* IFC @r273206neel2014-10-191-20/+77
|\
| * Emulate "POP r/m".neel2014-10-141-20/+77
* | IFC @r271694neel2014-09-171-52/+154
|\ \ | |/
| * The "SUB" instruction used in getcc() actually does 'x -= y' so use theneel2014-08-301-42/+66
| * Implement the 0x2B SUB instruction, and the OR variant of 0x81.grehan2014-08-271-13/+91
* | AMD processors that have the SVM decode assist capability will store theneel2014-09-131-1/+8
* | IFC @r269962neel2014-09-021-148/+533
|\ \ | |/
| * Support PCI extended config space in bhyve.neel2014-08-081-0/+23
| * Don't return -1 from the push emulation handler. Negative return values areneel2014-07-261-4/+11
| * Fix a couple of issues in the PUSH emulation:neel2014-07-241-5/+15
| * Emulate instructions emitted by OpenBSD/i386 version 5.5:neel2014-07-231-58/+298
| * Add support for operand size and address size override prefixes in bhyve'sneel2014-07-151-113/+202
| * Use the correct offset when converting a logical address (segment:offset)neel2014-07-111-4/+5
| * Add support for emulating the move instruction: "mov r/m8, imm8".tychon2014-06-261-0/+15
* | MFC @ r266724grehan2014-06-031-45/+482
|\ \ | |/
| * Add segment protection and limits violation checks in vie_calculate_gla()neel2014-05-271-5/+81
| * Do the linear address calculation for the ins/outs emulation using a newneel2014-05-251-38/+32
| * Consolidate all the information needed by the guest page table walker intoneel2014-05-241-20/+48
| * When injecting a page fault into the guest also update the guest's %cr2 toneel2014-05-241-17/+16
| * Check for alignment check violation when processing in/out string instructions.neel2014-05-231-8/+26
| * Add emulation of the "outsb" instruction. NetBSD guests use this to write toneel2014-05-231-1/+47
| * Inject page fault into the guest if the page table walker detects an invalidneel2014-05-221-23/+52
| * Add PG_RW check when translating a guest linear to guest physical address.neel2014-05-201-20/+83
| * Add PG_U (user/supervisor) checks when translating a guest linear addressneel2014-05-191-10/+19
| * Add support for emulating the byte move and sign extend instructions:tychon2014-04-151-5/+37
| * Add support for FreeBSD/i386 guests under bhyve.jhb2014-02-051-25/+77
| * Add support for emulating the byte move and zero extend instructions:tychon2014-02-051-0/+91
* | MFC @ r259205 in preparation for some SVM updates. (for real this time)grehan2014-02-041-1/+0
|\ \ | |/
* | Roll back botched partial MFC :(grehan2014-02-041-0/+1
* | MFC @ r259205 in preparation for some SVM updates.grehan2014-02-041-1/+0
|\ \ | |/
| * Remove unnecessary includes of <machine/pmap.h>neel2013-10-291-1/+0
| * Merge projects/bhyve_npt_pmap into head.neel2013-10-051-13/+15
* | Enable memory overcommit for AMD processors.grehan2013-12-181-1/+1
* | MFC @ r256071grehan2013-12-181-13/+15
* | IFC @ r255692grehan2013-09-201-8/+16
|\ \ | |/
| * Fix a bug in decoding an instruction that has an SIB byte as well as anneel2013-09-171-6/+6
OpenPOWER on IntegriCloud