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* Make the class code checks in function pci_cfgcheck less strict.se1997-12-202-4/+4
* Removed unused #includes.bde1997-07-202-4/+2
* Yet another fix for configuration mechanism 1 register accesses:se1997-05-262-8/+10
* Fix previous fix: The enable bit is bit 31 (0x8000000) and not bit 15.se1997-05-262-4/+4
* Set enable bit when writing the configuration address in configurationse1997-05-262-4/+4
* Completely replace the PCI bus driver code to make it better reflectse1997-05-262-926/+380
* Mask out revision register in consistency test of class register.se1997-04-092-4/+4
* Fix spelling of align and interrupt in comments.se1997-04-092-12/+12
* Fix consistency test to not fail on pre PCI 2.0 motherboardsse1997-04-092-4/+4
* improve pcibus_check: Only assume PCI if at least one PCI to anything bridgese1997-03-052-12/+38
* Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are notpeter1997-02-222-2/+2
* Sync with <pci/pcibus.h>. pcibus.c unfortunately still compiled (withbde1997-01-252-2/+0
* Make the long-awaited change from $Id$ to $FreeBSD$jkh1997-01-142-2/+2
* Make the code more consistant by using the INTR*MASK macros througout thenate1997-01-082-4/+4
* More merge and update.asami1996-10-302-2/+10
* Removed unused #includes of <i386/isa/icu.h> and <i386/isa/icu.h>. icu.hbde1996-06-182-4/+2
* Change CONF1_ENABLE_MSK to 0x7ff00000 in another attempt to decidese1996-06-132-4/+4
* Make pcibus_check() ignore Device/Vendor IDs of all 0.se1996-04-302-4/+4
* Removed now-unused #includes of <machine/cpu.h>. They were for bootverbosebde1996-04-072-6/+2
* Count PCI irqs in up to 4 ISAish counters named `pci irqnn' instead ofbde1996-03-292-6/+60
* Completed function declarations and/or added prototypes and/or addedbde1995-12-162-14/+14
* Staticize and cleanup.phk1995-12-102-4/+4
* Make CONF1_ENABLE_MSK1 even less restriktive: Ignore slot ID ...se1995-10-172-4/+4
* At least the ASUS Triton motherboards don't disable the PCI bus configurationse1995-10-172-8/+10
* Go back to separate tests for configuration mechanism 1 and mechanism 2.se1995-10-152-108/+114
* Fix bad typo: CONF1_ENABLE_RES1 was written CONF1_ENABLE_CHK1 ...se1995-10-092-12/+28
* New approach to the PCI bus configuration mechanism probe problem:se1995-09-222-100/+126
* Revert most changes of previous commit.se1995-09-182-36/+104
* Another try to determine the PCI bus configuration mode (and whetherse1995-09-152-118/+80
* Improved verification of configuration space accesses working:se1995-09-142-8/+38
* Make the PCI host bridge probe code more robust when dealing with chip setsse1995-09-132-12/+70
* The PCI config mechanism 1 test failed for the Intel Aries.se1995-06-302-4/+4
* PCI configuration mechanism now determined by a method, that doesn'tse1995-06-282-30/+34
* Correct pcibus_setup() to return as soon as one test succeeds.se1995-03-222-2/+6
* Delete PCI PCI bridge simulator code ...se1995-03-222-180/+2
* Remove spurious declaration of printf().se1995-03-222-6/+2
* New ISA specific PCI code.se1995-03-212-294/+418
* Replace all remaining instances of `i386/include' by `machine' and fixbde1995-02-262-22/+12
* Keep PCI_CONF_MODE in a safe place for later reference, if #defined.se1995-02-252-2/+4
* Initialisation of interrupt masks changed.se1995-02-092-8/+10
* Reviewed by: sese1995-02-012-0/+884
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