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* The Libretto L series has no $PIR table, but does have a _PIR table.imp2002-01-201-13/+22
| | | | | | | | | | | | | This typo keeps us from properly routing an interrupt for CardBus bridges on this machine. So, now we look for $PIR and then _PIR to cope. With these changes, the Libretto L1 now works properly. Evidentally, the idea comes from patch that the Japanese version of RedHat (or against a Japanese version of Red Hat), but my Japanese isn't good enough to to know for sure. Reported by: Hiroyuki Aizu-san <eyes@navi.org> # This may be an MFC candidate, but I'm not yet sure.
* Add identification string for AMD-761 host to PCI bridge.murray2001-12-101-0/+3
| | | | PR: kern/32255
* MFS: I was confused. This code wasn't in -current after all.imp2001-11-261-5/+14
| | | | | | | Merge in the irq 0 detection. Add comment about why. If we have irq 0, ignore it like we do irq 255. Some BIOS writers aren't careful like they should be.
* It turns out that while Toshiba laptops don't want to route interruptsimp2001-08-281-17/+10
| | | | | | | | | | | | | | | | | | multiple times, others do. The last strategy, which was to assume that already routed interrupts were good and just return them doesn't work for some laptops. So, instead, we have a new strategy: we notice that we have an interrupt that's already routed. We go ahead and try to route it, none the less. We will assume that it is correctly routed, even if the route fails. We still assume that other failures in the bios32 call are because the interrupt is NOT routed. Note: some laptops do not support the bios32 interface to PCI BIOS and we need to call it via the INT 2A interface. That is another windmill to till at later. Also correct a minor typo and minor whitespace nits. Strong MFC candidate.
* MFS: IRQ ordering, PRVERB and more whining in pcibios_get_version on failure.imp2001-08-271-30/+60
| | | | | | | Check return value from bios32. [[ Yes, I was bad and committed this to stable first. I should have done the commit in the other order. ]]
* The general conesnsus on irc was that pci bios for config registersimp2001-08-211-2/+25
| | | | | | | | | and such was just a bad idea and one that users should be forced to enable if they want it. This patch introduces a hw.pci.enable_pcibios tunable for those people. This does not impact the pcibios interrupt routing at all. Approved by: peter, msmith
* Detect a certain type of PCIBIOS brain damage. For some reason,peter2001-08-212-0/+31
| | | | | | | | | | | | some bios vendors took it apon themselves to "censor" the host->pci bridges from PCIBIOS callers, even when the caller explicitly asks for them. This includes certain Compaq machines (eg: DL360) and some laptops. If we detect this, shut down pcibios and revert to using IO port bashing. Under -current, apcica does a better job anyway.
* Un-swap irq/link byte values so that printf works.msmith2001-05-111-1/+1
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* Free the memory we get from devclass_get_devices and device_get_children.msmith2001-02-081-3/+8
| | | | Submitted by: wpaul
* Fix a warning due to missing prototype.peter2001-01-191-1/+1
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* Remove declaration of airq variable from outer block. There were twobmilekic2001-01-121-1/+1
| | | | | | declarations of a variable of the same name. The one in the outer block was unused and probably just slipped in at one point or another. This silences a compiler warning.
* Next phase in the PCI subsystem cleanup.msmith2000-12-082-4/+54
| | | | | | | | | | | | | | | | | | | | - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
* Hack to work around a probe which will lock up at least some i450GX-basedmsmith2000-11-081-1/+5
| | | | | | | | | | | | | systems. From the PR: When 'probe.slot' is PCI_SLOTMAX (== 31) and 'probe.func' is 7, call to 'pci_cfgread()' here and machine suddenly hangs up. I don't know why... (or 450GX chipset's bug?) PR: i386/20379 Submitted by: Masayuki FUKUI <fukui@sonic.nm.fujitsu.co.jp>
* Improve the PCI interrupt routing code. Now the process is as follows:msmith2000-11-021-16/+162
| | | | | | | | | | | | - Look for a hardwired interrupt in the routing table for this bus/device/pin (we already did this). - Look for another device with the same link byte which has a hardwired interrupt. - Look for a PCI device matching an entry with the same link byte which has already been assigned an interrupt, and use that. - Look for a routable interrupt listed in the "PCI only" interrupts field and use that. - Pick the first interrupt that's marked as routable and use that.
* Return -10000 in pci_hostb_probe to allow agp driver (disabled otherwise)ache2000-10-201-1/+1
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* Add i815 Host to Hubache2000-10-201-0/+3
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* Call the BIOS to route the selected interrupt. Correctly calculate themsmith2000-10-191-4/+22
| | | | | interrupt from the PCI routing table (ffs returns 1 for the rightmost bit, not 0).
* Remove debug writes introduced in prior commitimp2000-10-161-5/+2
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* Add the ability to use the $PIR table in the BIOS to route interruptsimp2000-10-162-3/+74
| | | | | | on demand. Submitted by: msmith
* Change the text for the ServerWorks north bridge chips. RCC is nowalc2000-10-141-4/+4
| | | | officially listed as ServerWorks by www.pcisig.com.
* When testing for PCI bus overlap with another enumerator, make sure wemsmith2000-10-111-1/+1
| | | | | | | check for the right bus number. This is still not quite right, but fixes things for multi-bus machines again. Submitted by: tegge
* Only attach "legacy" PCI busses if none have been attached via any othermsmith2000-10-091-3/+23
| | | | method.
* Move the i386 PCI attachment code out of i386/isa back into i386/pci.msmith2000-10-022-1028/+255
| | | | | Split out the configuration space access primitives, as these are needed elsewhere as well.
* Get out the roto-rooter and clean up the abuse of nexus ivars by thepeter2000-09-282-38/+12
| | | | | | | | | | | | i386/isa/pcibus.c. This gets -current running again on multiple host->pci machines after the most recent nexus commits. I had discussed this with Mike Smith, but ended up doing it slightly differently to what we discussed as it turned out cleaner this way. Mike was suggesting creating a new resource (SYS_RES_PCIBUS) or something and using *_[gs]et_resource(), but IMHO that wasn't ideal as SYS_RES_* is meant to be a global platform property, not a quirk of a given implementation. This does use the ivar methods but does so properly. It also now prints the physical pci bus that a host->pci bridge (pcib) corresponds to.
* Catch a few more bogosities in certain chipsets before they mess us up.peter2000-09-052-38/+178
| | | | | | | | | | | | | Some have dual host->PCI bridges for the same logical pci bus (!), eg: some of the RCC chipsets. This is a 32/64 bit 33/66MHz and dual pci voltage motherboard so persumably there are electical or signalling differences but they are otherwise the same logical bus. The new PCI probe code however was getting somewhat upset about it and ended up creating two pci bridges to the same logical bus, which caused devices on that logical bus to appear and be probed twice. The ACPI data on this box correctly identifies this stuff, so bring on ACPI! :-)
* Take a shot at fixing multiple pci busses on i386.peter2000-08-312-20/+100
| | | | | | | | pcib_set_bus() cannot be used on the new child because it is meant to be used on the *pci* device (it looks at the parent internally) not the pcib being added. Bite the bullet and use ivars for the bus number to avoid any doubts about whether the softc is consistant between probe and attach. This should not break the Alpha code.
* * Completely rewrite the alpha busspace to hide the implementation fromdfr2000-08-282-96/+168
| | | | | | | | | | | | the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
* Add PnP probe methods to some common AT hardware drivers. In each case,msmith2000-06-232-0/+108
| | | | | | | | | the PnP probe is merely a stub as we make assumptions about some of this hardware before we have probed it. Since these devices (with the exception of the speaker) are 'standard', suppress output in the !bootverbose case to clean up the probe messages somewhat.
* Add OPTi 82C700 chipset.kuriyama2000-05-242-0/+6
| | | | | Submitted by: sanpei@sanpei.org PR: kern/18155 (part of)
* Add 440MX chipset.kuriyama2000-05-242-0/+6
| | | | | Submitted by: YOSHIMURA Hideaki <hideakiy@cs-tokyo01.chuosystem.co.jp> References: [bsd-nomads:13764]
* Don't assume that the PCI BIOS is going to clear the unused bits in %ecxmsmith2000-05-042-2/+10
| | | | when it returns.
* Some more i386-only BIOS-friendliness:msmith2000-04-162-18/+224
| | | | | | | | | - Add support for using the PCI BIOS functions for configuration space accesses, and make this the default. - Make PNPBIOS the default (obsoletes the PNPBIOS config option). - Add two new boot-time tunables to disable each of the above.
* Add a workaround to allow us to detect the second pci bus on an HPdfr2000-02-232-2/+20
| | | | | | Netserver LS/2. Approved by: jkh
* Fix an uninitialised variable which affected probing on some machines.dfr2000-02-132-0/+2
| | | | | Approved by: jkh Reviewed by: gallatin
* Allow allows peer pci buses which are directly connected to the RCC host pcigallatin2000-02-092-14/+44
| | | | | | | | | chipset to be probed & attached on newer Dell PowerEdge servers, such as the 2400 and 4400. Reviewed by: dfr, msmith, jlemon Tested by: hnokubi@yyy.or.jp (in a previous incantation) Approved by: jkh
* Add PCI Id's for i810 chipsets.n_hibma2000-02-072-0/+18
| | | | | | PR: 16517 Submitted by: SAKIYAMA Nobuo <sakichan@lares.dti.ne.jp> Approved by: jhk
* Clean up the cfgmech/pci_mechanism debris. The reason for the existancepeter2000-01-082-12/+0
| | | | | | | of this is no longer an issue as we have a replacement driver for the one that needed it. Reviewed by: dfr
* Don't use a bogus bus number for Ross host-pci bridges.dfr1999-12-052-0/+4
| | | | | PR: kern/15278 Submitted by: Ahmed Benani <ahmed_benani@urbanet.ch>
* Remove the 'ivars' arguement to device_add_child() andmdodd1999-12-032-2/+2
| | | | | | | | | | | | | | | | device_add_child_ordered(). 'ivars' may now be set using the device_set_ivars() function. This makes it easier for us to change how arbitrary data structures are associated with a device_t. Eventually we won't be modifying device_t to add additional pointers for ivars, softc data etc. Despite my best efforts I've probably forgotten something so let me know if this breaks anything. I've been running with this change for months and its been quite involved actually isolating all the changes from the rest of the local changes in my tree. Reviewed by: peter, dfr
* If we have found pci devices via pci_cfgopen(), but don't find apeter1999-11-182-0/+28
| | | | | | | | host->pci bridge specifically, then add a pcib0 device on the motherboard for the pci bus to hang off. Requested by: Anders Andersson <anders@sanyusan.se> Obtained from: dfr
* Add text for the AMD-751 host-to-PCI and PCI-to-PCI (AGP) bridges.alc1999-10-252-0/+10
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* $Id$ -> $FreeBSD$peter1999-08-282-2/+2
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* Make the identify routine add itself with priority 100 to make sure itpeter1999-08-222-4/+12
| | | | | goes after the npx/apm devices and any other motherboard devices that may get added down the track.
* Hopefully fix the previous commit, it caused *all* bridges to be detectedpeter1999-08-102-12/+14
| | | | | | | | | | | | | | as PCI->HOST bridges on my (440BX) box. My change is to remove the test at the beginning entirely, letting the switch on the device ID happen first. If the device ID is unknown, then (in the default case) check for the generic PCIS_BRIDGE_HOST tag. This should allow wierd cases (eg: wpaul's IMS VL bridge) to work by using the id override. This strategy is more in line with the other PCI match methods we use elsewhere, I only have a limited testbed, but having my USB etc devices detected as PCI->HOST bridges doesn't look good.
* Fix nexus_pcib_is_host_bridge() so that it detects my 486's PCI buswpaul1999-08-092-6/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | correctly. It has the following code: if (class != PCIC_BRIDGE || subclass != PCIS_BRIDGE_HOST) return NULL; My 486 has an Integrated Micro Solutions PCI bridge which identifies itself as subclass PCIS_BRIDGE_OTHER, not PCIS_BRIDGE_HOST. Consequently, it gets ignored. In my opinion, the correct test should be: if ((class != PCIC_BRIDGE) && (subclass != PCIS_BRIDGE_HOST)) return NULL; That way the test still succeeds because the chip's class is PCIC_BRIDGE. Clearly it's not reasonable to expect all host to PCI bridges to always have a subclass of PCIS_BRIDGE_HOST since I've got one that doesn't. This way the sanity test should remain relatively sane while still allowing some oddball yet correct hardware to work. If somebody has a better way to do it, go ahead and tweak the test, but be aware that class == PCIC_BRIDGE and subclass == PCIS_BRIDGE_OTHER is a valid case. While I was here, I also added an explicit ID string for the IMS chipset. I also dealt with a minor style nit: it's bad karma not to have a default case for your switch statements, but the one in this routine doesn't have one. The default string of "Host to PCI bridge" is now assigned in a default case of the switch statement instead of initializing "s" with the string before the switch and then not having any default case.
* Don't probe if pci_cfgopen() fails to find pci hardware, like we used topeter1999-08-042-10/+8
| | | | | to. This might have caused interesting things on non-PCI hardware if PCI was compiled in.
* Add support for multiple PCI busses directly connected to the nexus.msmith1999-07-162-8/+360
| | | | | | | This is only partially complete, but allows 450NX-based systems with more than one PCI bus to be used again. Submitted by: dfr
* Move pcibus (host -> pci bus) probe/attach routines from nexuspeter1999-05-182-6/+94
| | | | | to pcibus.c. pci_cfgopen() becomes static and there are no more bus #ifdef's in nexus.c.
* Make the class code checks in function pci_cfgcheck less strict.se1997-12-202-4/+4
| | | | | | | | | It failed to recognize the PCI bus in a system that had only an old chip-set (class code 000000) and a Cyclom multiport serial card on PCI bus 0, but no VGA card or disk or network controller. PR: i386/5300 Submitted by: Nickolay N. Dudorov <nnd@itfs.nsk.su>
* Removed unused #includes.bde1997-07-202-4/+2
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