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path: root/sys/amd64/pci/pci_bus.c
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* Make the PCI code aware of PCI domains (aka PCI segments) so we canmarius2007-09-301-0/+5
* Revamp the MSI/MSI-X code a bit to achieve two main goals:jhb2007-05-021-4/+14
* Expand the MSI/MSI-X API to address some deficiencies in the MSI-X support.jhb2007-01-221-0/+1
* Give Host-PCI bridge drivers their own pcib_alloc_msi() andjhb2006-12-121-2/+24
* MD support for PCI Message Signalled Interrupts on amd64 and i386:jhb2006-11-131-0/+4
* MFi386: rename pcib_devclass to hostb_devclass (cosmetic here)peter2006-03-131-2/+2
* - Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all thejhb2006-01-061-11/+3
* Move the hostb driver out of the i386 and amd64 PCI code (where it wasjhb2005-12-201-58/+0
* MFi386: pci attribute allocation fixes.imp2005-09-181-1/+3
* Begin all license/copyright comments with /*-imp2005-01-051-1/+1
* Add TUNABLE_LONG and TUNABLE_ULONG, and use the latter for thedes2004-10-311-4/+3
* Whitespace cleanupdes2004-10-311-5/+5
* MFi386: sync with latest updatespeter2004-10-111-3/+36
* Add missing <sys/module.h> instances which were shadowed by the nestedphk2004-06-031-0/+1
* MFi386: numerous interrupt and acpi updatespeter2004-05-161-1/+1
* Drastically clean up the legacy host-pci bridge table. We don't needpeter2004-03-131-208/+5
* Various whitespace and cosmetic sync-up's with i386.peter2003-12-061-2/+2
* Initial landing of SMP support for FreeBSD/amd64.peter2003-11-171-1/+1
* GC unused child variablepeter2003-09-231-2/+1
* MFi386 pci_bus.c 1.102 legacyvar.h 1.4: rename nexus_pcib to legacy_pcibpeter2003-09-231-51/+53
* - Rename PCIx_HEADERTYPE* to PCIx_HDRTYPE* so the constants aren't so long.jhb2003-08-281-2/+10
* Prefer new location of pci include files (which have only been in theimp2003-08-221-3/+3
* Use __FBSDID().obrien2003-07-251-3/+3
* Commit MD parts of a loosely functional AMD64 port. This is based onpeter2003-05-011-69/+3
* Initiate de-orbit burn for USE_PCI_BIOS_FOR_READ_WRITE. This has beenpeter2003-02-181-18/+0
* Outdent the string rather than use concatenation.phk2002-12-231-2/+2
* Recognize the Serverworks CIOB30 host to pci bridge.peter2002-11-131-0/+5
* Revert last commit, there actually was a -1 waaaaay down in pcireg_cfgread().phk2002-10-201-0/+2
* "id" is never going to be -1 when it is unsigned.phk2002-10-201-2/+0
* Use the global pcib devclass instead of our own static copy.jhb2002-10-161-2/+0
* Add 2 Ids for new ServerWorks host to PCI bridge chipset.iwasaki2002-10-021-0/+8
* Now that we only probe host-PCI bridges once, we no longer have to check tojhb2002-09-231-10/+0
* Change the nexus_pcib driver (eventually to be renamed to legacy_pcib) tojhb2002-09-231-7/+7
* #include "opt_bla.h" goes first says Bruce.phk2002-09-091-2/+2
* Fix style(9) bugs.phk2002-09-081-2/+2
* Add a subclass of the PCI-PCI bridge driver that uses the PCIBIOS tojhb2002-09-061-2/+69
* - Add a pci_cfgintr_valid() function to see if a given IRQ is a validjhb2002-09-061-1/+2
* Prefer the physical bus number of the PCI bus as the unit of the pciXjhb2002-09-061-1/+1
* Change the support for AMDs ElanSC520 CPU from being a device driver tophk2002-09-041-0/+7
* Move a prototype to the least wrong place.phk2002-08-021-0/+1
* Add support for probing secondary buses on the ServerWorks Grand Championgallatin2002-07-191-0/+11
* Add initialization code for the AMD Elan sc520 which maps the MMCRphk2002-07-181-0/+2
* Add an entry for the AMD Elan SC520 hostbridge. I do not belive we canphk2002-07-181-0/+3
* Fix a PNPID in a commentimp2002-04-241-1/+1
* Major rework of the iicbus/smbus framework:nsouch2002-03-231-0/+13
* Add identification string for AMD-761 host to PCI bridge.murray2001-12-101-0/+3
* Detect a certain type of PCIBIOS brain damage. For some reason,peter2001-08-211-0/+18
* Next phase in the PCI subsystem cleanup.msmith2000-12-081-2/+2
* Hack to work around a probe which will lock up at least some i450GX-basedmsmith2000-11-081-1/+5
* Return -10000 in pci_hostb_probe to allow agp driver (disabled otherwise)ache2000-10-201-1/+1
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