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* Fix copyright comment & FBSDID style nits.obrien2003-08-251-2/+1
| | | | Requested by: bde
* Further cleanup <machine/cpu.h> and <machine/md_var.h>: move the MImarcel2003-08-162-3/+3
| | | | | | | | | | | | | | | | | | | prototypes of cpu_halt(), cpu_reset() and swi_vm() from md_var.h to cpu.h. This affects db_command.c and kern_shutdown.c. ia64: move all MD prototypes from cpu.h to md_var.h. This affects madt.c, interrupt.c and mp_machdep.c. Remove is_physical_memory(). It's not used (vm_machdep.c). alpha: the MD prototypes have been left in cpu.h with a comment that they should be there. Moving them is left for later. It was expected that the impact would be significant enough to be done in a seperate commit. powerpc: MD prototypes left in cpu.h. Comment added. Suggested by: bde Tested with: make universe (pc98 incomplete)
* - Fix a duplicated typo.jhb2003-08-151-3/+3
| | | | | | - Add a macro for the logical shift needed to extract an APIC ID from either from the local APIC ICR Hi register or the APIC ID registers of the local and IO APICs.
* Expand inline the relevant parts of src/COPYRIGHT for Matt Dillon'simp2003-08-121-2/+24
| | | | | | copyrighted files. Approved by: Matt Dillon
* Halted CPU's should not accumulate time.ps2003-08-121-6/+6
| | | | Reviewed by: jhb
* - Since td_critnest is now initialized in MI code, it doesn't have to bejhb2003-08-041-2/+0
| | | | | | set in cpu_critical_fork_exit() anymore. - As far as I can tell, cpu_thread_link() has never been used, not even when it was originally added, so remove it.
* Fix a dumbass mistake. I had the 'set' and 'get' reversed in thepeter2003-08-021-2/+2
| | | | fpsetround/fpgetround macro pairs.
* KSTACK_PAGES is a global option.peter2003-07-311-0/+2
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* - Introduce a new busdma flag BUS_DMA_ZERO to request for zero'edmux2003-07-271-0/+1
| | | | | | | memory in bus_dmamem_alloc(). This is possible now that contigmalloc() supports the M_ZERO flag. - Remove the locking of Giant around calls to contigmalloc() since contigmalloc() now grabs Giant itself.
* Use macros from apic.h to when writing to the ICR to send IPIs to startupjhb2003-07-231-5/+12
| | | | | | APs rather than magic numbers. Tested by: scottl
* Add a new macro APIC_ICRLO_RESV_MASK that contains all of the reservedjhb2003-07-231-0/+1
| | | | | | | | fields in the low 32 bits of the local APIC ICR register. Use this macro in place of APIC_RESV2_MASK when masking off existing bits from the ICR when writing to it to send an IPI. Tested by: scottl
* Go back to 64 bit precision for fadd/fsub/fsqrt etc. This is because onpeter2003-07-222-16/+18
| | | | | | | AMD64, gcc (and the ABI) expects the x87 unit to be running in 80/64 mode (not 64/53) so that it can use it for 'long double' operations. It takes the expected precision differences into account when generating code.
* Extend the machine/ieeefp.h that was inherited from i386 to supportpeter2003-07-221-55/+165
| | | | | | | | | the SSE mxcsr register as well. Since gcc will intermix SSE2 and x87 FP code, the fpsetround() etc mode had better be the same. There are hooks to enable these inlines to be instantiated inside libc for non-gcc or C++ callers. (g++ doesn't like the inlines that tried to extract an integer and convert it to an enum).
* Protect lint(1) from a #error.markm2003-07-101-0/+2
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* unifdef -DLAZY_SWITCH and start to tidy up the associated glue.peter2003-07-101-3/+0
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* Fix the VADDR() macros to use either KVADDR() or UVADDR(), dependingpeter2003-07-092-17/+21
| | | | | | | | | | on the implied sign extension. The single unified VADDR() macro was not able to avoid sign extending the VM_MAXUSER_ADDRESS/USRSTACK values. Be explicit about UVADDR() (positive address space) and KVADDR() (kernel negative address space) to make mistakes show up more spectacularly. Increase user VM space from 1/2TB (512GB) to 128TB.
* Mega busdma API commit.scottl2003-07-011-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg. Lockfunc allows a driver to provide a function for managing its locking semantics while using busdma. At the moment, this is used for the asynchronous busdma_swi and callback mechanism. Two lockfunc implementations are provided: busdma_lock_mutex() performs standard mutex operations on the mutex that is specified from lockfuncarg. dftl_lock() is a panic implementation and is defaulted to when NULL, NULL are passed to bus_dma_tag_create(). The only time that NULL, NULL should ever be used is when the driver ensures that bus_dmamap_load() will not be deferred. Drivers that do not provide their own locking can pass busdma_lock_mutex,&Giant args in order to preserve the former behaviour. sparc64 and powerpc do not provide real busdma_swi functions, so this is largely a noop on those platforms. The busdma_swi on is64 is not properly locked yet, so warnings will be emitted on this platform when busdma callback deferrals happen. If anyone gets panics or warnings from dflt_lock() being called, please let me know right away. Reviewed by: tmm, gibbs
* - Construct a cpu topology map for Hyper Threading systems so that ULE mayjeff2003-06-281-0/+31
| | | | take advantage of them.
* Move KERNBASE to -2GB.simokawa2003-06-221-1/+1
| | | | Currently, we cannot increase KVA more than 2GB.
* Migrate the thread stack management functions from the machine-dependentalc2003-06-141-1/+1
| | | | | | | | | | | | | | | | to the machine-independent parts of the VM. At the same time, this introduces vm object locking for the non-i386 platforms. Two details: 1. KSTACK_GUARD has been removed in favor of KSTACK_GUARD_PAGES. The different machine-dependent implementations used various combinations of KSTACK_GUARD and KSTACK_GUARD_PAGES. To disable guard page, set KSTACK_GUARD_PAGES to 0. 2. Remove the (unnecessary) clearing of PG_ZERO in vm_thread_new. In 5.x, (but not 4.x,) PG_ZERO can only be set if VM_ALLOC_ZERO is passed to vm_page_alloc() or vm_page_grab().
* - Document the thermal and performance counter LVT entries in the localjhb2003-06-061-3/+5
| | | | | | APIC. - Add a lvt_thermal member to the LAPIC struct. - Add constants for the SMI and INIT LVT delivery modes.
* Fix ALIGNED_POINTER(). sizeof((u_int32_t)) is not legal C.peter2003-06-041-1/+1
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* Make this more compatable with libc_r. Make the internal types for storingpeter2003-06-021-3/+3
| | | | registers an array of longs rather than int.
* Use __FBSDID().obrien2003-06-021-1/+3
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* MFi386: i386/include/asm.h rev 1.11: Do not abuse ##.peter2003-06-021-1/+1
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* Use C99 compatable asm statements.obrien2003-06-021-2/+2
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* With the help of jhb, fix the ACPI_ACQUIRE_GLOBAL_LOCK() macros andpeter2003-05-311-28/+9
| | | | | | port to amd64 after repocopy. Approved by: re (amd64/*)
* Rename BUS_DMAMEM_NOSYNC to BUS_DMA_COHERENT.hmp2003-05-301-1/+1
| | | | | | | | | | | | | | | | | The current name is confusing, because it indicates to the client that a bus_dmamap_sync() operation is not necessary when the flag is specified, which is wrong. The main purpose of this flag is to hint the underlying architecture that DMA memory should be mapped in a coherent way, but the architecture can ignore it. But if the architecture does supports coherent mapping of memory, then it makes bus_dmamap_sync() calls cheap. This flag is the same as the one in NetBSD's Bus DMA. Reviewed by: gibbs, scottl, des (implicitly) Approved by: re@ (jhb)
* Initial port to amd64 after repocopy from i386. Note that thepeter2003-05-301-6/+6
| | | | | | | | | disassembler has not been updated yet, and will do some very strange things. It does tracebacks (without function arguments due to regparm calling conventions) if -fno-omit-frame-pointer is used (to come later). This achieves basic functionality. Approved by: re (amd64/* blanket)
* Bring back bus_dmasync_op_t. It is now a typedef to an int, though thescottl2003-05-271-1/+2
| | | | | | | | BUS_DMASYNC_ definitions remain as before. The does not change the ABI, and reverts the API to be a bit more compatible and flexible. This has survived a full 'make universe'. Approved by: re (bmah)
* De-orbit bus_dmamem_alloc_size(). It's a hack and was never used anyways.scottl2003-05-261-6/+0
| | | | | | No need for it to pollute the 5.x API any further. Approved by: re (bmah)
* Stop profiled libc from exploding, matching gcc's generated code.peter2003-05-241-4/+0
| | | | Approved by: re (amd64/* blanket)
* Typo fix. oops.peter2003-05-231-1/+1
| | | | | Submitted by: jmallett Approved by: re (blanket amd64/*)
* Update comments. Note that the kernel is at -1GB, not -2GB as erroniouslypeter2003-05-231-3/+3
| | | | | | | implied by the previous commit. KVM is still only 1GB until pmap_growkernel() learns about the extra page table level. Approved by: re (blanket)
* As suggested by the gdb folks, pad the 'struct fpreg' to a full 512 bytespeter2003-05-231-0/+1
| | | | | to match the native fxsave/fxrstor object size since thats apparently what the Linux/NetBSD folks do.
* Major pmap rework to take advantage of the larger address space on amd64peter2003-05-234-71/+68
| | | | | | | | | | | | | | | | | | | | | | | | | systems. Of note: - Implement a direct mapped region using 2MB pages. This eliminates the need for temporary mappings when getting ptes. This supports up to 512GB of physical memory for now. This should be enough for a while. - Implement a 4-tier page table system. Most of the infrastructure is there for 128TB of userland virtual address space, but only 512GB is presently enabled due to a mystery bug somewhere. The design of this was heavily inspired by the alpha pmap.c. - The kernel is moved into the negative address space(!). - The kernel has 2GB of KVM available. - Provide a uma memory allocator to use the direct map region to take advantage of the 2MB TLBs. - Fixed some assumptions in the bus_space macros about the ability to fit virtual addresses in an 'int'. Notable missing things: - pmap_growkernel() should be able to grow to 512GB of KVM by expanding downwards below kernbase. The kernel must be at the top 2GB of the negative address space because of gcc code generation strategies. - need to fix the >512GB user vm code. Approved by: re (blanket)
* sys/sys/limits.h:kan2003-05-192-3/+3
| | | | | | | | | | | | | | | - Fix visibilty test for LONG_BIT and WORD_BIT. `#if defined(__FOO_VISIBLE)' is alays wrong because __FOO_VISIBLE is always defined (to 0 for invisibility). sys/<arch>/include/limits.h sys/<arch>/include/_limits.h: - Style fixes. Submitted by: bde Reviewed by: bsdmike Approved by: re (scottl)
* Initialize logical_cpus_mask when the logical CPUs are enumerated inalc2003-05-151-2/+5
| | | | | | | | the mptable. (Previously, logical_cpus_mask was only initialized if the hyperthreading fixup was executed.) Approved by: re (jhb) Reviewed by: ps
* Collect the nastiness for preserving the kernel MSR_GSBASE around thepeter2003-05-152-1/+36
| | | | | | | | | | load_gs() calls into a single place that is less likely to go wrong. Eliminate the per-process context switching of MSR_GSBASE, because it should be constant for a single cpu. Instead, save/restore it during the loading of the new %gs selector for the new process. Approved by: re (amd64/* blanket)
* Use compile time constants for things like PTmap[] etc because they'repeter2003-05-151-7/+3
| | | | | | | about to move outside of the +/- 2GB range Suggested by: jake Approved by: re (amd64/* blanket)
* Add BASIC i386 binary support for the amd64 kernel. This is largelypeter2003-05-145-4/+35
| | | | | | | | | | | | | | | | | | | | | | stolen from the ia64/ia32 code (indeed there was a repocopy), but I've redone the MD parts and added and fixed a few essential syscalls. It is sufficient to run i386 binaries like /bin/ls, /usr/bin/id (dynamic) and p4. The ia64 code has not implemented signal delivery, so I had to do that. Before you say it, yes, this does need to go in a common place. But we're in a freeze at the moment and I didn't want to risk breaking ia64. I will sort this out after the freeze so that the common code is in a common place. On the AMD64 side, this required adding segment selector context switch support and some other support infrastructure. The %fs/%gs etc code is hairy because loading %gs will clobber the kernel's current MSR_GSBASE setting. The segment selectors are not used by the kernel, so they're only changed at context switch time or when changing modes. This still needs to be optimized. Approved by: re (amd64/* blanket)
* For the page fault handler, save %cr2 in the outer trap handler so thatpeter2003-05-122-0/+4
| | | | | | | | | we do not have to run so long with interrupts disabled. This involved creating tf_addr in the trapframe. Reorganize the trap stubs so that they consistently reserve the stack space and initialize any missing bits. Approved by: re (amd64 stuff)
* Sync ucontext with reality. The struct trapframe changes need to bepeter2003-05-121-11/+11
| | | | | | reflected here. Approved by: re (blanket amd64/*)
* AMD64 physical space is much larger than i386, de-i386 the bus_space andpeter2003-05-126-1373/+157
| | | | | | | | bus_dma MD code for AMD64. (And a trivial ifdef update in dev/kbd because of this). More updates are needed here to take advantage of the 64 bit instructions. Approved by: re (blanket amd64/*)
* Give a %fs and %gs to userland. Use swapgs to obtain the kernel %GS.basepeter2003-05-122-1/+21
| | | | | | | | | | | | | | | | | value on entry and exit. This isn't as easy as it sounds because when we recursively trap or interrupt, we have to avoid duplicating the swapgs instruction or we end up back with the userland %gs. I implemented this by testing TF_CS to see if we're coming from supervisor mode already, and check for returning to supervisor. To avoid a race with interrupts in the brief period after beginning executing the handler and before the swapgs, convert all trap gates to interrupt gates, and reenable interrupts immediately after the swapgs. I am not happy with this. There are other possible ways to do this that should be investigated. (eg: storing the GS.base MSR value in the trapframe) Add some sysarch functions to let the userland code get to this. Approved by: re (blanket amd64/*)
* Make atdevbase long for the KERNBASE > 4GB casepeter2003-05-111-1/+1
| | | | Approved by: re (amd64/* blanket)
* Provide a fake varargs implementation for lint's benefit. This waypeter2003-05-102-0/+17
| | | | | | it can see the intent of the va_* macros, even though it cannot work. Approved by: re (blanket amd64/*)
* Remove _ARCH_INDIRECT ifdefs. They existed for lib/msun/* on i386, whichpeter2003-05-101-63/+0
| | | | | | | | could use different versions of the math code depending on whether there was real floating point hardware or math emulation. Since the fpu is part of the core specification on amd64, there is no need for this here. Approved by: re (blanket amd64/*)
* bcopyb() isn't used on amd64 kernel (it only exists for i386/pcvt)peter2003-05-101-1/+0
| | | | Approved by: re (blanket amd64/*)
* Include the MXCSR initial values, based on the AMD docs. This filepeter2003-05-092-0/+4
| | | | | | should really be renamed to fpu.h and npx.c to fpu.c since its part of the core architecture on amd64 systems, not an isa 'numeric processor extension'.
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