| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Handling all the three clocks (hardclock, softclock, profclock) with the | attilio | 2010-01-15 | 1 | -1/+7 |
| * | Use io(4) for I/O port access on ia64, rather than through sysarch(2). | marcel | 2010-01-11 | 1 | -0/+1 |
| * | Quiet variable "shadows" warning: | obrien | 2010-01-01 | 1 | -18/+18 |
| * | mca: improve status checking, recording and reporting | avg | 2009-12-02 | 1 | -0/+1 |
| * | x86 cpu features: add MOVBE reporting and flag | avg | 2009-11-30 | 1 | -0/+1 |
| * | Uppercase the UL suffix on a constant, so Flexelint doesn't worry that | phk | 2009-11-16 | 1 | -1/+1 |
| * | Amd64 init_secondary() calls initializecpu() while curthread is still | kib | 2009-11-13 | 1 | -0/+1 |
| * | Add a facility for associating optional descriptions with active interrupt | jhb | 2009-10-15 | 1 | -0/+1 |
| * | Define architectural load bases for PIE binaries. Addresses were selected | kib | 2009-10-10 | 1 | -0/+6 |
| * | atomic_cmpset_barr_* was added in order to cope with compilers willing to | attilio | 2009-10-09 | 1 | -32/+44 |
| * | - All the functions in atomic.h needs to be in "physical" form (like | attilio | 2009-10-06 | 1 | -46/+29 |
| * | Per their definition, atomic instructions used in conjuction with | attilio | 2009-10-06 | 1 | -46/+67 |
| * | cpufunc.h: unify/correct style of c extension names | avg | 2009-09-30 | 1 | -3/+3 |
| * | Copy apm(4) emulation from sys/i386/acpica/acpi_machdep.c and | jkim | 2009-09-27 | 1 | -0/+264 |
| * | Extract the code to find and map the MADT ACPI table during early kernel | jhb | 2009-09-23 | 1 | -0/+3 |
| * | Add a new sysctl for reporting all of the supported page sizes. | alc | 2009-09-18 | 1 | -0/+2 |
| * | Consolidate CPUID to CPU family/model macros for amd64 and i386 to reduce | jkim | 2009-09-10 | 1 | -2/+2 |
| * | Get rid of the _NO_NAMESPACE_POLLUTION kludge by creating an | phk | 2009-09-08 | 2 | -14/+56 |
| * | Move multi-include protection back up to the top of the file and | phk | 2009-09-08 | 1 | -4/+4 |
| * | Adjust the handling of the local APIC PMC interrupt vector: | jhb | 2009-08-14 | 2 | -1/+3 |
| * | * Completely Remove the option STOP_NMI from the kernel. This option | attilio | 2009-08-13 | 2 | -9/+2 |
| * | When the page caching attributes are changed, after new mapping is | kib | 2009-07-22 | 2 | -0/+15 |
| * | Add support to the virtual memory system for configuring machine- | alc | 2009-07-12 | 2 | -8/+11 |
| * | Restore the segment registers and segment base MSRs for amd64 syscall | kib | 2009-07-09 | 1 | -1/+2 |
| * | Cleanup ALIGNED_POINTER: | sam | 2009-07-05 | 1 | -10/+7 |
| * | Improve the handling of cpuset with interrupts. | jhb | 2009-07-01 | 1 | -1/+1 |
| * | Correct the #endif comment. | alc | 2009-06-26 | 1 | -1/+1 |
| * | This change is the next step in implementing the cache control functionality | alc | 2009-06-26 | 1 | -0/+45 |
| * | Fix kernels compiled without SMP support. Make intr_next_cpu() available | jhb | 2009-06-25 | 1 | -2/+0 |
| * | - Restore the behavior of pre-allocating IDT vectors for MSI interrupts. | jhb | 2009-06-25 | 1 | -0/+3 |
| * | Eliminate dead code. These definitions should have been deleted with the | alc | 2009-06-22 | 1 | -10/+0 |
| * | Now that amd64's kernel map is 512GB (SVN rev 192216), there is no reason | alc | 2009-06-08 | 1 | -9/+0 |
| * | Bump CACHE_LINE_SIZE to 128 for x86. Intel's manuals explicitly recommend | jhb | 2009-05-18 | 1 | -1/+1 |
| * | correct range in comment | kmacy | 2009-05-16 | 1 | -1/+1 |
| * | update vm map comment | kmacy | 2009-05-16 | 1 | -1/+0 |
| * | Increase default kernel map to 512GB | kmacy | 2009-05-16 | 1 | -2/+2 |
| * | FreeBSD right now support 32 CPUs on all the architectures at least. | attilio | 2009-05-14 | 1 | -4/+4 |
| * | Implement simple machine check support for amd64 and i386. | jhb | 2009-05-13 | 2 | -0/+76 |
| * | Fix XENHVM build. | dfr | 2009-05-06 | 1 | -1/+1 |
| * | Rename statclock_disable variable to atrtcclock_disable that it actually is, | mav | 2009-05-03 | 1 | -1/+0 |
| * | Add support for using i8254 and rtc timers as event sources for amd64 SMP | mav | 2009-05-02 | 2 | -1/+10 |
| * | - Add support for cpuid leaf 0xb. This allows us to determine the | jeff | 2009-04-29 | 2 | -4/+7 |
| * | Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing | rwatson | 2009-04-20 | 1 | -2/+0 |
| * | Add description and cautionary note regarding CACHE_LINE_SIZE. | rwatson | 2009-04-19 | 1 | -0/+4 |
| * | For each architecture, define CACHE_LINE_SHIFT and a derived | rwatson | 2009-04-19 | 1 | -0/+4 |
| * | A simple rewrite of biossmap.c: | jkim | 2009-04-15 | 2 | -0/+5 |
| * | Simplify in/out functions (for i386 and AMD64). | ed | 2009-04-11 | 1 | -79/+8 |
| * | Also remove the unused __word_swap_int*() macros. | ed | 2009-04-08 | 1 | -19/+0 |
| * | Implement __bswap16() without using inline assembly. | ed | 2009-04-08 | 1 | -22/+1 |
| * | Don't explicitly force ecx to be used for MSR_FSBASE/MSR_GSBASE. | ed | 2009-04-07 | 1 | -10/+4 |
