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* Bump CACHE_LINE_SIZE to 128 for x86. Intel's manuals explicitly recommendjhb2009-05-181-1/+1
* correct range in commentkmacy2009-05-161-1/+1
* update vm map commentkmacy2009-05-161-1/+0
* Increase default kernel map to 512GBkmacy2009-05-161-2/+2
* FreeBSD right now support 32 CPUs on all the architectures at least.attilio2009-05-141-4/+4
* Implement simple machine check support for amd64 and i386.jhb2009-05-132-0/+76
* Fix XENHVM build.dfr2009-05-061-1/+1
* Rename statclock_disable variable to atrtcclock_disable that it actually is,mav2009-05-031-1/+0
* Add support for using i8254 and rtc timers as event sources for amd64 SMPmav2009-05-022-1/+10
* - Add support for cpuid leaf 0xb. This allows us to determine thejeff2009-04-292-4/+7
* Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizingrwatson2009-04-201-2/+0
* Add description and cautionary note regarding CACHE_LINE_SIZE.rwatson2009-04-191-0/+4
* For each architecture, define CACHE_LINE_SHIFT and a derivedrwatson2009-04-191-0/+4
* A simple rewrite of biossmap.c:jkim2009-04-152-0/+5
* Simplify in/out functions (for i386 and AMD64).ed2009-04-111-79/+8
* Also remove the unused __word_swap_int*() macros.ed2009-04-081-19/+0
* Implement __bswap16() without using inline assembly.ed2009-04-081-22/+1
* Don't explicitly force ecx to be used for MSR_FSBASE/MSR_GSBASE.ed2009-04-071-10/+4
* Garbage collect unused stack segment since r190620.jkim2009-04-011-1/+0
* Sync definitions for struct sigcontext for i386 and amd64 architectureskib2009-04-011-3/+11
* Save and restore segment registers on amd64 when entering and leavingkib2009-04-018-9/+73
* Add separate gdt descriptors for %fs and %gs on amd64.kib2009-04-011-9/+13
* Fully enumerate all i386 sysarch commands an amd64 include file.kib2009-04-011-0/+21
* Add all segment registers for the amd64 CPU to struct reg and mcontext.kib2009-04-012-6/+26
* Provide convenient definition of the union descriptor, similar to thekib2009-04-011-0/+17
* Update stale comments. The alternate address space mapping was eliminatedalc2009-03-221-7/+1
* In general, the kernel virtual address of the pml4 page table page that isalc2009-03-221-0/+4
* Add AT_EXECPATH ELF auxinfo entry type. The value's a_ptr is a pointerkib2009-03-171-4/+2
* Initial suspend/resume support for amd64.jkim2009-03-173-0/+17
* Merge in support for Xen HVM on amd64 architecture.dfr2009-03-117-1/+1292
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| * Clone Kip's Xen on stable/6 tree so that I can work on improving FreeBSD/amd64dfr2008-11-2273-9462/+0
| * MFC: Add the optional nvram(4) device. As with 7.x, this device is offjhb2008-08-011-1/+2
| * MFC: 180149 / 1.49.2.1 (which was MFC of r180109 / rev 1.53)obrien2008-07-011-2/+11
| * MFC: Add constants for the different memory types in the SMAP table andjhb2008-03-211-2/+8
| * MFC: Use a runtime mask for the PhysBase and PhysMask fields in variablejhb2008-03-191-2/+2
| * MFC: Add constants for the various fields in MTRR registers and applyjhb2008-03-191-0/+15
| * MFC GET_STACK_USAGE() macro to be used for netgraph stack protection.mav2008-02-061-0/+13
| * MFC: Always assume type #1 PCI config transactions for amd64 and relax thejhb2007-12-061-5/+0
| * MFC: sys/amd64/include/elf.h 1.19; sys/arm/include/elf.h 1.8;marius2007-12-031-25/+0
| * MFC: Handle CPUs with APIC IDs higher than 32.jhb2007-10-051-0/+1
| * MFC: whitespace changes from HEADdes2007-09-281-76/+76
| * MFC: synch with HEAD, minus whitespace changes.des2007-09-281-3/+14
| * MFC: Partial MFC of earlier minor fixes and tweaks to x86 interrupt code:jhb2007-08-151-3/+3
| * MFC: Revamp the MSI/MSI-X code a bit to achieve two main goals:jhb2007-08-151-2/+2
| * MFC Revision 1.531 of pmap.c:alc2007-05-061-0/+1
| * MFC: Initial PAT support including the following:jhb2007-05-021-0/+5
| * MFC: Add various constants for the PAT MSR and the PAT PTE and PDE flagsjhb2007-05-022-0/+15
| * MFC: Add 'pmap_invalidate_cache()'.jhb2007-05-023-2/+6
| * MFC: PCI MSI support for amd64 and i386.jhb2007-03-312-4/+19
| * MFC: Fix GDB_BUFSZ.jhb2007-02-081-1/+1
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