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* Some cleanups and tweaks to some of the atomic.h files in preparation forjhb2005-07-091-79/+63
| | | | | | | | | | | | | | | further changes and fixes in the future: - Use aliases via macros rather than duplicated inlines wherever possible. - Move all the aliases to the bottom of these files and the inline functions to the top. - Add various comments. - On alpha, drop atomic_{load_acq,store_rel}_{8,char,16,short}(). - On i386 and amd64, don't duplicate the extern declarations for functions in the two non-inline cases (KLD_MODULE and compiler doesn't do inlines), instead, consolidate those two cases. - Some whitespace fixes. Approved by: re (scottl)
* Check the alignment of the IP header before passing the packet up to thethompsa2005-07-021-0/+2
| | | | | | | | | | | | | | | | | | | packet filter. This would cause a panic on architectures that require strict alignment such as sparc64 (tier1) and ia64/ppc (tier2). This adds two new macros that check the alignment, these are compile time dependent on __NO_STRICT_ALIGNMENT which is set for i386 and amd64 where alignment isn't need so the cost is avoided. IP_HDR_ALIGNED_P() IP6_HDR_ALIGNED_P() Move bridge_ip_checkbasic()/bridge_ip6_checkbasic() up so that the alignment is checked for ipfw and dummynet too. PR: ia64/81284 Obtained from: NetBSD Approved by: re (dwhite), mlaier (mentor)
* Switch AMD64 and i386 platforms to using ELF as their kernel crashpeter2005-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | dump format. The key reason to do this is so that we can dump sparse address space. For example, we need to be able to skip the PCI hole just below the 4GB boundary. Trying to destructively dump MMIO device registers is Really Bad(TM). The frequent result of trying to do a crash dump on a machine with 4GB or more ram was ugly (lockup or reboot). This code has been taken directly from the IA64 dump_machdep.c code, with just a few (mostly minor) mods. Introduce a dump_avail[] array in the machdep.c code so that we have a source of truth for what memory is present in a machine that needs to be dumped. We can't use phys_avail[] because all sorts of things slice memory out of it that we really need to dump. eg: the vm page array and the dmesg buffer. dump_avail[] is pretty much an unmolested version of phys_avail[]. It does have Maxmem correction. Bump the i386 and amd64 dump format to version 2, but nothing actually uses this. amd64 was actually using the i386 dump version number. libkvm support to follow. Approved by: re
* Increase MAXCPU to 16 in SMP kernels so that APIC IDs from 0 to 15 arejhb2005-06-291-1/+1
| | | | | | | | allowed for CPUs. Tested by: amd64 at cybernetwork dot org Approved by: re (scottl) MFC after: 1 week
* MFP4:jkoshy2005-06-091-32/+19
| | | | | | | | | | | | | | | | - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
* Add IPI support for preempting a thread on another CPU.ups2005-06-091-1/+2
| | | | MFC after: 3 weeks
* Remove bus_{mem,p}io.h and related code for a micro-optimization on i386nyan2005-05-293-342/+42
| | | | | | and amd64. The optimization is a trivial on recent machines. Reviewed by: -arch (imp, marcel, dfr)
* Change the spkr_set_pitch() function to a macro to fix low level profiling.nyan2005-05-281-7/+5
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* MFi386: remove commentpeter2005-05-221-3/+0
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* - Move timerreg.h to <arch>/include and split i8253 specific defines intonyan2005-05-142-0/+116
| | | | | | | | | i8253reg.h, and add some defines to control a speaker. - Move PPI related defines from i386/isa/spkr.c into ppireg.h and use them. - Move IO_{PPI,TIMER} defines into ppireg.h and timerreg.h respectively. - Use isa/isareg.h rather than <arch>/isa/isa.h. Tested on: i386, pc98
* Add a knob for disabling/enabling HTT, "machdep.hyperthreading_allowed".nectar2005-05-131-0/+8
| | | | | | | Default off due to information disclosure on multi-user systems. Submitted by: cperciva Reviewed by: jhb
* Implement an alternate method to stop CPUs when entering DDB. Normally we usedwhite2005-04-301-0/+5
| | | | | | | | | | | | | | a regular IPI vector, but this vector is blocked when interrupts are disabled. With "options KDB_STOP_NMI" and debug.kdb.stop_cpus_with_nmi set, KDB will send an NMI to each CPU instead. The code also has a context-stuffing feature which helps ddb extract the state of processes running on the stopped CPUs. KDB_STOP_NMI is only useful with SMP and complains if SMP is not defined. This feature only applies to i386 and amd64 at the moment, but could be used on other architectures with the appropriate MD bits. Submitted by: ups
* o Reverse the inclusion chain from MD->MI to MI->MD by removing themarcel2005-04-201-1/+1
| | | | | | | | | inclusion of <sys/pmc.h> and depending on being included from that header file. o Include any MD specific header files that otherwise need to be included from MI files. Ok'd: jkoshy@
* Bring a working snapshot of hwpmc(4), its associated libraries, userland ↵jkoshy2005-04-191-0/+76
| | | | | | | | | | utilities and documentation into -CURRENT. Bump FreeBSD_version. Reviewed by: alc, jhb (kernel changes)
* Break out the definition of bus_space_{tag,handle}_t and a few other typesimp2005-04-182-9/+47
| | | | | | | | | | into _bus.h to help with name space polution from including all of bus.h. In a few days, I'll commit changes to the MI code to take advantage of thse sepration (after I've made sure that these changes don't break anything in the main tree, I've tested in my trees, but you never know...). Suggested by: bde (in 2002 or 2003 I think) Reviewed in principle by: jhb
* MFi386: use the lapic timer for UP systems that are using the apic so thatpeter2005-04-151-1/+0
| | | | | IRQ0 and mixed mode isn't a problem anymore. This removes mixed mode support because nothing is left that uses it.
* MFi386: use c99 typespeter2005-04-151-2/+2
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* Show that I can actually count.peter2005-04-151-2/+2
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* MFi386: track bus.h changes (unsplit bus_${machine}.h)peter2005-04-152-1233/+1219
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* Implement 32-bit compatable fsbase/gsbase methods so that we can runpeter2005-04-141-0/+5
| | | | (newer) unmodified static i386 binaries again.
* The memory operands to fldcw and ldmxcsr are inputs, not outputs.jhb2005-04-121-2/+2
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* Align the entry point to assembly language functions to a 16-byte boundary.alc2005-04-101-2/+1
| | | | | (The Opteron's instruction fetcher reads instructions from the L1 cache in 16-byte, aligned packets.)
* Fully initialize the required TSS fields so that the io permissioncperciva2005-04-061-1/+0
| | | | | | | bitmap is set correctly. Patch from: peter Security: FreeBSD-SA-05:03.amd64
* Divorce critical sections from spinlocks. Critical sections as denoted byjhb2005-04-042-88/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | critical_enter() and critical_exit() are now solely a mechanism for deferring kernel preemptions. They no longer have any affect on interrupts. This means that standalone critical sections are now very cheap as they are simply unlocked integer increments and decrements for the common case. Spin mutexes now use a separate KPI implemented in MD code: spinlock_enter() and spinlock_exit(). This KPI is responsible for providing whatever MD guarantees are needed to ensure that a thread holding a spin lock won't be preempted by any other code that will try to lock the same lock. For now all archs continue to block interrupts in a "spinlock section" as they did formerly in all critical sections. Note that I've also taken this opportunity to push a few things into MD code rather than MI. For example, critical_fork_exit() no longer exists. Instead, MD code ensures that new threads have the correct state when they are created. Also, we no longer try to fixup the idlethreads for APs in MI code. Instead, each arch sets the initial curthread and adjusts the state of the idle thread it borrows in order to perform the initial context switch. This change is largely a big NOP, but the cleaner separation it provides will allow for more efficient alternative locking schemes in other parts of the kernel (bare critical sections rather than per-CPU spin mutexes for per-CPU data for example). Reviewed by: grehan, cognet, arch@, others Tested on: i386, alpha, sparc64, powerpc, arm, possibly more
* The file machine/ieeefp.h needs sys/cdefs.h on amd64 and i386 after mynetchild2005-04-021-0/+1
| | | | | | | | | | | | | compiler features tests. This is ok, since machine/ieeefp.h is an internal interface. But floatingpoint.h is a public interface and some ports use it, so include sys/cdefs.h in the amd64 and i386 version of floatingpoint.h. Note: some architectures don't provide recursive inclusion protection in floatingpoint.h, namely alpha and ia64. Except for this part and now the include of sys/cdefs.h, all those files are equal (from a compiler POV), so they could be moved to only one version in src/include/. Approved by: joerg
* Remove fpsetsticky(). This was added for SysV compatibility, but duedas2005-03-151-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to mistakes from day 1, it has always had semantics inconsistent with SVR4 and its successors. In particular, given argument M: - On Solaris and FreeBSD/{alpha,sparc64}, it clobbers the old flags and *sets* the new flag word to M. (NetBSD, too?) - On FreeBSD/{amd64,i386}, it *clears* the flags that are specified in M and leaves the remaining flags unchanged (modulo a small bug on amd64.) - On FreeBSD/ia64, it is not implemented. There is no way to fix fpsetsticky() to DTRT for both old FreeBSD apps and apps ported from other operating systems, so the best approach seems to be to kill the function and fix any apps that break. I couldn't find any ports that use it, and any such ports would already be broken on FreeBSD/ia64 and Linux anyway. By the way, the routine has always been undocumented in FreeBSD, except for an MLINK to a manpage that doesn't describe it. This manpage has stated since 5.3-RELEASE that the functions it describes are deprecated, so that must mean that functions that it is *supposed* to describe but doesn't are even *more* deprecated. ;-) Note that fpresetsticky() has been retained on FreeBSD/i386. As far as I can tell, no other operating systems or ports of FreeBSD implement it, so there's nothing for it to be inconsistent with. PR: 75862 Suggested by: bde
* Refactor the bus_dma header files so that the interface is described inscottl2005-03-141-247/+13
| | | | | | | | | | sys/bus_dma.h instead of being copied in every single arch. This slightly reorders a flag that was specific to AXP and thus changes the ABI there. The interface still relies on bus_space definitions found in <machine/bus.h> so it cannot be included on its own yet, but that will be fixed at a later date. Add an MD <machine/bus_dma.h> for ever arch for consistency and to allow for future MD augmentation of the API. sparc64 makes heavy use of this right now due to its different bus_dma implemenation.
* Remove diffs to i386 version that came in via the compiler support ifdefs.peter2005-03-119-26/+35
| | | | | This changes things like whitespace, inconsistent use of #ifndef vs #if !defined(), different macro argument orders, mismatched comments, etc.
* Match i386 rev 1.38 with __cplusplus supportpeter2005-03-111-0/+8
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* netchild's mega-patch to isolate compiler dependencies into a centraljoerg2005-03-0213-69/+107
| | | | | | | | | | | | | | | | place. This moves the dependency on GCC's and other compiler's features into the central sys/cdefs.h file, while the individual source files can then refer to #ifdef __COMPILER_FEATURE_FOO where they by now used to refer to #if __GNUC__ > 3.1415 && __BARC__ <= 42. By now, GCC and ICC (the Intel compiler) have been actively tested on IA32 platforms by netchild. Extension to other compilers is supposed to be possible, of course. Submitted by: netchild Reviewed by: various developers on arch@, some time ago
* MFi386: Update alc's copyright noticepeter2005-02-281-1/+1
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* MFi386: Bring over John's local apic timer codepeter2005-02-282-6/+4
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* Use a common multi-inclusion protection, and add such aru2005-02-191-4/+4
| | | | protection to alpha/include/exec.h.
* JumboMFi386: use bitmapped IPI handler. Update elcr and default mptablepeter2005-01-214-16/+57
| | | | config handler. Tidy up various local apic initialization.
* MFi386: whitespace, copyright header, etc updatespeter2005-01-212-2/+1
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* Introduce bus_dmamap_load_mbuf_sg(). Instead of taking a callback arg, thisscottl2005-01-071-0/+5
| | | | | | | cuts to the chase and fills in a provided s/g list. This is meant to optimize out the cost of the callback since the callback doesn't serve much purpose for mbufs since mbuf loads will never be deferred. This is just for amd64 and i386 at the moment, other arches will be coming shortly.
* Begin all license/copyright comments with /*-imp2005-01-0524-24/+24
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* PC98 will never be defined for amd64imp2005-01-051-5/+0
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* Change gdb_cpu_setreg() to not take the value to which to set themarcel2004-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | specified register, but a pointer to the in-memory representation of that value. The reason for this is twofold: 1. Not all registers can be represented by a register_t. In particular FP registers fall in that category. Passing the new register value by reference instead of by value makes this point moot. 2. When we receive a G or P packet, both are for writing a register, the packet will have the register value in target-byte order and in the memory representation (modulo the fact that bytes are sent as 2 printable hexadecimal numbers of course). We only need to decode the packet to have a pointer to the register value. This change fixes the bug of extracting the register value of the P packet as a hexadecimal number instead of as a bit array. The quick (and dirty) fix to bswap the register value in gdb_cpu_setreg() as it has been added on i386 and amd64 can therefore be removed and has in fact been that. Tested on: alpha, amd64, i386, ia64, sparc64
* Remove UAREA_PAGES.das2004-11-201-1/+0
| | | | Reviewed by: arch@
* Raise MAXDSIZ from 8G to 32G. The old limit was just an arbitary choicepeter2004-10-271-1/+1
| | | | | | | | that was greater than 4G. I originally used the same values as i386 in order to save opening a new PML4 page slot, but in the day of gigabytes of memory, worrying about a 4K page seems futile. Moving from 8 to 32G moves the page to a different index, it doesn't increase the number of pages used.
* Move the code for halting the CPU (acpi_cpu_c1) into machdep files.njl2004-10-111-1/+2
| | | | | | This removes the last MD portion of acpi_cpu.c. MFC after: 2 weeks
* Make pte_load_store() an atomic operation in all cases, not just i386 PAE.alc2004-10-081-4/+14
| | | | | | | | | Restructure pmap_enter() to prevent the loss of a page modified (PG_M) bit in a race between processors. (This restructuring assumes the newly atomic pte_load_store() for correct operation.) Reviewed by: tegge@ PR: i386/61852
* Prevent the unexpected deallocation of a page table page while performingalc2004-09-291-1/+1
| | | | | | | | | | | | | pmap_copy(). This entails additional locking in pmap_copy() and the addition of a "flags" parameter to the page table page allocator for specifying whether it may sleep when memory is unavailable. (Already, pmap_copy() checks the availability of memory, aborting if it is scarce. In theory, another CPU could, however, allocate memory between pmap_copy()'s check and the call to the page table page allocator, causing the current thread to release its locks and sleep. This change makes this scenario impossible.) Reviewed by: tegge@
* Severely strip down the repocopied i386/bios.c and bios.h files. It turnspeter2004-09-241-233/+0
| | | | out that bios_sigsearch() etc is useful for finding tables in roms.
* MFi386: adapt rev 1.19 (debugger fixes)peter2004-09-221-2/+10
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* Double the number of kernel page tables for amd64 and for i386/PAE. The oldscottl2004-09-111-1/+2
| | | | | | | | value was only enough for 8GB of RAM, the new value can do 16GB. This still isn't optimal since it doesn't scale. Fixing this for amd64 looks to be fairly easy, but for i386 will be quite difficult. Reviewed by: peter
* Turn PREEMPTION into a kernel option. Make sure that it's defined ifscottl2004-09-021-5/+0
| | | | | | FULL_PREEMPTION is defined. Add a runtime warning to ULE if PREEMPTION is enabled (code inspired by the PREEMPTION warning in kern_switch.c). This is a possible MT5 candidate.
* Move the kernel-specific logic to adjust frompc from MI to MD. Formarcel2004-08-271-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | these two reasons: 1. On ia64 a function pointer does not hold the address of the first instruction of a functions implementation. It holds the address of a function descriptor. Hence the user(), btrap(), eintr() and bintr() prototypes are wrong for getting the actual code address. 2. The logic forces interrupt, trap and exception entry points to be layed-out contiguously. This can not be achieved on ia64 and is generally just bad programming. The MCOUNT_FROMPC_USER macro is used to set the frompc argument to some kernel address which represents any frompc that falls outside the kernel text range. The macro can expand to ~0U to bail out in that case. The MCOUNT_FROMPC_INTR macro is used to set the frompc argument to some kernel address to represent a call to a trap or interrupt handler. This to avoid that the trap or interrupt handler appear to be called from everywhere in the call graph. The macro can expand to ~0U to prevent adjusting frompc. Note that the argument is selfpc, not frompc. This commit defines the macros on all architectures equivalently to the original code in sys/libkern/mcount.c. People can take it from here... Compile-tested on: alpha, amd64, i386, ia64 and sparc64 Boot-tested on: i386
* Sync with i386 - Optimize intr_execute_handlers a bit etc.peter2004-08-161-1/+7
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