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* Protect lint(1) from a #error.markm2003-07-101-0/+2
* unifdef -DLAZY_SWITCH and start to tidy up the associated glue.peter2003-07-101-3/+0
* Fix the VADDR() macros to use either KVADDR() or UVADDR(), dependingpeter2003-07-092-17/+21
* Mega busdma API commit.scottl2003-07-011-1/+17
* - Construct a cpu topology map for Hyper Threading systems so that ULE mayjeff2003-06-281-0/+31
* Move KERNBASE to -2GB.simokawa2003-06-221-1/+1
* Migrate the thread stack management functions from the machine-dependentalc2003-06-141-1/+1
* - Document the thermal and performance counter LVT entries in the localjhb2003-06-061-3/+5
* Fix ALIGNED_POINTER(). sizeof((u_int32_t)) is not legal C.peter2003-06-041-1/+1
* Make this more compatable with libc_r. Make the internal types for storingpeter2003-06-021-3/+3
* Use __FBSDID().obrien2003-06-021-1/+3
* MFi386: i386/include/asm.h rev 1.11: Do not abuse ##.peter2003-06-021-1/+1
* Use C99 compatable asm statements.obrien2003-06-021-2/+2
* With the help of jhb, fix the ACPI_ACQUIRE_GLOBAL_LOCK() macros andpeter2003-05-311-28/+9
* Rename BUS_DMAMEM_NOSYNC to BUS_DMA_COHERENT.hmp2003-05-301-1/+1
* Initial port to amd64 after repocopy from i386. Note that thepeter2003-05-301-6/+6
* Bring back bus_dmasync_op_t. It is now a typedef to an int, though thescottl2003-05-271-1/+2
* De-orbit bus_dmamem_alloc_size(). It's a hack and was never used anyways.scottl2003-05-261-6/+0
* Stop profiled libc from exploding, matching gcc's generated code.peter2003-05-241-4/+0
* Typo fix. oops.peter2003-05-231-1/+1
* Update comments. Note that the kernel is at -1GB, not -2GB as erroniouslypeter2003-05-231-3/+3
* As suggested by the gdb folks, pad the 'struct fpreg' to a full 512 bytespeter2003-05-231-0/+1
* Major pmap rework to take advantage of the larger address space on amd64peter2003-05-234-71/+68
* sys/sys/limits.h:kan2003-05-192-3/+3
* Initialize logical_cpus_mask when the logical CPUs are enumerated inalc2003-05-151-2/+5
* Collect the nastiness for preserving the kernel MSR_GSBASE around thepeter2003-05-152-1/+36
* Use compile time constants for things like PTmap[] etc because they'repeter2003-05-151-7/+3
* Add BASIC i386 binary support for the amd64 kernel. This is largelypeter2003-05-145-4/+35
* For the page fault handler, save %cr2 in the outer trap handler so thatpeter2003-05-122-0/+4
* Sync ucontext with reality. The struct trapframe changes need to bepeter2003-05-121-11/+11
* AMD64 physical space is much larger than i386, de-i386 the bus_space andpeter2003-05-126-1373/+157
* Give a %fs and %gs to userland. Use swapgs to obtain the kernel %GS.basepeter2003-05-122-1/+21
* Make atdevbase long for the KERNBASE > 4GB casepeter2003-05-111-1/+1
* Provide a fake varargs implementation for lint's benefit. This waypeter2003-05-102-0/+17
* Remove _ARCH_INDIRECT ifdefs. They existed for lib/msun/* on i386, whichpeter2003-05-101-63/+0
* bcopyb() isn't used on amd64 kernel (it only exists for i386/pcvt)peter2003-05-101-1/+0
* Include the MXCSR initial values, based on the AMD docs. This filepeter2003-05-092-0/+4
* Style fixes.kan2003-05-041-8/+11
* Slight reorg and added AMD64 support. A couple of the MODINFOMD_* valuespeter2003-05-011-0/+34
* Commit MD parts of a loosely functional AMD64 port. This is based onpeter2003-05-0142-1642/+719
* Repocopy from x86_64/... to amd64/...peter2003-04-301-8/+7
* Deprecate machine/limits.h in favor of new sys/limits.h.kan2003-04-291-64/+4
* Use inlines for loading and storing page table entries. Use cmpxchg8b forjake2003-04-281-7/+45
* Add a new sys/limits.h file which in turn depends on machine/_limits.hkan2003-04-231-53/+35
* Backout my last commit.davidxu2003-04-201-4/+4
* Don't return garbage in high 16 bits.davidxu2003-04-191-4/+4
* Change the operation parameter of bus_dmamap_sync() from anmux2003-04-101-10/+6
* Remove invalid cast to vm_offset_t to avoid truncating a physical addressjake2003-04-081-1/+1
* Better fix for previous previous which still allows the 4megs of kva atjake2003-04-072-3/+3
* Define ovbcopy() as a macro which expands to the equivalent bcopy() call,des2003-04-041-4/+5
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