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* Implement guest vcpu pinning using 'pthread_setaffinity_np(3)'.neel2013-02-111-2/+0
| | | | | | | | | | | | | | Prior to this change pinning was implemented via an ioctl (VM_SET_PINNING) that called 'sched_bind()' on behalf of the user thread. The ULE implementation of 'sched_bind()' bumps up 'td_pinned' which in turn runs afoul of the assertion '(td_pinned == 0)' in userret(). Using the cpuset affinity to implement pinning of the vcpu threads works with both 4BSD and ULE schedulers and has the happy side-effect of getting rid of a bunch of code in vmm.ko. Discussed with: grehan
* Add svn properties to the recently merged bhyve source files.neel2013-01-201-1/+1
| | | | | The pre-commit hook will not allow any commits without the svn:keywords property in head.
* Cleanup the user-space paging exit handler now that the unified instructionneel2012-11-281-2/+0
| | | | | | emulation is in place. Obtained from: NetApp
* Revamp the x86 instruction emulation in bhyve.neel2012-11-281-0/+3
| | | | | | | | | | | | | | | | | | | On a nested page table fault the hypervisor will: - fetch the instruction using the guest %rip and %cr3 - decode the instruction in 'struct vie' - emulate the instruction in host kernel context for local apic accesses - any other type of mmio access is punted up to user-space (e.g. ioapic) The decoded instruction is passed as collateral to the user-space process that is handling the PAGING exit. The emulation code is fleshed out to include more addressing modes (e.g. SIB) and more types of operands (e.g. imm8). The source code is unified into a single file (vmm_instruction_emul.c) that is compiled into vmm.ko as well as /usr/sbin/bhyve. Reviewed by: grehan Obtained from: NetApp
* Maintain state regarding NMI delivery to guest vcpu in VT-x independent manner.neel2012-10-241-2/+2
| | | | | | Also add a stats counter to count the number of NMIs delivered per vcpu. Obtained from: NetApp
* Add the guest physical address and r/w/x bits togrehan2012-10-121-0/+2
| | | | | | | | the paging exit in preparation for a rework of bhyve MMIO handling. Reviewed by: neel Obtained from: NetApp
* Provide per-vcpu locks instead of relying on a single big lock.neel2012-10-121-7/+12
| | | | | | | This also gets rid of all the witness.watch warnings related to calling malloc(M_WAITOK) while holding a mutex. Reviewed by: grehan
* Get rid of assumptions in the hypervisor that the host physical memoryneel2012-10-031-4/+7
| | | | | | | associated with guest physical memory is contiguous. Rewrite vm_gpa2hpa() to get the GPA to HPA mapping by querying the nested page tables.
* Get rid of assumptions in the hypervisor that the host physical memoryneel2012-09-291-1/+1
| | | | | | | | | | associated with guest physical memory is contiguous. In this case vm_malloc() was using vm_gpa2hpa() to indirectly infer whether or not the address range had already been allocated. Replace this instead with an explicit API 'vm_gpa_available()' that returns TRUE if a page is available for allocation in guest physical address space.
* Add ioctls to control the X2APIC capability exposed by the virtual machine toneel2012-09-251-0/+11
| | | | | | | the guest. At the moment this simply sets the state in the 'vcpu' instance but there is no code that acts upon these settings.
* Add an explicit exit code 'SPINUP_AP' to tell the controlling process that anneel2012-09-251-0/+5
| | | | | | | | | | AP needs to be activated by spinning up an execution context for it. The local apic emulation is now completely done in the hypervisor and it will detect writes to the ICR_LO register that try to bring up the AP. In response to such writes it will return to userspace with an exit code of SPINUP_AP. Reviewed by: grehan
* Stash the 'vm_exit' information in each 'struct vcpu'.neel2012-09-241-2/+2
| | | | | There is no functional change at this time but this paves the way for vm exit handler functions to easily modify the exit reason going forward.
* MSI-x interrupt support for PCI pass-thru devices.grehan2012-04-281-1/+5
| | | | | | | | | | Includes instruction emulation for memory r/w access. This opens the door for io-apic, local apic, hpet timer, and legacy device emulation. Submitted by: ryan dot berryhill at sandvine dot com Reviewed by: grehan Obtained from: Sandvine
* IFC @ r222830grehan2011-06-281-7/+1
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* Import of bhyve hypervisor and utilities, part 1.grehan2011-05-131-0/+268
vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski
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