index
:
FreeBSD-src
RELENG_2_2
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4
RELENG_2_4_4
RELENG_2_4_OLD
devel
devel-11
releng/10.1
releng/10.3
releng/11.0
releng/11.1
stable/10
stable/11
Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes
Raptor Engineering, LLC
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path:
root
/
sys
/
amd64
/
include
/
specialreg.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
- Add macros for newly added CPUID bits in the corresponding header files.
jkim
2007-03-20
1
-0
/
+2
*
Add another CPUID for AMD CPUs and fix style(9) while I am here.
jkim
2007-03-12
1
-82
/
+83
*
Add SSSE3 extensions and correct CNXT-ID spelling for Intel processors.
jkim
2007-01-09
1
-1
/
+2
*
Sync specialreg.h changes between amd64 and i386 with few fixes.
jkim
2006-07-13
1
-2
/
+5
*
Add two new CPUID bits for AMD CPUs, i. e., SVM and extended APIC register.
jkim
2006-07-12
1
-0
/
+2
*
Add various constants for the PAT MSR and the PAT PTE and PDE flags.
jhb
2006-05-01
1
-0
/
+12
*
Correct few MSR addresses.
jkim
2005-10-15
1
-8
/
+8
*
- Print number of physical/logical cores and more CPUID info.
jkim
2005-10-14
1
-0
/
+14
*
Initial PG_NX support (no-execute page bit)
peter
2004-06-08
1
-0
/
+16
*
Remove advertising clause from University of California Regent's license,
imp
2004-04-05
1
-4
/
+0
*
MFi386: add THERMTRIP msr values
peter
2004-01-28
1
-0
/
+3
*
Cosmetic and/or trivial sync up with i386.
peter
2003-11-21
1
-3
/
+3
*
The great s/npx/fpu/gi
peter
2003-11-08
1
-5
/
+2
*
MFi386 rev 1.25 by jhb: add new MSR's and some missing older ones and
peter
2003-09-22
1
-3
/
+25
*
Commit MD parts of a loosely functional AMD64 port. This is based on
peter
2003-05-01
1
-79
/
+38
*
Bah, add in a missing space char I noticed when MFC'ing this.
jhb
2003-01-22
1
-1
/
+1
*
- Fix the name of the hyperthreading cpuid feature flag to be HTT instead
jhb
2003-01-08
1
-1
/
+9
*
Add additional cpuid feature flags and put into a canonical format.
mp
2002-06-22
1
-18
/
+33
*
Activate SSE/SIMD. This is the extra context switching support that
peter
2001-07-12
1
-0
/
+2
*
Add the CR4 values for P3 SIMD enabling support. FXSR tells the cpu that
peter
1999-09-10
1
-0
/
+2
*
$Id$ -> $FreeBSD$
peter
1999-08-28
1
-1
/
+1
*
Add defines for the P6 model-specific registers.
msmith
1999-04-07
1
-1
/
+58
*
- Implement enabling write allocate on AMD K5/K6/K6-2 cpus.
kato
1998-10-06
1
-1
/
+6
*
Defined CCR6 and CCR7 (configuration registers of M2 CPU.)
kato
1998-03-04
1
-1
/
+5
*
Enabled the FPU emilaute bit define: CR0_EM
fsmp
1997-07-21
1
-3
/
+1
*
Improved CPU identification and initialization routines. This
kato
1997-03-22
1
-44
/
+172
*
Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not
peter
1997-02-22
1
-1
/
+1
*
Make the long-awaited change from $Id$ to $FreeBSD$
jkh
1997-01-14
1
-1
/
+1
*
Support the PG_G flag on Pentium-Pro processors. This pretty
dyson
1996-11-11
1
-1
/
+34
*
Added missing CR0_NW define for Cyrix 486DLC support. It's still not
sos
1996-06-03
1
-1
/
+3
*
Fix a bunch of spelling errors in the comment fields of
mpp
1996-01-30
1
-3
/
+3
*
Remove trailing whitespace.
rgrimes
1995-05-30
1
-2
/
+2
*
Enable define of CR0_AM to prepare for implementing alignment checking.
bde
1995-01-14
1
-7
/
+3
*
Improved some comments.
dg
1994-09-04
1
-2
/
+2
*
Detect if we're running on a Cyrix 486DLC and enable automatic cache
pst
1994-09-04
1
-1
/
+54
*
Made all header files idempotent and moved incorrect common data from
wollman
1993-11-07
1
-1
/
+5
*
Removed all patch kit headers, sccsid and rcsid strings, put $Id$ in, some
rgrimes
1993-10-16
1
-9
/
+2
*
Initial import, 0.1 + pk 0.2.4-B1
rgrimes
1993-06-12
1
-0
/
+67