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* I believe the stack underflows during early development that caused me topeter2005-09-271-1/+0
| | | | | add spare padding at the beginning of the pcb are long gone. Remove the padding fields.
* Kill pcb_rflags. It served no purpose.peter2005-09-271-1/+0
| | | | Reported by: bde
* Implement makectx(). The makectx() function is used by KDB to createmarcel2004-07-101-0/+3
| | | | | | | | | a PCB from a trapframe for purposes of unwinding the stack. The PCB is used as the thread context and all but the thread that entered the debugger has a valid PCB. This function can also be used to create a context for the threads running on the CPUs that have been stopped when the debugger got entered. This however is not done at the time of this commit.
* Checkpoint some of what I was starting to tinker with for having somepeter2004-05-161-0/+1
| | | | | | | | | | | different context support for 32 vs 64 bit processes. This simply omits the save/restore of the segment selector registers for non 32 bit processes. This avoids the rdmsr/rwmsr juggling when restoring %gs clobbers the kernel msr that holds the gsbase. However, I suspect it might be better to conditionally do this at user<->kernel transition where we wouldn't need to do the juggling in the first place. Or have per-thread extended context save/restore hooks.
* Remove advertising clause from University of California Regent's license,imp2004-04-051-4/+0
| | | | | | per letter dated July 22, 1999 and email from Peter Wemm. Approved by: core, peter
* Add dbreg struct definitions for /proc/*/dbregs and a place to store thepeter2004-01-281-2/+9
| | | | registers in the pcb
* Update the graffiti.peter2003-11-081-3/+4
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* The great s/npx/fpu/gipeter2003-11-081-1/+1
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* Rename npx* to fpu*. I haven't done the flags/function names yet.peter2003-11-081-5/+4
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* Collect the nastiness for preserving the kernel MSR_GSBASE around thepeter2003-05-151-1/+0
| | | | | | | | | | load_gs() calls into a single place that is less likely to go wrong. Eliminate the per-process context switching of MSR_GSBASE, because it should be constant for a single cpu. Instead, save/restore it during the loading of the new %gs selector for the new process. Approved by: re (amd64/* blanket)
* Add BASIC i386 binary support for the amd64 kernel. This is largelypeter2003-05-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | stolen from the ia64/ia32 code (indeed there was a repocopy), but I've redone the MD parts and added and fixed a few essential syscalls. It is sufficient to run i386 binaries like /bin/ls, /usr/bin/id (dynamic) and p4. The ia64 code has not implemented signal delivery, so I had to do that. Before you say it, yes, this does need to go in a common place. But we're in a freeze at the moment and I didn't want to risk breaking ia64. I will sort this out after the freeze so that the common code is in a common place. On the AMD64 side, this required adding segment selector context switch support and some other support infrastructure. The %fs/%gs etc code is hairy because loading %gs will clobber the kernel's current MSR_GSBASE setting. The segment selectors are not used by the kernel, so they're only changed at context switch time or when changing modes. This still needs to be optimized. Approved by: re (amd64/* blanket)
* Give a %fs and %gs to userland. Use swapgs to obtain the kernel %GS.basepeter2003-05-121-0/+2
| | | | | | | | | | | | | | | | | value on entry and exit. This isn't as easy as it sounds because when we recursively trap or interrupt, we have to avoid duplicating the swapgs instruction or we end up back with the userland %gs. I implemented this by testing TF_CS to see if we're coming from supervisor mode already, and check for returning to supervisor. To avoid a race with interrupts in the brief period after beginning executing the handler and before the swapgs, convert all trap gates to interrupt gates, and reenable interrupts immediately after the swapgs. I am not happy with this. There are other possible ways to do this that should be investigated. (eg: storing the GS.base MSR value in the trapframe) Add some sysarch functions to let the userland code get to this. Approved by: re (blanket amd64/*)
* Commit MD parts of a loosely functional AMD64 port. This is based onpeter2003-05-011-25/+16
| | | | | | | | | | | | | | | | | | | | | | a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
* 1.Fix smp race between kernel vm86 BIOS calling and userland vm86 mode code,davidxu2002-11-071-0/+2
| | | | | | | | | | remove global variable in_vm86call, set vm86 calling flag in PCB flags. 2.Fix vm86 BIOS calling preempted problem by changing vm86_lock mutex type from MTX_DEF to MTX_SPIN. vm86pcb is not remembered in thread struct, when the thread calling vm86 BIOS is preempted by interrupt thread, and later switching back to the thread would cause incorrect context be loaded into CPU registers, this leads to kernel crash.
* The a.out md_coredump stuff isn't referenced anywhere anymore, andpeter2002-10-151-10/+0
| | | | hasn't been filled in for ages.. Nuked.
* It is too much work convincing lint why we would want empty structures,phk2002-10-011-0/+3
| | | | so make the non-empty #ifdef lint.
* Add kernel support needed for the KSE-aware libpthread:mini2002-09-161-0/+1
| | | | | | | | - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: deischen, julian Approved by: -arch
* Compromise for critical*()/cpu_critical*() recommit. Cleanup the interruptdillon2002-03-271-1/+2
| | | | | | | | | | | | | | | | | | | disablement assumptions in kern_fork.c by adding another API call, cpu_critical_fork_exit(). Cleanup the td_savecrit field by moving it from MI to MD. Temporarily move cpu_critical*() from <arch>/include/cpufunc.h to <arch>/<arch>/critical.c (stage-2 will clean this up). Implement interrupt deferral for i386 that allows interrupts to remain enabled inside critical sections. This also fixes an IPI interlock bug, and requires uses of icu_lock to be enclosed in a true interrupt disablement. This is the stage-1 commit. Stage-2 will occur after stage-1 has stabilized, and will move cpu_critical*() into its own header file(s) + other things. This commit may break non-i386 architectures in trivial ways. This should be temporary. Reviewed by: core Approved by: core
* Remove __P.alfred2002-03-201-1/+1
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* revert last commit temporarily due to whining on the lists.dillon2002-02-261-2/+1
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* STAGE-1 of 3 commit - allow (but do not require) interrupts to remaindillon2002-02-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enabled in critical sections and streamline critical_enter() and critical_exit(). This commit allows an architecture to leave interrupts enabled inside critical sections if it so wishes. Architectures that do not wish to do this are not effected by this change. This commit implements the feature for the I386 architecture and provides a sysctl, debug.critical_mode, which defaults to 1 (use the feature). For now you can turn the sysctl on and off at any time in order to test the architectural changes or track down bugs. This commit is just the first stage. Some areas of the code, specifically the MACHINE_CRITICAL_ENTER #ifdef'd code, is strictly temporary and will be cleaned up in the STAGE-2 commit when the critical_*() functions are moved entirely into MD files. The following changes have been made: * critical_enter() and critical_exit() for I386 now simply increment and decrement curthread->td_critnest. They no longer disable hard interrupts. When critical_exit() decrements the counter to 0 it effectively calls a routine to deal with whatever interrupts were deferred during the time the code was operating in a critical section. Other architectures are unaffected. * fork_exit() has been conditionalized to remove MD assumptions for the new code. Old code will still use the old MD assumptions in regards to hard interrupt disablement. In STAGE-2 this will be turned into a subroutine call into MD code rather then hardcoded in MI code. The new code places the burden of entering the critical section in the trampoline code where it belongs. * I386: interrupts are now enabled while we are in a critical section. The interrupt vector code has been adjusted to deal with the fact. If it detects that we are in a critical section it currently defers the interrupt by adding the appropriate bit to an interrupt mask. * In order to accomplish the deferral, icu_lock is required. This is i386-specific. Thus icu_lock can only be obtained by mainline i386 code while interrupts are hard disabled. This change has been made. * Because interrupts may or may not be hard disabled during a context switch, cpu_switch() can no longer simply assume that PSL_I will be in a consistent state. Therefore, it now saves and restores eflags. * FAST INTERRUPT PROVISION. Fast interrupts are currently deferred. The intention is to eventually allow them to operate either while we are in a critical section or, if we are able to restrict the use of sched_lock, while we are not holding the sched_lock. * ICU and APIC vector assembly for I386 cleaned up. The ICU code has been cleaned up to match the APIC code in regards to format and macro availability. Additionally, the code has been adjusted to deal with deferred interrupts. * Deferred interrupts use a per-cpu boolean int_pending, and masks ipending, spending, and fpending. Being per-cpu variables it is not currently necessary to lock; bus cycles modifying them. Note that the same mechanism will enable preemption to be incorporated as a true software interrupt without having to further hack up the critical nesting code. * Note: the old critical_enter() code in kern/kern_switch.c is currently #ifdef to be compatible with both the old and new methodology. In STAGE-2 it will be moved entirely to MD code. Performance issues: One of the purposes of this commit is to enhance critical section performance, specifically to greatly reduce bus overhead to allow the critical section code to be used to protect per-cpu caches. These caches, such as Jeff's slab allocator work, can potentially operate very quickly making the effective savings of the new critical section code's performance very significant. The second purpose of this commit is to allow architectures to enable certain interrupts while in a critical section. Specifically, the intention is to eventually allow certain FAST interrupts to operate rather then defer. The third purpose of this commit is to begin to clean up the critical_enter()/critical_exit()/cpu_critical_enter()/ cpu_critical_exit() API which currently has serious cross pollution in MI code (in fork_exit() and ast() for example). The fourth purpose of this commit is to provide a framework that allows kernel-preempting software interrupts to be implemented cleanly. This is currently used for two forward interrupts in I386. Other architectures will have the choice of using this infrastructure or building the functionality directly into critical_enter()/ critical_exit(). Finally, this commit is designed to greatly improve the flexibility of various architectures to manage critical section handling, software interrupts, preemption, and other highly integrated architecture-specific details.
* Changed the type of pcb_flags from u_char to u_int and adjusted things.bde2002-01-171-1/+1
| | | | | This removes the only atomic operation on a char type in the entire kernel.
* Split the per-process Local Descriptor Table out of the PCB and intojhb2001-10-251-1/+0
| | | | | | | struct mdproc. Submitted by: Andrew R. Reiter <arr@watson.org> Silence on: -current
* The #define for pcb_savefpu seems to do more harm than good.peter2001-07-121-1/+0
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* Activate SSE/SIMD. This is the extra context switching support thatpeter2001-07-121-1/+2
| | | | | | | | | | | | | | | we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
* Convert npx interrupts into traps instead of vice versa. This is muchbde2001-05-221-0/+1
| | | | | | | | simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
* Activate USER_LDT by default. The new thread libraries are going topeter2001-02-231-4/+0
| | | | | | | | depend on this. The linux ABI emulator tries to use it for some linux binaries too. VM86 had a bigger cost than this and it was made default a while ago. Reviewed by: jhb, imp
* - Don't call clear_resched() in userret(), instead, clear the resched flagjhb2001-02-201-1/+0
| | | | | | | | | | | | in mi_switch() just before calling cpu_switch() so that the first switch after a resched request will satisfy the request. - While I'm at it, move a few things into mi_switch() and out of cpu_switch(), specifically set the p_oncpu and p_lastcpu members of proc in mi_switch(), and handle the sched_lock state change across a context switch in mi_switch(). - Since cpu_switch() no longer handles the sched_lock state change, we have to setup an initial state for sched_lock in fork_exit() before we release it.
* Declare or #define per-cpu globals in <machine/globals.h> in all cases.bde2000-10-271-6/+0
| | | | The i386 UP case was messily different.
* Major update to the way synchronization is done in the kernel. Highlightsjasone2000-09-071-5/+1
| | | | | | | | | | | | | | | include: * Mutual exclusion is used instead of spl*(). See mutex(9). (Note: The alpha port is still in transition and currently uses both.) * Per-CPU idle processes. * Interrupts are run in their own separate kernel threads and can be preempted (i386 only). Partially contributed by: BSDi (BSD/OS) Submissions by (at least): cp, dfr, dillon, grog, jake, jhb, sheldonh
* Change #ifdef KERNEL to #ifdef _KERNEL in the public headers. "KERNEL"peter1999-12-291-1/+1
| | | | | | is an application space macro and the applications are supposed to be free to use it as they please (but cannot). This is consistant with the other BSD's who made this change quite some time ago. More commits to come.
* User ldt sharing.luoqi1999-12-061-3/+6
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* $Id$ -> $FreeBSD$peter1999-08-281-1/+1
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* Implement support for hardware debug registers on the i386.jlemon1999-07-091-1/+10
| | | | Submitted by: Brian Dean <brdean@unx.sas.com>
* Unifdef VM86.jlemon1999-06-011-5/+1
| | | | Reviewed by: silence on on -current
* Enable vmspace sharing on SMP. Major changes are,luoqi1999-04-281-3/+5
| | | | | | | | | | | | | | | | | - %fs register is added to trapframe and saved/restored upon kernel entry/exit. - Per-cpu pages are no longer mapped at the same virtual address. - Each cpu now has a separate gdt selector table. A new segment selector is added to point to per-cpu pages, per-cpu global variables are now accessed through this new selector (%fs). The selectors in gdt table are rearranged for cache line optimization. - fask_vfork is now on as default for both UP and SMP. - Some aio code cleanup. Reviewed by: Alan Cox <alc@cs.rice.edu> John Dyson <dyson@iquest.net> Julian Elischer <julian@whistel.com> Bruce Evans <bde@zeta.org.au> David Greenman <dg@root.com>
* Ifdefed some SMP and VM86 code. Note that although VM86 is not a globalbde1998-02-031-1/+9
| | | | | option, the ifdef on it in a header works because only the name of the VM86 extension is hidden.
* Don't #include unneeded includes here. pcb_ext.h picks up lots of otherpeter1997-10-101-4/+2
| | | | stuff with it.
* VM86 kernel support.dyson1997-08-091-6/+4
| | | | | | | Work done by BSDI, Jonathan Lemon <jlemon@americantv.com>, Mike Smith <msmith@gsoft.com.au>, Sean Eric Fagan <sef@kithrup.com>, and probably alot of others. Submitted by: Jnathan Lemon <jlemon@americantv.com>
* Preliminary support for per-cpu data pages.peter1997-06-221-9/+1
| | | | | | | | | | | | | | | | This eliminates a lot of #ifdef SMP type code. Things like _curproc reside in a data page that is unique on each cpu, eliminating the expensive macros like: #define curproc (SMPcurproc[cpunumber()]) There are some unresolved bootstrap and address space sharing issues at present, but Steve is waiting on this for other work. There is still some strictly temporary code present that isn't exactly pretty. This is part of a larger change that has run into some bumps, this part is standalone so it should be safe. The temporary code goes away when the full idle cpu support is finished. Reviewed by: fsmp, dyson
* Preserve %fs and %gs across context switches. This has a relatively lowbde1997-06-071-2/+4
| | | | | | | cost since it is only done in cpu_switch(), not for every exception. The extra state is kept in the pcb, and handled much like the npx state, with similar deficiencies (the state is not preserved across signal handlers, and error handling loses state).
* remove #include opt_smp.hpeter1997-05-071-3/+5
| | | | declare SMPcurpcb[] next to #define and uniprocessor counterpart
* Man the liferafts! Here comes the long awaited SMP -> -current merge!peter1997-04-261-1/+11
| | | | | | | | | | | | | | | | There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
* No longer use an i386tss as the basis of our pcb - it wasn't particularlypeter1997-04-071-15/+12
| | | | | | | | | | | | | | | | convenient and makes life difficult for my next commit. We still need an i386tss to point to for the tss slot in the gdt, so we use a common tss shared between all processes. Note that this is going to break debugging until this series of commits is finished. core dumps will change again too. :-( we really need a more modern core dump format that doesn't depend on the pcb/upages. This change makes VM86 mode harder, but the following commits will remove a lot of constraints for the VM86 system, including the possibility of extending the pcb for an IO port map etc. Obtained from: bde
* Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are notpeter1997-02-221-1/+1
| | | | ready for it yet.
* Make the long-awaited change from $Id$ to $FreeBSD$jkh1997-01-141-1/+1
| | | | | | | | This will make a number of things easier in the future, as well as (finally!) avoiding the Id-smashing problem which has plagued developers for so long. Boy, I'm glad we're not using sup anymore. This update would have been insane otherwise.
* Eliminated pcb_inl. It was always 0 because context switches don't occurbde1996-07-311-2/+1
| | | | in interrupt handlers.
* Don't return unused values in cpu_switch() or savectx().bde1996-05-011-2/+2
| | | | Don't preserve unused registers in the NPX case in savectx().
* Fix cpu_fork for real.phk1996-04-251-2/+2
| | | | Suggested by: bde
* savectx returns through cpu_switch in case of the child, so it mustphk1996-04-191-2/+2
| | | | return void just like cpu_switch. Fix prototype and usage from machdep.c
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