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path: root/sys/amd64/amd64/intr_machdep.c
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* Improve the handling of cpuset with interrupts.jhb2009-07-011-15/+20
* Fix kernels compiled without SMP support. Make intr_next_cpu() availablejhb2009-06-251-0/+10
* - Restore the behavior of pre-allocating IDT vectors for MSI interrupts.jhb2009-06-251-35/+38
* Remove unused variable.ganbold2008-12-021-3/+0
* - Add the interrupt vector number to intr_event_create so MI code canjeff2008-04-111-1/+1
* Add a MI intr_event_handle() routine for the non-INTR_FILTER case. Thisjhb2008-04-051-111/+2
* Simplify the interrupt code a bit:jhb2008-03-171-32/+15
* In keeping with style(9)'s recommendations on macros, use a ';'rwatson2008-03-161-2/+3
* Add preliminary support for binding interrupts to CPUs:jhb2008-03-141-9/+52
* Fix a silly bogon which prevented all the CPUs that are tagged as interruptjhb2008-03-141-4/+4
* Extend critical section coverage in the low-level interrupt handlers toscottl2007-11-211-1/+1
* Rework the PCPU_* (MD) interface:attilio2007-06-041-2/+2
* In some particular cases (like in pccard and pccbb), the real devicepiso2007-05-311-3/+12
* Minor fixes and tweaks to the x86 interrupt code:jhb2007-05-081-27/+38
* Bring in the reminaing bits to make interrupt filtering work:piso2007-05-061-0/+84
* Change the x86 interrupt code to use FreeBSD CPU IDs (i.e. PCPU_GET(cpuid))jhb2007-03-061-12/+18
* Use ih_filter instead of ih_handler in a couple of places. This fixesjhb2007-02-231-1/+1
* o break newbus api: add a new argument of type driver_filter_t topiso2007-02-231-7/+7
* Add a function to return the MD interrupt source cookie associated withjhb2006-12-121-3/+3
* Trim some noise from bootverbose:jhb2006-11-171-5/+1
* Add one more include to fix the case of !DDB and !atpic.jhb2006-10-161-0/+1
* Move the 2 additional #includes down into the #ifndef DEV_ATPIC section.jhb2006-10-131-2/+2
* Attempt to fix the GENERIC kernel build which has been failing onjb2006-10-131-0/+2
* Fix nodevice atpic compile.jhb2006-10-121-0/+5
* Change the x86 interrupt code to suspend/resume interrupt controllersjhb2006-10-101-10/+74
* Simplify the pager support in DDB. Allowing different db commands tojhb2006-07-121-4/+2
* Rework how we wire up interrupt sources to CPUs:jhb2006-02-281-1/+91
* MFi386:jhb2005-12-081-4/+4
* If we get a stray interrupt, return after logging it. In the extremelyjhb2005-11-281-0/+1
* Reorganize the interrupt handling code a bit to make a few things cleanerjhb2005-10-251-52/+58
* Various trivial comment fixespeter2005-06-241-1/+1
* Use PCPU_LAZY_INC() for cnt.v_{intr,trap,syscalls} rather than atomicjhb2005-04-121-1/+1
* JumboMFi386: use bitmapped IPI handler. Update elcr and default mptablepeter2005-01-211-0/+11
* MFi386: rev 1.12: re-allow fast interrupts to cause preemptionpeter2004-12-061-2/+0
* Don't use atomic ops to increment interrupt stats. This was only done onscottl2004-11-031-3/+3
* - Change the ddb paging "support" to use a variable (db_lines_per_page) tojhb2004-11-011-1/+1
* Sync with i386 - Optimize intr_execute_handlers a bit etc.peter2004-08-161-2/+1
* As a temporary hack, turn off deferred preemptions that are the result ofjhb2004-07-191-0/+2
* Implement preemption of kernel threads natively in the scheduler ratherjhb2004-07-021-1/+1
* MFi386 revision 1.6alc2004-05-301-2/+2
* MFi386: numerous interrupt and acpi updatespeter2004-05-161-0/+11
* Widen the enable/disable helper function's argument in line with thepeter2003-11-171-14/+2
* If an interrupt source doesn't have an ithread, treat it as a strayjhb2003-11-141-1/+4
* - Move manipulation of td_intr_nesting_level out of assembly interruptjhb2003-11-121-13/+35
* New device interrupt code. This defines an interrupt source abstractionjhb2003-11-031-0/+296
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