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:
FreeBSD-src
RELENG_2_2
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4
RELENG_2_4_4
RELENG_2_4_OLD
devel
devel-11
releng/10.1
releng/10.3
releng/11.0
releng/11.1
stable/10
stable/11
Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes
Raptor Engineering, LLC
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path:
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/
sys
/
amd64
/
amd64
/
initcpu.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
Add basic amd64 support for VIA Nano processors.
jkim
2009-01-12
1
-0
/
+75
*
Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").
jkim
2008-11-26
1
-0
/
+1
*
Detect Advanced Power Management Information for AMD CPUs.
jkim
2008-10-21
1
-0
/
+1
*
Add variable cpu_mxcsr_mask to save valid bits of mxcsr register.
davidxu
2006-06-19
1
-0
/
+1
*
- Print number of physical/logical cores and more CPUID info.
jkim
2005-10-14
1
-1
/
+3
*
Initial PG_NX support (no-execute page bit)
peter
2004-06-08
1
-13
/
+13
*
Cosmetic and/or trivial sync up with i386.
peter
2003-11-21
1
-1
/
+1
*
Use __FBSDID().
obrien
2003-07-25
1
-2
/
+3
*
Commit MD parts of a loosely functional AMD64 port. This is based on
peter
2003-05-01
1
-810
/
+6
*
Extend CPU_ATHLON_SSE_HACK to cover a few more revisions of Athlon CPUs.
dwmalone
2003-03-20
1
-1
/
+2
*
- Move enable_sse()'s prototype to machine/md_var.h.
jhb
2003-01-22
1
-7
/
+6
*
Rename cpuid_cpuinfo to cpu_procinfo. bde requested that I rename this
jhb
2003-01-22
1
-1
/
+1
*
Rework part of the previous processor name changes so that we read
jhb
2003-01-09
1
-2
/
+0
*
- Add a cpu_exthigh variable to hold the highest extended cpuid value
jhb
2003-01-08
1
-0
/
+2
*
Add a cpuid_cpuinfo variable to hold the results of %ebx from cpuid with
jhb
2003-01-08
1
-0
/
+1
*
Be consistent about functions being static.
phk
2002-10-16
1
-1
/
+1
*
Be consistent about "static" functions: if the function is marked
phk
2002-09-28
1
-1
/
+1
*
Automatically enable CPU_ENABLE_SSE (detect and enable SSE instructions)
peter
2002-09-07
1
-0
/
+7
*
Fix abuses of cpu_critical_{enter,exit} by converting to
imp
2002-03-21
1
-4
/
+3
*
Add an option CPU_ATHLON_SSE_HACK which attempts to enable the SSE
dwmalone
2002-02-12
1
-0
/
+18
*
Modify the critical section API as follows:
jhb
2001-12-18
1
-2
/
+2
*
Mostly cosmetic. Move various variables from .s files to .c files so that
peter
2001-09-04
1
-1
/
+7
*
Move cpu_fxsr definition to C code (so debug info is generated) and where
peter
2001-08-24
1
-0
/
+4
*
There is nothing special that requires SSE to be only on 686 class cpus.
peter
2001-08-18
1
-6
/
+4
*
Unbroke kernel if I686_CPU is not defined.
sobomax
2001-07-13
1
-0
/
+2
*
Forgot this fix from another tree. make enable_sse() a real prototype.
peter
2001-07-12
1
-1
/
+1
*
Move init_sse() out of the "GenuineIntel" section, my AthlonMP system
peter
2001-07-12
1
-1
/
+1
*
Activate SSE/SIMD. This is the extra context switching support that
peter
2001-07-12
1
-0
/
+22
*
Switch from save/disable/restore_intr() to critical_enter/exit().
jhb
2001-03-28
1
-4
/
+3
*
Fix some further english grammar and typo's.
asmodai
2000-11-08
1
-3
/
+3
*
Fix typo's: UPGRADE_CPU_HW_CACHE -> CPU_UPGRADE_HW_CACHE
asmodai
2000-11-08
1
-2
/
+2
*
Major update to the way synchronization is done in the kernel. Highlights
jasone
2000-09-07
1
-3
/
+3
*
Improved Cyrix 486DX supports for NEC PC-98.
kato
2000-08-31
1
-0
/
+15
*
Added new options CPU_PPRO2CELERON and CPU_L2_LATENCY to support
kato
2000-06-13
1
-3
/
+52
*
$Id$ -> $FreeBSD$
peter
1999-08-28
1
-1
/
+1
*
Kill option FAILSAFE.
des
1999-06-15
1
-6
/
+1
*
There are two models of AMD K6-2 Model 8 (c.f. AMD's document), so the
kato
1999-01-16
1
-10
/
+8
*
From the submitter:
msmith
1998-12-27
1
-3
/
+67
*
Get rid of uninitialized variable warnings. No bugs found, just
dillon
1998-12-14
1
-2
/
+3
*
- Implement enabling write allocate on AMD K5/K6/K6-2 cpus.
kato
1998-10-06
1
-3
/
+123
*
Disable local APIC in UP kernel. Intel specification update describes
kato
1998-05-16
1
-1
/
+22
*
Make FAILSAFE a new-style option.
eivind
1998-02-04
1
-1
/
+2
*
Fix typo. Option `CPU_SUSP_HLT' didn't work on Cyrix 486DX box.
kato
1998-01-03
1
-3
/
+3
*
Correct CPU_CYRIX_NO_LOCK fix.
jlemon
1997-11-21
1
-5
/
+5
*
Removed unused #includes.
bde
1997-10-28
1
-2
/
+1
*
Added two Cyrix 6x86/6x86MX options.
kato
1997-10-06
1
-7
/
+35
*
Treat 6x86MX CPU as 686-class CPU instead of 586-class CPU.
kato
1997-07-24
1
-5
/
+5
*
Added CPU_DIRECT_MAPPED_CACHE option which sets L1 cache in direct
kato
1997-06-27
1
-1
/
+4
*
- Use `6x86MX' instead of `M2'. Cyrix officially use `6x86MX' for the
kato
1997-05-31
1
-1
/
+65
*
Add new cpu type, CPU_CY486DX, which shows Cyrix 486S/DX series CPUs,
kato
1997-04-26
1
-4
/
+30
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