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* First pass at removing Alpha kernel support.jhb2006-05-1131-6351/+0
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* Revert part of previous commit. In alpha_platform_alloc_ide_intr(),marcel2006-04-221-6/+1
| | | | there's no RID for us to work with.
* Set the rid for any resources that are allocated at the level whereimp2006-04-203-10/+28
| | | | they first emerge from the rman_* system.
* Replace __RMAN_RESOURCE_VISIBLE with calls to public entry pointsphk2005-09-255-28/+26
| | | | in rman module.
* Substitute rman_get_start() for __RMAN_RESOURCE_VISIBLEphk2005-09-251-7/+7
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* Relocate direct map specs into struct alpha_chipset.ticso2005-09-196-3/+18
| | | | | Prepare for PCI Scatter-Gather map. Panic if driver tries alpha_XXX_dmamap() out of range.
* add cpu_idle support for 21066A based lca systemsticso2005-01-312-0/+31
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* Begin all license/copyright comments with /*- or #-imp2005-01-0512-13/+13
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* In alpha_pci_alloc_resource(), when allocating a memory resource,marcel2004-08-291-1/+1
| | | | | | | | | | | do not set the virtual address to the bus address when the bus doesn't have either of the PCI_RF_DENSE or PCI_RF_BWX flags set. The TGA driver uses the virtual address to access the registers, which on some machines can cause a memory management fault. Map the bus address as K0SEG virtual memory instead. Note that with some hardware combinations involving the TGA2 adapter this change merely results that the memory management fault is replaced by a machine check.
* Catch up with __RMAN_RESOURCE_VISIBLE enough to get GENERIC to buildgallatin2004-07-016-0/+6
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* Catch a few places where NULL (pointer) was used where 0 (integer) waspeter2003-12-231-1/+1
| | | | expected.
* Widen the enable/disable helper function's argument in line with thepeter2003-11-174-8/+8
| | | | ithread_create() changes etc. This should be mostly a NOP.
* Prefer new location of pci include files (which have only been in theimp2003-08-2210-15/+15
| | | | | tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
* Cleanup <machine/cpu.h> by moving MD prototypes to <machine/md_var.h>marcel2003-08-176-16/+28
| | | | | | | | | | | | | | | like we have on other platforms. Move savectx() to <machine/pcb.h>. A lot of files got these MD prototypes through the indirect inclusion of <machine/cpu.h> and now need to include <machine/md_var.h>. The number of which is unexpectedly large... osf1_misc.c especially is tricky because szsigcode is redefined in one of the osf1 header files. Reordering of the include files was needed. linprocfs.c now needs an explicit extern declaration. Tested with: LINT
* Use __FBSDID().obrien2003-06-1015-31/+45
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* At great personal risk, add a __packed and __aligned(x) define thatpeter2002-09-231-1/+1
| | | | | | | | | | expand to __attribute__((packed)) and __attribute__((aligned(x))) respectively. Replace the handful of gcc-ism's that use __attribute__((aligned(16))) etc around the kernel with __aligned(16). There are over 400 __attribute__((packed)) to deal with, that can come later. I just want to use __packed in new code rather than add more gcc-ism's.
* Remove ## concatination in the CFGREAD and CFGWRITE macros, as gcc3 complainsgallatin2002-05-101-2/+2
| | | | | about them & they are not needed. Same fix as to tsunami_pci.c. (not surprising, as this code was cut and pasted from there when I wrote it).
* Revive dec_axppci_33_intr_route for LCA.ticso2002-04-171-13/+4
| | | | | | | We now get valid interrupt lines for devices on secondary pci busses. Reviewed by: gallatin Approved by: gallatin
* Clear the error flags in the LCA_IOC_STAT0 register afterticso2002-04-171-0/+18
| | | | | | | | | | | machine_checks. This fixes pci config reads for non existing devices on secondary pci busses. Thanks to Andrew Gallatin for pointing me to the register Reviewed by: gallatin Approved by: gallatin
* I am not sure why ## was used in this macro, as w/o the string concatenationobrien2002-04-171-2/+2
| | | | | | the tokens are legal ANSI-C. Maybe to enable 'op' to be a macro itself? Anyway, with the ## concatenation Gcc 3.1's integrated `cpp' treats "=op(" as a single token vs. the three tokens it is.
* LCA based systems can't handle more than 16 devices on pci bus 0.ticso2002-04-111-1/+1
| | | | | Reviewed by: gallatin Approved by: gallatin
* shut up the compilergallatin2002-03-211-1/+1
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* Fix abuses of cpu_critical_{enter,exit} by converting toimp2002-03-213-13/+13
| | | | | intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}.
* Remove __P(). This was tested on the GENERIC kernel.obrien2002-03-201-2/+2
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* recover from namespace collision caused by un-static'ing pci_alloc_resource()gallatin2002-02-288-8/+8
| | | | in rev 1.187 of sys/dev/pci/pci.c
* Introduce a standard name for the lock protecting an interrupt controllerjhb2001-12-204-10/+55
| | | | | | | | and it's associated state variables: icu_lock with the name "icu". This renames the imen_mtx for x86 SMP, but also uses the lock to protect access to the 8259 PIC on x86 UP. This also adds an appropriate lock to the various Alpha chipsets which fixes problems with Alpha SMP machines dropping interrupts with an SMP kernel.
* Modify the critical section API as follows:jhb2001-12-183-8/+8
| | | | | | | | | | | | | | | | | | | - The MD functions critical_enter/exit are renamed to start with a cpu_ prefix. - MI wrapper functions critical_enter/exit maintain a per-thread nesting count and a per-thread critical section saved state set when entering a critical section while at nesting level 0 and restored when exiting to nesting level 0. This moves the saved state out of spin mutexes so that interlocking spin mutexes works properly. - Most low-level MD code that used critical_enter/exit now use cpu_critical_enter/exit. MI code such as device drivers and spin mutexes use the MI wrappers. Note that since the MI wrappers store the state in the current thread, they do not have any return values or arguments. - mtx_intr_enable() is replaced with a constant CRITICAL_FORK which is assigned to curthread->td_savecrit during fork_exit(). Tested on: i386, alpha
* - splhigh()/splx() -> critical_enter()/critical_exit()gallatin2001-10-202-5/+5
| | | | | | - fix KV macro in t2_pci.c to include the sable_lynx_base variable so that the T2 CSRs can be found on lynxes. Current should be bootable on lynxes now.
* Remove unneeded sys/mutex.h includes.jhb2001-10-196-6/+0
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* Fix Assembler buglet: Warning: .end directive names different symbol than .entmjacob2001-06-141-1/+1
| | | | MFC after: 2 weeks
* Supply the intpin to the platform.pci_intr_map() function. It turnsgallatin2001-06-103-0/+6
| | | | | | | out nearly every platform but the one I tested on requires the intpin to swizzle out the correct intline. tested by: Martijn Pronk <mpkisbkl@xs4all.nl> (lca_pci)
* Resurrect platform.pci_intr_map() and essentially undo the effects ofgallatin2001-06-015-106/+45
| | | | | | | | | | | | | | | | | the interface conversion to platform.pci_intr_route(). I've left the platform.pci_intr_route() function pointer in place, as well as alpha_pci_route_interrupt(), but no platform currently implements it. To work around the removal of alpha_platform_assign_pciintr(cfg); from the pci probe code, I've hooked in calls to platform.pci_intr_map() in pcib_read_config (similar to the x86 APIC_IO ifdef in pci_cfgregread) for every chipset that has a platform which needs it. While here, I've removed the interupt mapping/routing code from the AS2x00 platform because its not required (it has never been present in -stable). Tested on: UP1000, Miata(GL), XP1000, AS2100, AS500
* Backout previous revision. While it fixed many platforms, it brokegallatin2001-05-311-7/+2
| | | | | | | all alphas with devices behind ppb's. I'm working on a better solution now. Note that all alphas that use per-platform interrupt mapping are broken again (as they have been for several months)
* finally fix intr routing on alphas such as the as500 after months ofgallatin2001-05-271-2/+7
| | | | | | | | | | | | | | | | | | | breakage: - call PCIB_ROUTE_INTERRUPT() regardless of how valid the intline looks. Some alphas leave garbage in the intline and leave the intr mapping to OS platform support routines that map slots/buses to intlines - Down in the alpha pci code, first try platform.pci_intr_route() and if it doesn't exist or returns garbage, just read the intline out of config space. tested on AS500 (garbage in intline) and UP1000 (PC-like, intline is valid) Note that a nice little hack like the APIC_IO section of pci_cfgregread() is not workable. This is because the calling interface for alpha_pci_route_interrupt() requires us to figure out the bus/slot/etc from a device_t. At pci_read_device() time, we don't have a device_t for the bus/slot/func in question.
* Make sure that all resource allocation is handled in the pcib device, notdfr2001-05-2312-119/+90
| | | | | | | | the chipset. This is already how the multi-hose systems handle resource allocation and it fixes a bug where dense and bwx memory allocations were not handled properly. Reviewed by: gallatin
* fix alpha-MD compile errors after the vm_mtx commitgallatin2001-05-206-0/+6
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* Switch from save/disable/restore_intr() to critical_enter/exit().jhb2001-03-281-7/+8
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* Use the MI ithread helper functions in the alpha hardware interrupt code.jhb2001-02-094-9/+5
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* Send "#if NISA > 0" to the bit-bucket and replace it with an option.peter2001-01-291-5/+6
| | | | | These were compile-time "is the isa code present?" tests and not 'how many isa busses' tests.
* Next phase in the PCI subsystem cleanup.msmith2000-12-089-36/+54
| | | | | | | | | | | | | | | | | | | | - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
* Partially re-write T2 chipset support based on Tru64 platform supportgallatin2000-12-074-86/+450
| | | | | | | | | | | | | | | | | | | files which Compaq open-sourced (with a BSD license). This commit adds support for proper PCI interrupt mapping and much better support for swizzling between "standard" isa IRQs and the stdio irqs used by the t2. This also adds enabling/disabling/eoi support for AlphaServer 2100A machines. The 2100A (or lynx) interrupt hardware is is very different (and much nicer) than the 2100. Previously, only AS2100 and AS2000 machines worked. This commits also lays the groundwork for supporting ExtIO modules. These modules are essentially a second hose. This work is left unfinished pending testing on real hardware. Wilko tells me that ExtIO modules are quite rare, and may not actually exist in the wild. Obtained from: Tru64 Tested by: wilko
* Fix for vanilla PC164 systems to use a slightly different PALcode magicmjacob2000-12-041-0/+30
| | | | | | | | tweak to enable/disable interrupt sources. Seems to work. It is unclear how many of the PC164 models actually might needs this, and whether or not there are other hidden issues. Obtained from:Bernd Walter <ticso@cicely8.cicely.de>
* Convert the pcib_{read,write}_config args from signed to unsigned,gallatin2000-12-018-29/+29
| | | | | | | | | | | like the args to the config space accessors these functions replaced. This reduces the likelyhood of overflow when the args are used in macros on the alpha. This prevents memory management faults when probing the pci bus on sables, multias and nonames. Approved by: dfr Tested by: Bernd Walter <ticso@cicely8.cicely.de>
* fix isa DMA on pyxis based machines:gallatin2000-11-211-7/+8
| | | | | | | | | | | | - move the call to cia_init_sgmap() to after we've determined if we're a pyxis - convert needed splhigh() in cia_sgmap_invalidate_pyxis() to disable_intr() Previously, any isa DMA on a pyxis based machine would cause a panic in cia_sgmap_invalidate_pyxis() because the pyxis workaround was never setup. - while i'm at it, convert needed splhigh() in cia_swiz_set_hae_mem to disable_intr()
* Fix typo in END macro (END'ed enable twice)mjacob2000-11-091-1/+1
| | | | | PR: 22713 Submitted by: Bernd Walter <ticso@cicely5.cicely.de>
* Pass in the new-bus flags to alpha_setup_intr().jhb2000-11-014-5/+5
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* - Heavyweight interrupt threads on the alpha for device I/O interrupts.jhb2000-10-055-18/+110
| | | | | | | | | | | - Make softinterrupts (SWI's) almost completely MI, and divorce them completely from the x86 hardware interrupt code. - The ihandlers array is now gone. Instead, there is a MI shandlers array that just contains SWI handlers. - Most of the former machine/ipl.h files have moved to a new sys/ipl.h. - Stub out all the spl*() functions on all architectures. Submitted by: dfr
* Well, this works for me and I can now boot my PC164 again.mjacob2000-09-111-34/+41
| | | | Nobody said it broke their system.
* A quick fix to get around a problem (described below) with cia basedgallatin2000-09-022-3/+5
| | | | | | | | | | | | | | | | | machines. The patch uses an existing global variable in place of the newbus accessor to get at use_bwx. This is a quick fix to get miatas booting again; somebody with more newbus skills than I can muster will have to correct it. Matt Jacob's description of the problem from the -alpha list: The IVAR accessor stuff for pcib is incompletely specified for CIA. There's only one accessor defined, and that's to get the BUS instance number. <..> The device methods that try and get at the use_bwx get overriden because there's only one ivar for CIA's pcib, and that's for hose #, and it's always zero.
* Introduce explicit break statements in the various chipsets'gallatin2000-08-316-0/+28
| | | | | | | | | | foo_pcib_[read|write]_config() functions rather than relying on a break or return being in the CFG macro. This fixes a panic later in the boot process on a UP1000. From inspection, it looks like this fixes a similar problem in the tsunami code. Approved by: dfr
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