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path: root/sys/alpha/pci/tsunami.c
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* Make sure that all resource allocation is handled in the pcib device, notdfr2001-05-231-4/+2
| | | | | | | | the chipset. This is already how the multi-hose systems handle resource allocation and it fixes a bug where dense and bwx memory allocations were not handled properly. Reviewed by: gallatin
* fix alpha-MD compile errors after the vm_mtx commitgallatin2001-05-201-0/+1
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* Use the MI ithread helper functions in the alpha hardware interrupt code.jhb2001-02-091-2/+1
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* Pass in the new-bus flags to alpha_setup_intr().jhb2000-11-011-1/+1
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* - Heavyweight interrupt threads on the alpha for device I/O interrupts.jhb2000-10-051-3/+21
| | | | | | | | | | | - Make softinterrupts (SWI's) almost completely MI, and divorce them completely from the x86 hardware interrupt code. - The ihandlers array is now gone. Instead, there is a MI shandlers array that just contains SWI handlers. - Most of the former machine/ipl.h files have moved to a new sys/ipl.h. - Stub out all the spl*() functions on all architectures. Submitted by: dfr
* * Completely rewrite the alpha busspace to hide the implementation fromdfr2000-08-281-296/+12
| | | | | | | | | | | | the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
* Improve the mapping between the hardware PCI bus numbering on multi-hosegallatin1999-12-141-8/+8
| | | | | | | | | | | | | | tsunami systems and the PCI bus-numbering system of FreeBSD. Eg, the former allows for 2 PCI bus 2's (one each on hoses 0 and 1) while the latter needs to give each PCI bus a unique monotonically increasing number. It has been fairly well tested and correctly maps machines with a ppb on hose 1 as well as machines with ppbs on both hoses. DS10s remain untested, as I do not have a pci card with a ppb which will pass POST in a tsunami. This is a house of cards.
* Remove the 'ivars' arguement to device_add_child() andmdodd1999-12-031-1/+3
| | | | | | | | | | | | | | | | device_add_child_ordered(). 'ivars' may now be set using the device_set_ivars() function. This makes it easier for us to change how arbitrary data structures are associated with a device_t. Eventually we won't be modifying device_t to add additional pointers for ivars, softc data etc. Despite my best efforts I've probably forgotten something so let me know if this breaks anything. I've been running with this change for months and its been quite involved actually isolating all the changes from the rest of the local changes in my tree. Reviewed by: peter, dfr
* Add a second direct map window to increase the maximum RAM this platformgallatin1999-11-031-28/+43
| | | | | | | can deal with from 1GB to 2GB. I have no way to test with >1GB because I don't have high enough density memory to get any one box over 1GB. However, I have tested it on xp1000 & ds10 with < 1GB of memory & have verified that it does no harm.
* useracc() the prequel:phk1999-10-291-1/+0
| | | | | | | | | | | Merge the contents (less some trivial bordering the silly comments) of <vm/vm_prot.h> and <vm/vm_inherit.h> into <vm/vm.h>. This puts the #defines for the vm_inherit_t and vm_prot_t types next to their typedefs. This paves the road for the commit to follow shortly: change useracc() to use VM_PROT_{READ|WRITE} rather than B_{READ|WRITE} as argument.
* allow pci_ioctl to work with multi-hose alphas.gallatin1999-10-121-4/+12
| | | | | | | | Rather than teaching pci_ioctl about hoses, we just pass down a magic number & let the platform code figure out what the hose is based on what the bus number is. concept approved by dfr
* This fix allows cards inserted in one of the bottem-most slots on an xp1000gallatin1999-09-301-2/+2
| | | | | | | | | | | | (behind the built-in ppb on hose 1) to be found: When testing the adaptec controller on alpha, I realized I misread the xp1000 documentation and the way I'm calculating the bus number for PCI config space accesses on the tsunami is wrong. I had thought that a bus behind a ppb should be numbered as the nth bus in that hose, but it actually needs to be the nth global bus within the system. The bus number for the primary bus on a hose must always remain 0 when calculating config space addresses.
* $Id$ -> $FreeBSD$ (some mangled and/or hidden ones)peter1999-08-281-1/+1
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* - detect the number of pchips actually present; don't just assume 2gallatin1999-08-101-7/+75
| | | | - support S/G DMA for ISA devices
* Pull some prototypes into scopepeter1999-07-011-0/+1
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* Add support for the DEC_ST6600 family of alphas. This includes thegallatin1999-05-261-0/+576
Compaq XP1000, AlphaServer DS20, AlphaServer DS10, and DP264 This has been tested *only* on XP1000's. I'll be interested to hear from owners of other types of DEC_ST6600 alphas. I'd like to thank Don Rice of Compaq for providing the documentation required to support this platform on FreeBSD. I'd also like to thank Doug Rabson for newbus, and for helping me get a multiple hoses working with newbus. Reviewed by: Doug Rabson <dfr@nlsystems.com>
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