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* Doug found that doing a W1C on MCPCIA_INT_REQ just around the time youmjacob2001-02-131-12/+27
| | | | | | | | clear MCPCIA_INT_MASK0 helps things substantially. So, why not indeed? Rearrange irq and cookie calculation to use shifts/masks instead of division. Fix things to correctly remember the intpin for that one in a million non-INTA PCI device.
* add defines for EISA, NCR IRQs; add defines for MID and SLOT shift valuesmjacob2001-02-131-0/+5
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* add mcbus minimum id valuemjacob2001-02-131-1/+2
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* Doug noticed that the bit values for _MCPCIA_INT_ACK0/_MCPCIA_INT_ACK1mjacob2001-02-131-4/+13
| | | | | | | | | made no sense in the context of wrapping them within the _SYBRIDGE macro- or anything like it- so we concluded that this must have been a typo in the docs. This also doesn't use the same bridge offset as anything else. Add some defines for the INT_CTL register.
* Use the MI ithread helper functions in the alpha hardware interrupt code.jhb2001-02-091-3/+2
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* Fix ypo in essage about isabling EISA nterrupt ectormjacob2000-12-151-1/+1
| | | | (tip 'o the tired cap to Bernd Walter <ticso@cicely5.cicely.de>)
* Add route interrupt method.mjacob2000-12-131-0/+2
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* Comment out debug printfs about enable/disable ints.mjacob2000-12-041-2/+2
| | | | Current now appears to work at least fitfully on one Rawhide.
* Clean this is up a bit for multiple MIDs... We can figure out which MIDmjacob2000-11-081-40/+59
| | | | | | | | for an interrupt to enable/disable from the vector (and GID too, if we had multiple GIDs)- so, stupidly for now, search for the right mcpcia's softc so we have the right base address for the bridge CSR to apply IRQ bit-twiddle's to. Alas- this doesn't yet allow us to run, but it's the right direction.
* Pass in the new-bus flags to alpha_setup_intr().jhb2000-11-011-1/+1
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* - Heavyweight interrupt threads on the alpha for device I/O interrupts.jhb2000-10-051-3/+70
| | | | | | | | | | | - Make softinterrupts (SWI's) almost completely MI, and divorce them completely from the x86 hardware interrupt code. - The ihandlers array is now gone. Instead, there is a MI shandlers array that just contains SWI handlers. - Most of the former machine/ipl.h files have moved to a new sys/ipl.h. - Stub out all the spl*() functions on all architectures. Submitted by: dfr
* * Completely rewrite the alpha busspace to hide the implementation fromdfr2000-08-282-379/+222
| | | | | | | | | | | | the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
* Handle (for now) trivial one level bridge case so we can get themjacob2000-07-131-0/+8
| | | | | slot that the bridge happens to be in so we get interrupts working on bridged cards.
* Coordinate with change to mcpcia_pci.c- major primary busses on eachmjacob2000-07-101-28/+30
| | | | | | | | hose are 16 PCI instances apart. This allows us to recognize secondary PCI busses (at least to a first level) until the pci infrastructure is fixed. Turn on support for secondary cycles, too. Redo debug printouts.
* Enable EISA interrupts if the mcpcia has an attached EISA bus.dfr2000-05-131-5/+9
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* Change references/comments about 'secondary' to reflect that while we'dmjacob2000-05-091-17/+20
| | | | | | | | like to see the true SRM bus number be passed to us, instead, we get FreeBSD's PCI bus instance number (Brzzt! Wrong Answer!). Also, once we've seen the MCPCIA that has the EISA bus on it, call dec_kn300_cons_init just before configuring devices on this bus.
* Pass the vector on thru instead of checking EISA/ISA ints. It turnsmjacob2000-05-071-10/+0
| | | | | out the FreeBSD code did the right thing by starting EISA/ISA vectors at 0x800.
* EISA/ISA memory space is any pa < 8MB.mjacob2000-05-071-2/+24
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* Add in a first pass at Alpha 4100 (Rawhide) support. It doesn't quitemjacob2000-05-077-0/+1802
boot all the way yet, but it's darn close (blows up somewhere probing the PS/2 mouse on the EISA bus).
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