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* Add a new CPUTYPE supported by Clang 3.3 for AMD Jaguar processors (btver2).jkim2013-06-131-0/+4
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* Nuke ARM_WANT_TP_ADDRESS, it's not used anymore.cognet2013-01-071-3/+3
| | | | | Don't force -march=armv6 for Cortex A, as we want at least armv6k. The compiler default is good enough.
* Fix typos in the previous commit.jkim2012-12-041-2/+2
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* Tidy up bsd.cpu.mk for X86 CPUs:jkim2012-12-041-31/+43
| | | | | | | | | | | | | | | | | | | | - Do not limit recent processors to "prescott" class for i386 target. There is no reason for this hack because clang is default now. On top of that, it will only grow indefinitely over time. - Add more CPUTYPEs, i.e., "athlon-fx", "core-avx2", "atom", "penryn", and "yonah". Note "penryn" and "yonah" are intentionally undocumented because they are not supported by gcc and marked deprecated by clang. - Add more CPUTYPE aliases, i.e., "barcelona" (-> amdfam10), "westmere" and "nehalem" (-> corei7). Note these are intentionally undocumented because they are not supported by (base) gcc and/or clang. However, LLVM (backend) seems to "know" the differences. Most likely, they were deprecated with other vendor code names and clang did not bother implementing them at all. - Add i686 to MACHINE_CPU for "c3-2" (VIA Nehemiah). Both gcc & clang treat it like an i686-class processor. - Add IDT "winchip2" and "winchip-c6" for completeness (undocumented). - Order processors per make.conf example, i.e., CPU vendors and models. - Tidy up make.conf example, i.e., remove "by gcc" (because we have aliases) and remove "prescott" from AMD64 architecture (because it is not correct).
* Remove fictitious support for 80386-class CPUs from bsd.cpu.mk and make(1).jkim2012-12-031-27/+22
| | | | | | It was removed from head more than 8 years ago (see r137784 and r137785). Reviewed by: imp, delphij, dim
* Add x86 CPUs supported by clang on head.jkim2012-11-191-9/+35
| | | | | Reviewed by: arch (silence) X-MFC: r242624
* Merging of projects/armv6, part 3gonzo2012-08-151-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | r238211: Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb This adds a new TARGET_ARCH for building on ARM processors that support the ARMv6K multiprocessor extensions. In particular, these processors have better support for TLS and mutex operations. This mostly touches a lot of Makefiles to extend existing patterns for inferring CPUARCH from ARCH. It also configures: * GCC to default to arm1176jz-s * GCC to predefine __FreeBSD_ARCH_armv6__ * gas to default to ARM_ARCH_V6K * uname -p to return 'armv6' * make so that MACHINE_ARCH defaults to 'armv6' It also changes a number of headers to use the compiler __ARM_ARCH_XXX__ macros to configure processor-specific support routines. Submitted by: Tim Kientzle <kientzle@freebsd.org>
* Remove support for the Intel C Compiler from the build infrastructure.dim2011-04-191-29/+0
| | | | | | This support has not worked for several years, and is not likely to work again, unless Intel decides to release a native FreeBSD version of their compiler. ;)
* Add ssse3 capability for CPUTYPE=core2 to MACHINE_CPU in bsd.cpu.mkmm2011-03-141-2/+8
| | | | MFC after: 2 weeks
* Add AMD Geode CPU type to bsd.cpu.mk and examples/etc/make.confmm2011-03-071-3/+3
| | | | | | | For CPUTYPE=core2 use -march=core2 PR: gnu/155308 MFC after: 2 weeks
* Add opteron-sse3, athlon64-sse3 and k8-sse3 cpu types to bsd.cpu.mk.mm2011-02-201-2/+9
| | | | | | | | | - add "sse3" to MACHINE_CPU for the new cpu types - for i386, default to CPUTYPE=prescott for the new cpu types PR: gnu/154906 Discussed with: kib, kan, dim MFC after: 2 weeks
* - Add CPUTYPE support for sparc64. The net result is that it's now possiblemarius2010-12-301-2/+28
| | | | | | | | | to let the compiler optimize for the famility of UltraSPARC-III CPUs as the default already was to optimize for UltraSPARC-I/II and generating generic 64-bit V9 is mainly for reference purposes. At least for SPARC64-V CPUs code optimized for UltraSPARC-I/II still is the most performant one. Thanks go to Michael Moll for testing SPARC64-V. - Move a booke MACHINE_CPU bit into the right section.
* This case is actually powerpc specific, and doesn't apply to powerpc64.imp2010-11-141-1/+1
| | | | Submitted by: nathanw@
* Complete the integration of tbemd branch into head.imp2010-11-101-7/+1
| | | | | | | | | | | | | | | | TARGET_BIG_ENDIAN is now completely dead, except where it was originally supposed to be used (internally in the toolchain building). TARGET_ARCH has changed in three cases: (1) Little endian mips has changed to mipsel. (2) Big endian mips has changed to mipseb. (3) Big endian arm has changed to armeb. Some additional changes are needed to make 'make universe' work on arm and mips after this change, so those are commented out for now. UPDATING information will be forthcoming. Any remaining rough edges will be hammered out in -current.
* Prefer MACHINE_CPUARCH to MACHINE_ARCH unless there's a good reason...imp2010-09-131-18/+18
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* Now that we default to the proper endian, we don't need these for mipsimp2010-08-281-7/+0
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* Minor modifications to know what to do with powerpc64.nwhitehorn2010-07-101-1/+3
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* When CPUTYPE is defined to any value, on amd64 platform "mmx" isdelphij2010-04-211-1/+1
| | | | | | | | | | | | available through MACHINE_CPU, indicating the CPU supports that feature, as done by revision 138685. This changeset adds "mmx" into the default amd64 MACHINE_CPU list when no CPUTYPE is specified to provide consistent behavior. PR: amd64/145593 Submitted by: mm MFC after: 2 weeks
* -mabi-calls and -msoft-float aren't needed eitherimp2010-03-021-1/+1
| | | | Submitted by: jmallet@
* -mno-dsp hasn't been required for a while now.imp2010-03-021-1/+1
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* Kernel module support for mips.neel2010-02-181-2/+0
| | | | | | Reviewed by: gonzo Tested by: Alexandr Rybalko (ray@dlink.ua)
* Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge modenwhitehorn2009-04-041-1/+1
| | | | | | | | | | provided, for example, on the PowerPC 970 (G5), as well as on related CPUs like the POWER3 and POWER4. This also adds support for various built-in hardware found on Apple G5 hardware (e.g. the IBM CPC925 northbridge). Reviewed by: grehan
* Explicitly disable generation of Altivec instructions in the kernel on PowerPC,nwhitehorn2009-02-221-0/+2
| | | | and add support to allow users to set their CPUTYPE in make.conf.
* Fix links to online gcc docs.ale2008-06-251-3/+3
| | | | | Reported by: Andre Guibert de Bruet <andy@siliconlandmark.com> MFC after: 1 day
* Add support for MACHINE_ARCH == mips, plus a few generic CPU types thatimp2008-03-191-0/+30
| | | | will be supported in the forth coming FreeBSD/mips port.
* Connect MPC85XX to the PowerPC build.raj2008-03-031-0/+7
| | | | | | | | | | | | | | | | | The kernel config file is KERNCONF=MPC85XX, so the usual procedure applies: 1. make buildworld TARGET_ARCH=powerpc 2. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX This default config uses kernel-level FPU emulation. For the soft-float world approach: 1. make buildworld TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 2. disable FPU_EMU option in sys/powerpc/conf/MPC85XX 3. make buildkernel TARGET_ARCH=powerpc TARGET_CPUTYPE=e500 KERNCONF=MPC85XX Approved by: cognet (mentor) MFp4: e500
* Add a 'c7' CPUTYPE for VIA C7 CPUs that is 'c3-2' with the addition ofjhb2008-02-291-0/+2
| | | | | | i686, sse2, and sse3. MFC after: 1 week
* Backout rev 1.62, and revert to use -march=armv5te -D__XSCALE__ insteadcognet2007-10-161-1/+3
| | | | | | | | | of -mcpu=xscale for XScale. gcc still has issues with -mcpu=xscale, and now crashes while building systat. Reported by: sam MFC After: 3 days
* GCC doesn't segfault anymore while building world with -mcpu=xscale, so use it.cognet2007-05-211-3/+1
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* "If I only had a brain..."des2007-01-171-1/+1
| | | | MFC after: 3 weeks
* Correct errors in previous commit. I didn't realize that ${CPUTYPE} isdes2007-01-171-6/+6
| | | | | | | | passed unmodified to gcc. Therefore, "prescott" should be used for Prescott, Nocona, Core and Core 2 CPUs when building 32-bit code, and "nocona" should be used for Prescott, Nocona and Core 2 CPUs when building 64-bit code. MFC after: 3 weeks
* On i386, make "prescott" an alias for "nocona" (instead of the other waydes2007-01-171-3/+7
| | | | | | | | | around), and introduce "core", along with the alias "core2". All of these enable SSE3. On amd64, add "core2" (enables SSE3). MFC after: 3 weeks
* Use TARGET_BIG_ENDIAN instead of ARM_BIG_ENDIANcognet2006-10-191-1/+1
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* Remove alpha left-overs.ru2006-08-221-25/+0
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* Revert previous commit. Pre-Nehemiah C3 CPUs do have 3DNow!; it doesn'tdes2006-08-131-1/+1
| | | | | show up in dmesg because identcpu.c only looks for it on Intel and AMD processors.
* I don't know where I got the idea that the VIA C3 has 3DNow!; it doesn't.des2006-08-121-1/+1
| | | | | | | It does have MMX (though MMX support is reputed to be incomplete in early generations), and later generations have SSE. MFC after: 2 weeks
* Grr we also need to set -mbig-endian to LDFLAGS. Now I can build acognet2006-07-211-0/+1
| | | | big-endian arm world.
* Remove ALPHA optimization pointer for gcc flags.imp2006-07-201-1/+1
| | | | Add ARM optimization pointer for gcc flags.
* Oops LDFLAGS can be used to invoke gcc, so directly add -EB to {LD}.cognet2006-07-201-1/+1
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* Honor ARM_BIG_ENDIAN by adding -mbig-endian to CFLAGS and -EB to LDFLAGS ifcognet2006-07-201-0/+5
| | | | it is defined.
* Add CPUTYPE support for Via C3 and C3-2 processors.des2006-07-191-0/+4
| | | | MFC after: 2 weeks
* Add a MACHINE_CPU entry for "ev67".ru2005-12-061-1/+3
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* Use -march=armv5te for Xscale.cognet2005-05-241-1/+1
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* Rev 1.44 was a little over-zealous for FreeBSD/AMD64, trim.obrien2004-12-111-2/+3
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* No need to add I386_CPU to CFLAGS here for 80386 systems as they are nojhb2004-11-161-3/+0
| | | | longer supported.
* Define "I386_CPU" if CPUTYPE is 'i386'. Userland bits can check for "I386_CPU"obrien2004-10-191-0/+3
| | | | | | to determine if they should select code paths suitable for the 80386 CPU. Suggested by: ru
* Embellish the AMD64 sections a little. Including supporting 'nocona'.obrien2004-10-171-8/+20
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* + Simplify by treating the standard x86 CPU names as the CPUTYPE vs.obrien2004-10-171-69/+46
| | | | | | | | | treating them as an alias. Treat the shorthand versions as aliases. + Separate the x86 GCC CPU CFLAGS from the ICC CFLAGS. This greatly simplifies the GCC section. It also makes it more clear which CPU's have the same ICC CPU CFLAGS. + Remove redundancy in the alpha section. + Add forgotten ICC CPU CFLAGS for the mobile Intel CPU's added in rev. 1.42.
* Add support for Pentium M, Pentium 3M and Pentium 4M.des2004-10-071-2/+14
| | | | | | PR: i386/72340 Submitted by: Rong-En Fan <rafan@infor.org> MFC after: 2 weeks
* Add CPUCFLAGS for the strongarm and xscale CPUs.cognet2004-09-231-0/+8
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