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* MFC r323230:kib2017-09-201-1/+23
| | | | Skylake server core PMC support for hwpmc(4).
* MFC r323229:kib2017-09-201-5/+6
| | | | Minor style changes to make forthcoming code stand out less.
* MFC r316601:ngie2017-07-191-43/+45
| | | | | | | | | pmc.atomsilvermont(3): fix manlint warnings Start new sentences on new lines. Sentences affected by the change are wrapped at <80 columns. Other potentially offending lines have been left alone to reduce churn.
* MFC r316600:ngie2017-07-191-1/+14
| | | | | | | pmc(3): add additional references for libpmc functions in the SEE ALSO section These functions are already referenced throughout the manpage -- this makes their presence more apparent.
* MFC r316602:ngie2017-07-191-1/+1
| | | | | | pmc_read(3): fix manlint error Remove spurious trailing comma from last .Nm entry in NAME section.
* MFC r318816:trasz2017-06-061-1/+1
| | | | | | Don't end up manpage titles with a full stop. Approved by: re (marius)
* MFC r316468:trasz2017-04-231-1/+1
| | | | | | Fix typo. Sponsored by: DARPA, AFRL
* lib: minor spelling fixes in comments.pfg2016-05-011-1/+1
| | | | No functional change.
* MFHgjb2016-03-021-0/+1
|\ | | | | | | Sponsored by: The FreeBSD Foundation
| * Connect pmc.haswellxeon(3) to the build; looks like it was missed in r279829.trasz2016-03-011-0/+1
| | | | | | | | | | MFC after: 1 month Sponsored by: The FreeBSD Foundation
* | First pass through library packaging.gjb2016-02-041-0/+1
|/ | | | Sponsored by: The FreeBSD Foundation
* Add support for Intel Skylake and Intel Broadwell PMC's. The Broadwell PMC's ↵rrs2015-11-301-1/+117
| | | | | | | | | | | | have been tested on the Broadwell-Xeon with a hacked up version of pmcstudy -T. I still need to circle back and add in to pmcstudy all the new tests from the Broadwell Vtune guide (for the hacked up version I just made it so I could run the -T option). The Skylake CPU is not yet available (even though Intel is advertising it .. imagine that). The Skylake PMC's will need to be tested once we can get a sample skylake CPU :-) Sponsored by: Netflix Inc.
* META MODE: Prefer INSTALL=tools/install.sh to lessen the need for xinstall.host.bdrewery2015-11-251-1/+0
| | | | | | | | This both avoids some dependencies on xinstall.host and allows bootstrapping on older releases to work due to lack of at least 'install -l' support. Sponsored by: EMC / Isilon Storage Division
* Change the driver stats to what they really are: unsigned values.jtl2015-11-161-8/+9
| | | | | | | | | | | When pmcstat exits after some samples were dropped, give the user an idea of how many were lost. (Granted, these are global numbers, but they may still help quantify the scope of the loss.) Differential Revision: https://reviews.freebsd.org/D4123 Approved by: gnn (mentor) MFC after: 1 month Sponsored by: Juniper Networks
* For the Cortex-A8 use the a8 and not the a9 events table.bz2015-10-141-1/+1
| | | | | | MFC after: 2 weeks Sponsored by: DARPA/AFRL Differential Revision: https://reviews.freebsd.org/D3882
* Add META_MODE support.sjg2015-06-131-0/+19
|\ | | | | | | | | | | | | | | | | | | | | Off by default, build behaves normally. WITH_META_MODE we get auto objdir creation, the ability to start build from anywhere in the tree. Still need to add real targets under targets/ to build packages. Differential Revision: D2796 Reviewed by: brooks imp
| * dirdeps.mk now sets DEP_RELDIRsjg2015-06-081-2/+0
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| * Merge sync of headsjg2015-05-2716-410/+1452
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| * \ Merge head from 7/28sjg2014-08-1929-84/+110
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| * | | Updated dependenciessjg2014-05-161-1/+1
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| * | | Updated dependenciessjg2014-05-101-0/+2
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| * | | Merge headsjg2014-04-275-11/+593
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| * \ \ \ Merge from headsjg2013-09-051-12/+8
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| * \ \ \ \ sync from headsjg2013-04-126-2/+1280
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| * | | | | | Updated dependenciessjg2013-03-111-0/+1
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| * | | | | | Updated dependenciessjg2013-02-161-2/+0
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| * | | | | | Sync with HEAD.obrien2013-02-086-3/+940
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| * | | | | | | Updated/new Makefile.dependsjg2012-11-081-0/+3
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| *-. \ \ \ \ \ \ Sync from headsjg2012-11-047-64/+2080
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| * | | | | | | | | Sync FreeBSD's bmake branch with Juniper's internal bmake branch.marcel2012-08-221-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Requested by: Simon Gerraty <sjg@juniper.net>
* | | | | | | | | | o Rework ARMv7 events list using aliases - same way as we have for arm64.br2015-06-101-10/+53
| |_|_|_|_|_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | o Extend it with Cortex A9-specific events.
* | | | | | | | | Use fixed enum values for PMC_CLASSES().jhb2015-05-191-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes one of the frequent causes of ABI breakage when new CPU types are added to hwpmc(4). Differential Revision: https://reviews.freebsd.org/D2586 Reviewed by: davide, emaste, gnn (earlier version) MFC after: 2 weeks
* | | | | | | | | Add Performance Monitoring Counters support for AArch64.br2015-05-191-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Family-common and CPU-specific counters implemented. Supported CPUs: ARM Cortex A53/57/72. Reviewed by: andrew, bz, emaste, gnn, jhb Sponsored by: ARM Limited Differential Revision: https://reviews.freebsd.org/D2555
* | | | | | | | | Minor mdoc fixes.joel2015-04-201-1/+1
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* | | | | | | | | Implement hwpmc(4) for Freescale e500 core.jhibbits2015-04-181-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports e500v1, e500v2, and e500mc. Tested only on e500v2, but the performance counters are identical across all, with e500mc having some additional events. Relnotes: Yes
* | | | | | | | | Add support for the MIPS74K SoC family performance counters events.adrian2015-04-051-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are similar to the mips24k performance counters - some are available on perfcnt0/3, some are available on perfcnt1/4. However, the events aren't all the same. * Add the events, named the same as from Linux oprofile. * Verify they're the same as "MIPS32(R) 74KTM Processor Core Family Software User's Manual"; Document Number: MD00519; Revision 01.05. * Rename INSTRUCTIONS to something else, so it doesn't clash with the alias INSTRUCTIONS. I'll try to tidy this up later; there are a few other aliases to add and shuffle around. Tested: * QCA9558 SoC (AP135 board) - MIPS74Kc core (no FPU.) * make universe; where it didn't fail for other reasons. TODO: * It'd be nice to support the four performance counters in at least this hardware, rather than just two. Reviewed by: bsdimp ("looks good; don't break world".)
* | | | | | | | | Fix Ivy Bridge+ MEM_UOPS_RETIRED countersrstone2015-03-104-98/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MEM_UOPS_RETIRED actually work the same way as the Sandy Bridge counters, but the counters were documented in a different way and that seemed to cause the Ivy Bridge counters to be implemented incorrectly. Use the same counter definitions as Sandy Bridge. While I'm here, rename the counters to match what's documented in the datasheet. Differential Revision: https://reviews.freebsd.org/D1590 MFC after: 1 month Sponsored by: Sandvine Inc.
* | | | | | | | | Use the correct event table for Haswell Xeon eventsrstone2015-03-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Differential Revision: https://reviews.freebsd.org/D1588 MFC after: 1 month Sponsored by: Sandvine Inc.
* | | | | | | | | Fix Sandy Bridge+ hwpmc branch countersrstone2015-03-106-329/+230
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Sandy Bridge and later, to count branch-related events you have to or together a mask indicating the type of branch instruction to count (e.g. direct jump, branch, etc) and a bits indicating whether to count taken and not-taken branches. The current counter definitions where defining this bits individually, so the counters never worked and always just counted 0. Fix the counter definitions to instead contain the proper combination of masks. Also update the man pages to reflect the new counters. Differential Revision: https://reviews.freebsd.org/D1587 MFC after: 1 month Sponsored by: Sandvine Inc.
* | | | | | | | | Add manpage for Haswell Xeon pmc implementationrstone2015-03-102-0/+976
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Differential Revision: https://reviews.freebsd.org/D1584 Reviewed by: gnn MFC After: 1 month Sponsored by: Sandvine Inc
* | | | | | | | | Add ARMv7 performance monitoring counters.br2015-01-281-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Differential Revision: https://reviews.freebsd.org/D1687 Reviewed by: rpaulo Sponsored by: DARPA, AFRL
* | | | | | | | | Update the hwpmc driver to have the new type HASWELL_XEON. Alsorrs2015-01-141-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | go back through HASWELL, IVY_BRIDGE, IVY_BRIDGE_XEON and SANDY_BRIDGE to straighten out all the missing PMCs. We also add a new pmc tool pmcstudy, this allows one to run the various formulas from the documents "Using Intel Vtune Amplifier XE on XXX Generation platforms" for IB/SB and Haswell. The tool also allows one to postulate your own formulas with any of the various PMC's. At some point I will enahance this to work with Brendan Gregg's flame-graphs so we can flamegraph various PMC interactions. Note the manual page also needs some work (lots of work) but gnn has committed to help me with that ;-) Reviewed by: gnn MFC after:1 month Sponsored by: Netflix Inc.
* | | | | | | | | mdoc: sort SEE ALSO.joel2015-01-0412-53/+54
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* | | | | | | | Update the list of cross references to include the more modern set ofgnn2014-07-281-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | processors that we now support.
* | | | | | | | mdoc: remove superfluous paragraph macros.joel2014-06-232-2/+0
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* | | | | | | | use .Mt to mark up email addresses consistently (part3)bapt2014-06-2328-80/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PR: 191174 Submitted by: Franco Fichtner <franco at lastsummer.de>
* | | | | | | | For Xeon 7500 and 48XX (Nehalem EX and Westmere EX) variants of thekib2014-06-041-1/+45
| |_|_|_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Core i7 and Westmere processors, the uncore PMC subsystem is completely different from the uncore PMC on smaller versions of CPUs. Disable existing uncore hwpmc code for EX, otherwise non-existing MSRs are accessed. The cores PMCs seems to be identical for non-EX and EX, according to the SDM. Reviewed by: davide, fabient Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* | | | | | | Update hwpmc to support core events for Atom Silvermont microarchitecture.hiren2014-03-204-1/+560
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (Model 0x4D as per Intel document 330061-001 01/2014) Tested by: Olivier Cochard-Labbe <olivier@cochatrd.me> MFC after: 4 weeks
* | | | | | | Add hwpmc(4) support for the PowerPC 970 class processors, direct events.jhibbits2014-02-011-10/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This also fixes asserts on removal of the module for the mpc74xx. The PowerPC 970 processors have two different types of events: direct events and indirect events. Thus far only direct events are supported. I included some documentation in the driver on how indirect events work, but support is for the future. MFC after: 1 month
* | | | | | | pmc(3) does not document a dependency on <sys/types.h> but <pmc.h>rstone2013-11-251-0/+1
| |_|_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | requires it, so include it explicitly from <pmc.h>. MFC after: 1 month
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