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* mdoc: sort prologue macros.joel2012-03-291-1/+1
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* Remove trailing whitespace per mdoc lint warningeadler2012-03-293-5/+5
| | | | | | | Disussed with: gavin No objection from: doc Approved by: joel MFC after: 3 days
* Add software PMC support.fabient2012-03-2826-26/+234
| | | | | | | | | | | | | New kernel events can be added at various location for sampling or counting. This will for example allow easy system profiling whatever the processor is with known tools like pmcstat(8). Simultaneous usage of software PMC and hardware PMC is possible, for example looking at the lock acquire failure, page fault while sampling on instructions. Sponsored by: NETASQ MFC after: 1 month
* Remove useless Ta macro.joel2012-03-273-14/+14
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* Remove superfluous paragraph macro.joel2012-03-255-5/+0
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* Update manual pages for MIPS-related CPUs:gonzo2012-03-253-6/+261
| | | | | | | | - Rename pmc.mips to pmc.mips24k since it covers just one CPU, no whole architecture - Add documetnations for Octeon's PMC counters - Remove CAVEATS section from pmc.mips24k page: PMC for MIPS supports sampling now.
* Add Octeon-related parts to libpmcgonzo2012-03-231-0/+21
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* Correct a function prototype.jkoshy2012-03-221-1/+1
| | | | Submitted by: "Anders Magnusson" <ragge at ludd.ltu.se>, via joel
* Make reusable part of code have mips prefix, not mips24gonzo2012-03-221-9/+10
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* Kill EoL whitespaces, and minor lint.pluknet2012-03-022-297/+295
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* - Add support for the Intel Sandy Bridge microarchitecture (both core and ↵davide2012-03-014-0/+1203
| | | | | | | | | | | uncore counting events) - New manpages with event lists. - Add MSRs for the Intel Sandy Bridge microarchitecture Reviewed by: attilio, brueffer, fabient Approved by: gnn (mentor) MFC after: 3 weeks
* Whitespace cleanup:gjb2012-02-251-151/+220
| | | | | | | | | | o Wrap sentences on to new lines o Rewrap lines where possible while trying to keep the diff to a minimum Found with: textproc/igor MFC after: 1 week X-MFC-With: r232157
* Whitespace cleanup:gjb2012-02-251-15/+19
| | | | | | | | | o Wrap sentences on to new lines o Cleanup trailing whitespace Found with: textproc/igor MFC after: 1 week X-MFC-With: r232157
* Fix various typos in manual pages.gjb2012-02-252-4/+4
| | | | | | Submitted by: amdmi3 PR: 165431 MFC after: 1 week
* Switch the license boilerplates to our standard one.brueffer2012-02-1732-352/+352
| | | | | | | | | | | Advantages: - Reduces the number of different license versions in the tree - Eliminates a typo - Removes some incorrect author attributions due to c/p - Removes c/p error potential for future pmc manpages Approved by: jkoshy, gnn, rpaulo, fabient (copyright holders) MFC after: 1 week
* Update PMC events from October 2011 Intel documentation.fabient2012-01-041-11/+6
| | | | | Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 3 days
* Implement hwpmc counting PMC support for PowerPC G4+ (MPC745x/MPC744x).jhibbits2011-12-241-0/+62
| | | | | | | Sampling is in progress. Approved by: nwhitehorn (mentor) MFC after: 9.0-RELEASE
* In lib/libpmc/libpmc.c, struct pmc_cputype_map's pm_cputype field shoulddim2011-12-161-1/+1
| | | | | | be of type 'enum pmc_cputype', not 'enum pmc_class'. MFC after: 1 week
* Add a flush of the current PMC log buffer before displaying the next top.fabient2011-10-184-1/+21
| | | | | | | | As the underlying block is 4KB if the PMC throughput is low the measurement will be reported on the next tick. pmcstat(8) use the modified flush API to reclaim current buffer before displaying next top. MFC after: 1 month
* - change "is is" to "is" or "it is"eadler2011-10-161-1/+1
| | | | | | | | - change "the the" to "the" Approved by: lstewart Approved by: sahil (mentor) MFC after: 3 days
* Revert last commit: CPUTYPE will be defined hereimp2011-02-111-1/+1
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* Don't require CPUTYPE to be defined for ARM, but use it if it is.imp2011-02-111-1/+1
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* Fix manpage markup.uqs2010-11-062-3/+2
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* mdoc: drop redundant .Pp and .LP callsuqs2010-10-081-1/+0
| | | | They have no effect when coming in pairs, or before .Bl/.Bd
* Fix punctuation and grammar, mostly by ending sentences with a period.gnn2010-10-042-33/+33
| | | | MFC after: 1 day
* Fix invalid class removal when IAF is not the last class.fabient2010-09-051-4/+4
| | | | | | Keep IAF class with 0 PMC and change the alias in libpmc to IAP. MFC after: 1 week
* MFtbemd:imp2010-08-231-2/+2
| | | | | Prefer MACHNE_CPUARCH to MACHINE_ARCH in most contexts where you want to test of all the CPUs of a given family conform.
* Fix typos, spelling, formatting and mdoc mistakes found by Nobuyuki whilejoel2010-08-167-7/+7
| | | | | | translating these manual pages. Minor corrections by me. Submitted by: Nobuyuki Koganemaru <n-kogane@syd.odn.ne.jp>
* Fix typos and spelling mistakes.joel2010-08-064-8/+8
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* Spelling fixes.joel2010-08-033-5/+5
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* mdoc: remove literal tabs where they don't belonguqs2010-06-083-5/+5
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* Fix memory leak on error.fabient2010-06-051-1/+3
| | | | | Found with: Coverity Prevent(tm) MFC after: 1 month
* mdoc cleanupuqs2010-06-021-2/+0
| | | | | | | Garbage collect unused sections, macros and arguments. Fix prologue and remove empty lines. Found by: mdocml
* mdoc: Use mdoc macro for the (R) symboluqs2010-05-271-8/+8
| | | | While here, also drop the unneeded quotes
* mdoc: move CAVEATS, BUGS and SECURITY CONSIDERATIONS sections to theuqs2010-05-132-4/+4
| | | | | | | | | | | bottom of the manpages and order them consistently. GNU groff doesn't care about the ordering, and doesn't even mention CAVEATS and SECURITY CONSIDERATIONS as common sections and where to put them. Found by: mdocml lint run Reviewed by: ru
* When configuring hwpmc to use the EXT_SNOOP event, only send a default ↵rstone2010-05-011-1/+8
| | | | | | | cachestate qualifier on the Atom processor. Other Intel processors do not accept a cachestate qualifier and currently hwpmc will return EINVAL if you try to use the EXT_SNOOP event on those processors Approved by: jkoshy (mentor) MFC after: 2 weeks
* mdoc: order prologue macros consistently by Dd/Dt/Osuqs2010-04-1430-30/+30
| | | | | | | | Although groff_mdoc(7) gives another impression, this is the ordering most widely used and also required by mdocml/mandoc. Reviewed by: ru Approved by: philip, ed (mentors)
* - Support for uncore counting events: one fixed PMC with the uncorefabient2010-04-027-7/+5167
| | | | | | | | | | | | domain clock, 8 programmable PMC. - Westmere based CPU (Xeon 5600, Corei7 980X) support. - New man pages with events list for core and uncore. - Updated Corei7 events with Intel 253669-033US December 2009 doc. There is some removed events in the documentation, they have been kept in the code but documented in the man page as obsolete. - Offcore response events can be setup with rsp token. Sponsored by: NETASQ
* Finish the much belated Intel XScale hwpmc(4) man page.rpaulo2010-03-231-2/+119
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* Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.gnn2010-03-032-2/+475
| | | | | | | | Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
* Bug fix: add a missing initializer.jkoshy2010-01-121-0/+1
| | | | | Submitted by: Luca Pizzamiglio <luca.pizzamiglio at gmail dot com> PR: i386/142742
* Build lib/ with WARNS=6 by default.ed2010-01-021-2/+0
| | | | | | | | | Similar to libexec/, do the same with lib/. Make WARNS=6 the norm and lower it when needed. I'm setting WARNS?=0 for secure/. It seems secure/ includes the Makefile.inc provided by lib/. I'm not going to touch that directory. Most of the code there is contributed anyway.
* Intel XScale hwpmc(4) support.rpaulo2009-12-233-0/+86
| | | | | | | | | | | This brings hwpmc(4) support for 2nd and 3rd generation XScale cores. Right now it's enabled by default to make sure we test this a bit. When the time comes it can be disabled by default. Tested on Gateworks boards. A man page is coming. Obtained from: //depot/user/rpaulo/xscalepmc/...
* Use our canonical .Dd format.brueffer2009-11-021-1/+1
| | | | Submitted by: Ulrich Spoerlein
* Not all Intel Core (TM) CPUs implement PMC_CLASS_IAF fixed-functionjkoshy2009-10-241-12/+47
| | | | | | | counters. For such CPUs, use an alternate mapping of convenience names to events supported by PMC_CLASS_IAP programmable counters. Testing and review by: fabient
* Install x86 related man pages on x86 systems only.rpaulo2009-10-041-0/+2
| | | | Reviewed by: jkoshy
* Use a more appropriate choice of words.jkoshy2009-08-231-1/+1
| | | | Submitted by: danfe
* Use US spellings, fix typos.jkoshy2009-08-233-18/+18
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* Fix typos.jkoshy2009-08-231-7/+7
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* Fix a typo.jkoshy2009-08-231-1/+1
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