| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add <atomic> to ThreadPool.h, since std::atomic is used
Summary:
Apparently, when compiling with gcc 5.3.2 for powerpc64, the order of
headers is such that it gets an error about std::atomic<> use in
ThreadPool.h, since this header is not included explicitly. See also:
https://llvm.org/bugs/show_bug.cgi?id=27058
Fix this by including <atomic>. Patch by Bryan Drewery.
Reviewers: chandlerc, joker.eph
Subscribers: bdrewery, llvm-commits
Differential Revision: http://reviews.llvm.org/D18460
|
|
|
|
| |
upstream. Merging doesn't automatically do this, unfortunately.
|
| |
|
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
be merged to the official release_38 branch soon, but we need it ASAP):
Stop increasing alignment of externally-visible globals on ELF
platforms.
With ELF, the alignment of a global variable in a shared library will
get copied into an executables linked against it, if the executable even
accesss the variable. So, it's not possible to implicitly increase
alignment based on access patterns, or you'll break existing binaries.
This happened to affect libc++'s std::cout symbol, for example. See
thread: http://thread.gmane.org/gmane.comp.compilers.clang.devel/45311
(This is a re-commit of r257719, without the bug reported in
PR26144. I've tweaked the code to not assert-fail in
enforceKnownAlignment when computeKnownBits doesn't recurse far enough
to find the underlying Alloca/GlobalObject value.)
Differential Revision: http://reviews.llvm.org/D16145
|
| |
|
| |
|
|
|
|
|
|
| |
was not recognized anymore for arm targets. Fix this by adding the
correct sub-arch to the xscale definition in ARMTargetParser.def. This
fix (from Andrew Turner) has also been submitted upstream.
|
|
|
|
|
|
|
|
|
|
|
| |
llvm's LinkAllPasses.h. This caused some of the calls not to be
emitted, if the optimization level was -O2 or higher.
Conversely, if you used -O1 or lower, calls to e.g. RunningOnValgrind()
would be emitted, leading to link failures, because we did not include
Valgrind.cpp into libllvmsupport. Therefore, add it unconditionally.
Noticed by: ian
|
| |
|
| |
|
|
|
|
|
|
|
| |
bugfix-only release, with no new features.
Please note that from 3.5.0 onwards, clang and llvm require C++11
support to build; see UPDATING for more information.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
set div/rem default values to 'expensive' in TargetTransformInfo's
cost model
...because that's what the cost model was intended to do.
As discussed in D12882, this fix has a temporary unintended
consequence for SimplifyCFG: it causes us to not speculate an fdiv.
However, two wrongs make PR24818 right, and two wrongs make PR24343
act right even though it's really still wrong.
I intend to correct SimplifyCFG and add to CodeGenPrepare to account
for this cost model change and preserve the righteousness for the bug
report cases.
https://llvm.org/bugs/show_bug.cgi?id=24818
https://llvm.org/bugs/show_bug.cgi?id=24343
Differential Revision: http://reviews.llvm.org/D12882
This fixes the too-eager fdiv hoisting in pow(), which could lead to
unexpected floating point exceptions.
|
| |
|
| |
|
| |
|
| |
|
|
|
|
| |
r239412.
|
|
|
|
| |
preserve our customizations, where necessary.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This release contains the following cherry-picked revisions from
upstream trunk:
226124 226151 226164 226165 226166 226407 226408 226409 226652
226905 226983 227084 227087 227089 227208 227209 227210 227211
227212 227213 227214 227269 227430 227482 227503 227519 227574
227822 227986 227987 227988 227989 227990 228037 228038 228039
228040 228188 228189 228190 228273 228372 228373 228374 228403
228765 228848 228918 229223 229225 229226 229227 229228 229230
229234 229235 229236 229238 229239 229413 229507 229680 229750
229751 229752 229911 230146 230147 230235 230253 230255 230469
230500 230564 230603 230657 230742 230748 230956 231219 231237
231245 231259 231280 231451 231563 231601 231658 231659 231662
231984 231986 232046 232085 232142 232176 232179 232189 232382
232386 232389 232425 232438 232443 232675 232786 232797 232943
232957 233075 233080 233351 233353 233409 233410 233508 233584
233819 233904 234629 234636 234891 234975 234977 235524 235641
235662 235931 236099 236306 236307
Please note that from 3.5.0 onwards, clang and llvm require C++11
support to build; see UPDATING for more information.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
ARM: treat [N x i32] and [N x i64] as AAPCS composite types
The logic is almost there already, with our special homogeneous
aggregate handling. Tweaking it like this allows front-ends to emit
AAPCS compliant code without ever having to count registers or add
discarded padding arguments.
Only arrays of i32 and i64 are needed to model AAPCS rules, but I
decided to apply the logic to all integer arrays for more consistency.
This fixes a possible "Unexpected member type for HA" error when
compiling lib/msun/bsdsrc/b_tgamma.c for armv6.
Reported by: Jakub Palider <jpa@semihalf.com>
|
|
|
|
| |
from ^/vendor/clang/dist, and resolve conflicts.
|
|
|
|
| |
^/vendor/clang/dist, resolve conflicts, and update patches.
|
|
|
|
| |
^/vendor/clang/dist, resolve conflicts, and update patches README.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
[X86] Convert esp-relative movs of function arguments to pushes, step 2
This moves the transformation introduced in r223757 into a separate MI pass.
This allows it to cover many more cases (not only cases where there must be a
reserved call frame), and perform rudimentary call folding. It still doesn't
have a heuristic, so it is enabled only for optsize/minsize, with stack
alignment <= 8, where it ought to be a fairly clear win.
(Re-commit of r227728)
Differential Revision: http://reviews.llvm.org/D6789
This helps to get sys/boot/i386/boot2 below the required size again,
when optimizing with -Oz.
|
|
|
|
| |
^/vendor/clang/dist, resolve conflicts, and cleanup patches.
|
|
|
|
| |
^/vendor/clang/dist, resolve conflicts, and cleanup patches.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
only release, no new features have been added.
Please note that this version requires C++11 support to build; see
UPDATING for more information.
Release notes for llvm and clang can be found here:
<http://llvm.org/releases/3.5.1/docs/ReleaseNotes.html>
<http://llvm.org/releases/3.5.1/tools/clang/docs/ReleaseNotes.html>
MFC after: 1 month
X-MFC-With: 276479
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
[PowerPC] Add JMP_SLOT relocation definitions
This will be required by upcoming patches for LLDB support.
Patch by Justin Hibbits!
Pull in r221510 from upstream llvm trunk (by Justin Hibbits):
Add Position-independent Code model Module API.
Summary:
This makes PIC levels a Module flag attribute, which can be queried by the
backend. The flag is named `PIC Level`, and can have a value of:
0 - Backend-default
1 - Small-model (-fpic)
2 - Large-model (-fPIC)
These match the `-pic-level' command line argument for clang, and the value of the
preprocessor macro `__PIC__'.
Test Plan:
New flags tests specific for the 'PIC Level' module flag.
Tests to be added as part of a future commit for PowerPC, which will use this new API.
Reviewers: rafael, echristo
Reviewed By: rafael, echristo
Subscribers: rafael, llvm-commits
Differential Revision: http://reviews.llvm.org/D5882
Pull in r221791 from upstream llvm trunk (by Justin Hibbits):
Add support for small-model PIC for PowerPC.
Summary:
Large-model was added first. With the addition of support for multiple PIC
models in LLVM, now add small-model PIC for 32-bit PowerPC, SysV4 ABI. This
generates more optimal code, for shared libraries with less than about 16380
data objects.
Test Plan: Test cases added or updated
Reviewers: joerg, hfinkel
Reviewed By: hfinkel
Subscribers: jholewinski, mcrosier, emaste, llvm-commits
Differential Revision: http://reviews.llvm.org/D5399
Together, these changes implement small-model PIC support for PowerPC.
Thanks to Justin Hibbits and Roman Divacky for their assistance in
getting this working.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Divacky):
Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM
.cpu parsing.
Previously .cpu directive in ARM assembler didnt switch to the new
CPU and therefore acted as a nop. This implemented real action for
.cpu and eg. allows to assembler FreeBSD kernel with -integrated-as.
Change the name to be in style.
Add a FIXME as requested by Renato Golin.
|
|
|
|
|
|
|
|
|
|
|
|
| |
Fix some semantic usability issues with DynamicLibrary.
This patch allows invalid DynamicLibrary instances to be
constructed, and fixes the const-correctness of the isValid()
method.
No functional change.
This is needed for supporting the upgrade to a newer LLDB snapshot.
|
|
|
|
|
|
|
|
|
|
|
| |
AArch64: add support for dynamic-loader relocations
LLD needs them, and it's good to be able to print them properly when
our object dumpers encounter them.
Patch by Daniel Stewart.
This is needed for supporting the upgrade to a newer LLDB snapshot.
|
|
|
|
| |
preserve our customizations, where necessary.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Totally forget deallocated SDNodes in SDDbgInfo.
What would happen before that commit is that the SDDbgValues associated with
a deallocated SDNode would be marked Invalidated, but SDDbgInfo would keep
a map entry keyed by the SDNode pointer pointing to this list of invalidated
SDDbgNodes. As the memory gets reused, the list might get wrongly associated
with another new SDNode. As the SDDbgValues are cloned when they are transfered,
this can lead to an exponential number of SDDbgValues being produced during
DAGCombine like in http://llvm.org/bugs/show_bug.cgi?id=20893
Note that the previous behavior wasn't really buggy as the invalidation made
sure that the SDDbgValues won't be used. This commit can be considered a
memory optimization and as such is really hard to validate in a unit-test.
This should fix abnormally large memory usage and resulting OOM crashes
when compiling certain ports with debug information.
Reported by: Dmitry Marakasov <amdmi3@amdmi3.ru>
Upstream PRs: http://llvm.org/PR19031 http://llvm.org/PR20893
MFC after: 1 week
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
r197824 | rdivacky | 2013-12-20 19:08:54 +0100 (Fri, 20 Dec 2013) | 2 lines
Implement initial-exec TLS for PPC32.
r213427 | hfinkel | 2014-07-19 01:29:49 +0200 (Sat, 19 Jul 2014) | 7 lines
[PowerPC] 32-bit ELF PIC support
This adds initial support for PPC32 ELF PIC (Position Independent Code; the
-fPIC variety), thus rectifying a long-standing deficiency in the PowerPC
backend.
Patch by Justin Hibbits!
r213960 | hfinkel | 2014-07-25 19:47:22 +0200 (Fri, 25 Jul 2014) | 3 lines
[PowerPC] Support TLS on PPC32/ELF
Patch by Justin Hibbits!
Reviewed by: jhibbits
Approved by: dim
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
mostly fixes, for the following upstream bugs:
http://llvm.org/PR16365 http://llvm.org/PR17473 http://llvm.org/PR18000
http://llvm.org/PR18068 http://llvm.org/PR18102 http://llvm.org/PR18165
http://llvm.org/PR18260 http://llvm.org/PR18290 http://llvm.org/PR18316
http://llvm.org/PR18460 http://llvm.org/PR18473 http://llvm.org/PR18515
http://llvm.org/PR18526 http://llvm.org/PR18600 http://llvm.org/PR18762
http://llvm.org/PR18773 http://llvm.org/PR18860 http://llvm.org/PR18994
http://llvm.org/PR19007 http://llvm.org/PR19010 http://llvm.org/PR19033
http://llvm.org/PR19059 http://llvm.org/PR19144 http://llvm.org/PR19326
MFC after: 2 weeks
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Debug info: Support variadic functions.
Variadic functions have an unspecified parameter tag after the last
argument. In IR this is represented as an unspecified parameter in the
subroutine type.
Paired commit with CFE r202185.
rdar://problem/13690847
This re-applies r202184 + a bugfix in DwarfDebug's argument handling.
This merge includes a change to use the LLVM 3.4 API in
lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp:
DwarfUnit -> CompileUnit
Sponsored by: DARPA, AFRL
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Reland "Fix miscompile of MS inline assembly with stack realignment"
This re-lands commit r196876, which was reverted in r196879.
The tests have been fixed to pass on platforms with a stack alignment
larger than 4.
Update to clang side tests will land shortly.
Pull in r196986 from upstream llvm trunk (by Reid Kleckner):
Revert the backend fatal error from r196939
The combination of inline asm, stack realignment, and dynamic allocas
turns out to be too common to reject out of hand.
ASan inserts empy inline asm fragments and uses aligned allocas.
Compiling any trivial function containing a dynamic alloca with ASan is
enough to trigger the check.
XFAIL the test cases that would be miscompiled and add one that uses the
relevant functionality.
Pull in r202930 from upstream llvm trunk (by Hans Wennborg):
Check for dynamic allocas and inline asm that clobbers sp before building
selection dag (PR19012)
In X86SelectionDagInfo::EmitTargetCodeForMemcpy we check with MachineFrameInfo
to make sure that ESI isn't used as a base pointer register before we choose to
emit rep movs (which clobbers esi).
The problem is that MachineFrameInfo wouldn't know about dynamic allocas or
inline asm that clobbers the stack pointer until SelectionDAGBuilder has
encountered them.
This patch fixes the problem by checking for such things when building the
FunctionLoweringInfo.
Differential Revision: http://llvm-reviews.chandlerc.com/D2954
Together, these commits fix the problem encountered in the devel/emacs
port on the i386 architecture, where a combination of stack realignment,
alloca() and memcpy() could incidentally clobber the %esi register,
leading to segfaults in the temacs build-time utility.
See also: http://llvm.org/PR18171 and http://llvm.org/PR19012
Reported by: ashish
PR: ports/183064
MFC after: 1 week
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Fix a crash that occurs when PWD is invalid.
MCJIT needs to be able to run in hostile environments, even when PWD
is invalid. There's no need to crash MCJIT in this case.
The obvious fix is to simply leave MCContext's CompilationDir empty
when PWD can't be determined. This way, MCJIT clients,
and other clients that link with LLVM don't need a valid working directory.
If we do want to guarantee valid CompilationDir, that should be done
only for clients of getCompilationDir(). This is as simple as checking
for an empty string.
The only current use of getCompilationDir is EmitGenDwarfInfo, which
won't conceivably run with an invalid working dir. However, in the
purely hypothetically and untestable case that this happens, the
AT_comp_dir will be omitted from the compilation_unit DIE.
This should help fix assertions occurring with ports-mgmt/tinderbox,
when it is using jails, and sometimes invalidates clang's current
working directory.
Reported by: decke
MFC after: 2 weeks
X-MFC-With: r261991
|
|/
|
|
|
|
|
|
|
|
|
|
|
|
| |
3.4 on Sparc64 (commit descriptions left out for brevity):
r196755 r198028 r198029 r198030 r198145 r198149 r198157 r198565 r199186
r199187 r198280 r198281 r198286 r198480 r198484 r198533 r198567 r198580
r198591 r198592 r198658 r198681 r198738 r198739 r198740 r198893 r198909
r198910 r199014 r199024 r199028 r199031 r199033 r199061 r199775 r199781
r199786 r199940 r199974 r199975 r199977 r200103 r200104 r200112 r200130
r200131 r200141 r200282 r200368 r200373 r200376 r200509 r200617 r200960
r200961 r200962 r200963 r200965
Submitted by: rdivacky
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
all of the features in the current working draft of the upcoming C++
standard, provisionally named C++1y.
The code generator's performance is greatly increased, and the loop
auto-vectorizer is now enabled at -Os and -O2 in addition to -O3. The
PowerPC backend has made several major improvements to code generation
quality and compile time, and the X86, SPARC, ARM32, Aarch64 and SystemZ
backends have all seen major feature work.
Release notes for llvm and clang can be found here:
<http://llvm.org/releases/3.4/docs/ReleaseNotes.html>
<http://llvm.org/releases/3.4/tools/clang/docs/ReleaseNotes.html>
MFC after: 1 month
|
|
|
|
|
|
|
|
| |
Formally added an explicit enum for DWARF TLS support. No functionality
change.
Reviewed by: dim@
Sponsored by: DARPA, AFRL
|
|
|
|
|
|
|
|
|
| |
[Mips] Add Mips specific dynamic table entry tags.
This is to support an upcoming LLDB snapshot update.
Reviewed by: dim@
Sponsored by: DARPA, AFRL
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add ms_abi and sysv_abi attribute handling.
Based on a patch by Benno Rice!
This will help to develop EFI support.
Approved by: re (kib)
Verified by: benno
MFC after: 1 week
|
|
|
|
|
|
|
|
|
|
|
|
| |
Author: Daniel Malea <daniel.malea@intel.com>
Date: Thu Aug 1 21:18:16 2013 +0000
Fixed the Intel-syntax X86 disassembler to respect the (existing)
option for hexadecimal immediates, to match AT&T syntax. This also
brings a new option for C-vs-MASM-style hex.
Patch by Richard Mitton
Reviewed: http://llvm-reviews.chandlerc.com/D1243
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add MachineBasicBlock::addLiveIn().
This function adds a live-in physical register to an MBB and ensures
that it is copied to a virtual register immediately.
Pull in r185615 from llvm trunk:
Live-in copies go *after* EH_LABELs.
This will soon be tested by exception handling working at all.
Pull in r185617 from llvm trunk:
Simplify landing pad lowering.
Stop using the ISD::EXCEPTIONADDR and ISD::EHSELECTION when lowering
landing pad arguments. These nodes were previously legalized into
CopyFromReg nodes, but that never worked properly because the
CopyFromReg node weren't guaranteed to be scheduled at the top of the
basic block.
This meant the exception pointer and selector registers could be
clobbered before being copied to a virtual register.
This patch copies the two physical registers to virtual registers at
the beginning of the basic block, and lowers the landingpad instruction
directly to two CopyFromReg nodes reading the *virtual* registers. This
is safe because virtual registers don't get clobbered.
A future patch will remove the ISD::EXCEPTIONADDR and ISD::EHSELECTION
nodes.
Together, these changes fix llvm PR 16038 ('qt4 webcore file results in
"Bad machine code: Using an undefined physical register"'), and should
make it possible again to compile the www/qt4-webkit port again on the
i386 arch, without using a CPUTYPE=i686 or higher setting.
|
|
|
|
|
|
| |
Release notes are still in the works, these will follow soon.
MFC after: 1 month
|