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* MFC r276045:ian2014-12-271-0/+2
| | | | Allow -march=armv7a on the gcc command line, for compatibility with clang.
* MFC 275337:andrew2014-12-142-2/+15
| | | | | | | | | | | | | | There is no need to use FUNC_END with aeabi_ldiv0 or aeabi_idiv0 as they are aliases. Sponsored by: ABT Systems Ltd MFC 275380: Use the floating-point instruction on ARMv7 as the clang 3.5 integrated assembler doesn't allow these two instructions to use co-processor 11. Sponsored by: ABT Systems Ltd
* MFC r268994: C++ exception/unwind handling fixian2014-08-251-1/+1
| | | | | | | | Add FreeBSD to the list of environments that needs to handle R_ARM_TARGET2 relocations in unwind data as pc-relative indirect references. Note that the commit log for r269792 incorrectly claims that it includes this change, but I apparently fumbled it somehow, so this is the real MFC.
* MFC r269948:dim2014-08-171-1/+1
| | | | | | | | | | | | | | | Supplement r259111 by also using correct casts in gcc's emmintrin.h for the first argument of the following builtin function: * __builtin_ia32_psrlqi128() takes __v2di instead of __v4si This should fix the following errors when building the graphics/webp port with base gcc: lossless_sse2.c:403: error: incompatible type for argument 1 of '__builtin_ia32_psrlqi128' lossless_sse2.c:404: error: incompatible type for argument 1 of '__builtin_ia32_psrlqi128' Reported by: Jos Chrispijn <ports@webrz.net>
* MFC r265231:pfg2014-05-091-1/+1
| | | | | | | | | | | | | | | | gcc: fix strict alignment. From the OpenBSD log: x86-64 ABI requires arrays greater than 16 bytes to be aligned to 16byte boundary. However, GCC 16-byte aligns arrays of >=16 BITS, not BYTES. This diff improves bug detectability for code which has local arrays of [16 .. 127] bits: in those cases SSP will now detect even 1-byte overflows. Obtained from: OpenBSD (CVS rev 1.4)
* MFC r260310:pfg2014-01-121-1/+3
| | | | | | | | | | libcpp: misc fixes from Apple's GCC. Fixes some bugs detected by Apple: #error with unmatched quotes pragma mark Obtained from: Apple GCC 4.2 - 5553
* MFC r259873:pfg2014-01-082-5/+109
| | | | | | | | gcc: small enhancements for the arm support. fixes GCC-PR target/31152 Obtained from: gcc 4.3 (rev. r118461, 125973: GPLv2)
* MFC r259841pfg2014-01-072-0/+2
| | | | | | | gcc: Add ability to generate DWARF pubtypes section if DEBUG_PUBTYPES_SECTION is defined. Obtained from: gcc 4.3 (rev. 118826; GPLv2)
* MFC r259525, r259526, r259529pfg2013-12-311-3/+12
| | | | | | | | | | | | | | | | gcc: small merges from upstream fix ICE in rs6000 when using -fno-trapping-math. Solves GCC-PR target/30485 Solve GCC issues: PR middle-end/32602 PR middle-end/32603 Updates the to documentation and processing improvement. Obtained from: gcc 4.3 (rev. 120902, 120902, 119427, 126278, 126422; GPLv2)
* MFC r259005, r259092:pfg2013-12-303-32/+24
| | | | | | | | | gcc: Add -flax-vector-conversions gcc: new fvisibility-ms-compat option These are useful for compatibility with newwer gcc and clang. Obtained from: gcc 4.3 (rev. 120572, 120688, 126088; GPLv2)
* gcc: Merge upstream changes.pfg2013-12-271-0/+4
| | | | | | | | Include types in error message for build_binary_op. Mostly cosmetic changes, to reduce differences with Apple's gcc. Obtained from: gcc 4.3 (rev. 120611, 124839, 125239; GPLv2)
* MFC r258651, r258943:pfg2013-12-191-99/+118
| | | | | | | | gcc: Altivec register adjustments from Apple. gcc: On rs6000 update sp_offset depending only on size. Tested by: Justin Hibbits Obtained from: gcc pre-4.3 (rev. 124763, 125116; GPLv2)
* MFC r258428, r258445pfg2013-12-189-279/+301
| | | | | | | | | | | | | | | | | | | | | | | | | gcc: another round of merges from the gcc pre-43 branch. Bring The following revisions from the gcc43 branch[1]: 118360, 118361, 118363, 118576, 119820, 123906, 125246, and 125721. They all have in common that the were merged long ago into Apple's gcc and should help improve the general quality of the compiler and make it easier to bring new features from Apple's gcc42. For details please review the additions to the files: gcc/ChangeLog.gcc43 gcc/cp/ChangeLog.gcc43 (new, adds previous revisions) Fix crosscompilation (r258445 by andreast) Reference: [1] http://gcc.gnu.org/viewcvs/gcc/trunk/?pathrev=126700 Obtained from: gcc pre4.3 (GPLv2) branch MFC after: 3 weeks
* MFC r258081, r258138, r258143, r258179, r258157, r258204, 258205,pfg2013-12-121-4/+2
| | | | | | | | | | | | | | | | | | | | | r258206, r258207, r258321 This is a series of commits inspired on Google's gcc-4.2.1 for Android that were taken from the gcc pre-4.3 under the GPLv2. gcc: Backport fixes for -W parentheses in C++ This fixes GCC 19564. gcc: merge rs6000 change from FSF pre-gcc43 Don't set MASK_PPC_GFXOPT for 8540 or 8548. Merge vrp-tree fix from gcc-4.3 Fix missed conversion from / to >> (GCC PR32521) Merge in GCCr120505 to include definition of TREE_OVERFLOW_P gcc: warn about integer overflow in constant expressions in the C++ frontend. gcc: Add a new option -Wvla to warn variable length array. libcpp: preprocessor speedup patches from upstream gcc. gcc: add femit-struct-debug support to reduce Reduce dwarf debug size gcc: Fix postreload-gcse treatment of call-clobbered registers. gcc: Record some previous commits in the ChangeLog.gcc43 file.
* MFC r259111:dim2013-12-111-3/+3
| | | | | | | | | | | | | | | | | Use correct casts in gcc's emmintrin.h for the first arguments of the following builtin functions: * __builtin_ia32_pslldi128() takes __v4si instead of __v8hi * __builtin_ia32_psllqi128() takes __v2di instead of __v8hi * __builtin_ia32_psradi128() takes __v4si instead of __v8hi This should fix the following errors when building the LINT kernel with gcc: sys/crypto/aesni/aesni_wrap.c:191: error: incompatible type for argument 1 of '__builtin_ia32_psradi128' sys/crypto/aesni/aesni_wrap.c:195: error: incompatible type for argument 1 of '__builtin_ia32_pslldi128'
* On ARM EABI double precision floating point values are stored in theandrew2013-09-071-1/+1
| | | | | | endian the CPU is in, i.e. little-endian on most ARM cores. This allows ARMv4 and ARMv5 boards to boot with the ARM EABI.
* add support to gcc for AES and PCLMUL intrinsics... This addes thejmg2013-09-033-0/+18
| | | | | | | | -maes option, but not the -mpclmul option as I ran out of bits in the 32 bit flags field... You can -D__PCLMUL__ to get this, but it won't be compatible w/ clang and modern gcc... Reviewed by: -current, -toolchain
* Implement _Unwind_GetIP and _Unwind_GetIPInfo as functions as that is whatandrew2013-08-312-0/+21
| | | | we expect on FreeBSD. The implementation is based on the existing macros.
* Bring in gcc r128087 to add support for _Unwind_Backtrace on ARM. This isandrew2013-08-313-1/+69
| | | | prior to the licence change so is under the GPLv2.
* GCC: bring back experimental support for amdfam10/barcelona CPUs.pfg2013-06-0111-157/+1285
| | | | | | | | | | | | | Initial support for the AMD amdfam10 chipsets has been available in the gcc43 branch under GPLv2. AMD and some linux distributions (OpenSUSE) did a backport of the amdfam10 support and made it available. This is a revised subset of the support initially brought in in r236962 and later reverted. The collateral efects seem to have disappeared but it is still recommended to set the CPUTYPE with caution. Reviewed by: jkim (ages ago) MFC after: 3 weeks
* For some reason, the gcc intrinsics header tmmintrin.h was imported withdim2013-05-081-224/+0
| | | | | | two copies of itself pasted together. Remove the extraneous copy. MFC after: 3 days
* Add #undef TARGET_DEFAULT back as it shouldn't have been removed in r245539andrew2013-02-041-0/+1
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* Allow the unwind functions int libgcc_s to interact correctly with libthr.andrew2013-02-041-2/+2
| | | | | | | | | | | | | | | | | | | _Unwind_ForcedUnwind in libgcc_s takes as one of it's parameters a stop function to tell it when to stop unwinding. One of the stop function's parameters is a _Unwind_Exception_Class. On most architectures this is an int64_t, however on ARM EABI the gcc developers have made this a char array with 8 items. While both of these take the same space they are passed into the stop function differently, an int64_t is passed in in registers r2 and r3, while the char[8] is passed in as a pointer to the first item in register r2. Because libthr expects the value to be an int64_t we would get incorrect results when it passes a function that take an int64_t but libgcc passes in a pointer to a char array including crashing. The fix is to update libgcc_s to make it pass an int64_t to the stop function and to libstdc++ as it expects _Unwind_Exception_Class to be an array.
* Clean some 'svn:executable' properties in the tree.pfg2013-01-263-0/+0
| | | | | Submitted by: Christoph Mallon MFC after: 3 days
* Add compiler support for the ARM EABI.andrew2013-01-171-3/+27
| | | | | | ARM EABI support is disabled by default and can be enabled by setting WITH_ARM_EABI when building, however only the kernel-toolchain target will work with this flag until the rest of the support is added.
* Switch the default CPU to an arm9. This removes compiler support for theandrew2013-01-141-1/+1
| | | | | unsupported 26-bit addressing mode. This change is required for moving to the ARM EABI.
* Don't define CTORS_SECTION_ASM_OP and DTORS_SECTION_ASM_OP on arm whenandrew2012-12-151-0/+2
| | | | | | | | | | | | | | | | | built with clang. When these are defined the lists are defined similar to: asm(".section .ctors"); STATIC func_ptr __CTOR_LIST__[1] = { (func_ptr) (-1) }; asm(".section .dtors"); STATIC func_ptr __DTOR_LIST__[1] = { (func_ptr) (-1) }; The problem is clang will move the two arrays out of the .ctors and .dtors sections causing these sections to contain a single null address. By not defining these macros we use the version of the code that places the arrays is their sections by using __attribute__((section(".ctors"))) and similar for .dtors. Submitted by: Daisuke Aoyama <aoyama AT peach.ne.jp>
* Follow clang lead and include mm_malloc.h only in hosted configurations.kan2012-10-271-0/+2
| | | | | | | This makes the use of intrinsics easier in kernel environment, according to the submitter. Requested by: jmg
* Merging of projects/armv6, part 3gonzo2012-08-151-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | r238211: Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb This adds a new TARGET_ARCH for building on ARM processors that support the ARMv6K multiprocessor extensions. In particular, these processors have better support for TLS and mutex operations. This mostly touches a lot of Makefiles to extend existing patterns for inferring CPUARCH from ARCH. It also configures: * GCC to default to arm1176jz-s * GCC to predefine __FreeBSD_ARCH_armv6__ * gas to default to ARM_ARCH_V6K * uname -p to return 'armv6' * make so that MACHINE_ARCH defaults to 'armv6' It also changes a number of headers to use the compiler __ARM_ARCH_XXX__ macros to configure processor-specific support routines. Submitted by: Tim Kientzle <kientzle@freebsd.org>
* Pass --enable-new-dtags to the linker invocation by default. Ifkib2012-07-157-4/+7
| | | | | | | | | | | | desired, one can turn off the generation of post-ELF standard dtags by overriding it with --disable-new-dtags after the default switch. Immediate effect of the change is that -rpath path is now stored both in DT_RPATH and DT_RUNPATH tags, which is the right way to provide rpath for dynamic linker supporting DT_RUNPATH per specification. Reviewed by: kan MFC after: 1 month
* Merge r236137 from x86:marius2012-06-141-0/+1
| | | | Enable GNU hash generation for dynamic ELF binaries.
* Revert r236962 - Experimental amdfam10/barcelona support.pfg2012-06-1311-1369/+477
| | | | | | | | The patches are unexpectedly causing gcc to fail while building ports/graphics/ImageMagick even when the cpu flags are not used. Reported by: Andreas Tobler
* Add experimental support for amdfam10/barcelona from the GCC 4.3 branch.pfg2012-06-1211-477/+1369
| | | | | | | | | | | | | | | | | | | Initial support for the AMD barcelona chipsets has been available in the gcc43 branch under GPLv2 but was not included when the Core 2 support was brought to the system gcc. AMD and some linux distributions (OpenSUSE) did a backport of the amdfam10 support and made them available. Unfortunately this is still experimental and while it can improve performance, enabling the CPUTYPE may break some C++ ports (like clang). Special care was taken to make sure that the patches predate the GPLv3 switch upstream. Tested by: Vladimir Kushnir Reviewed by: mm Approved by: jhb (mentor) MFC after: 2 weeks
* Merge r236137 from x86:marius2012-05-301-2/+4
| | | | | | | Enable GNU hash generation for dynamic ELF binaries. While at it, sync the order of options with x86 and pass along the verbose flag.
* Enable gnu hash generation for dynamic ELF binaries on x86.kib2012-05-272-0/+2
| | | | Reviewed by: kan
* Bring in a subset of gcc fixes that were back ported topfg2012-05-182-43/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the GCC 4.1 branch and are available under GPLv2. 2007-11-07 Eric Botcazou <ebotcazou@libertysurf.fr> PR rtl-optimization/33822 * rtl.h (REG_OFFSET): Fix comment. * var-tracking.c (INT_MEM_OFFSET): New macro. (var_mem_set): Use it. (var_mem_delete_and_set): Likewise. (var_mem_delete): Likewise. (vt_get_decl_and_offset): Likewise. (offset_valid_for_tracked_p): New predicate. (count_uses): Do not track locations with invalid offsets. (add_uses): Likewise. (add_stores): Likewise. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=129972 2007-11-16 Richard Guenther <rguenther@suse.de> PR middle-end/34030 * fold-const.c (fold_binary): Use correct types for folding 1 << X & Y to Y >> X & 1. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=130242 2008-01-14 Eric Botcazou <ebotcazou@adacore.com> PR rtl-optimization/31944 * cse.c (remove_pseudo_from_table): New function. (merge_equiv_classes): Use above function to remove pseudo-registers. (invalidate): Likewise http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=131524 2008-01-24 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> Backport: 2007-11-07 Kenneth Zadeck <zadeck@naturalbridge.com> PR middle-end/33826 * ipa-pure-const (static_execute): Added code to keep recursive functions from being marked as pure or const. * ipa-utils (searchc): Fixed comment. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=131807 2008-02-01 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> Backport: 2007-08-02 Nathan Froyd <froydnj@codesourcery.com> PR middle-end/25445 * varasm.c (default_binds_local_p_1): Consult flag_whole_program if we are compiling with -fPIC. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132061 2008-02-04 Richard Guenther <rguenther@suse.de> PR middle-end/33631 * expr.c (count_type_elements): Give for unions instead of guessing. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132101 2008-02-14 Alan Modra <amodra@bigpond.net.au> PR target/34393 * config/rs6000/rs6000.md (restore_stack_block): Force operands[1] to a reg. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132309 2008-03-25 Richard Guenther <rguenther@suse.de> Backport from mainline: 2008-02-12 Richard Guenther <rguenther@suse.de> PR middle-end/35163 * fold-const.c (fold_widened_comparison): Use get_unwidened in value-preserving mode. Disallow final truncation. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=133509 2008-11-30 Eric Botcazou <ebotcazou@adacore.com> PR target/38287 * config/sparc/sparc.md (divsi3 expander): Remove constraints. (divsi3_sp32): Add new alternative with 'K' for operand #2. (cmp_sdiv_cc_set): Factor common string. (udivsi3_sp32): Add new alternative with 'K' for operand #2. Add TARGET_V9 case. (cmp_udiv_cc_set): Factor common string. http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=142298 Reviewed by: mm Approved by: jhb (mentor) MFC after: 1 week
* Unbreak jemalloc build with MALLOC_PRODUCTION set. New jemalloc versiongonzo2012-04-301-2/+26
| | | | | | | | uncovered MIPS-related gcc bug described in http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33256 The patch was obtained from r128198 in gcc-4_1-branch, which is GPLv2, so it's OK to merge it.
* Disable IRIX compatibility flags for DWARF code generator. IRIX-compatiblegonzo2012-03-231-1/+2
| | | | DWARF code is not compatible with CTF tools
* Silence a warning about redefinition of TARGET_ELF on powerpc.andreast2012-01-061-0/+1
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* Rename the linker emulation name for powerpc and powerc64. This is needed thatandreast2011-11-191-1/+1
| | | | | we can also use the upstream binutils linker where we have to have a unique name for the FreeBSD emulation.
* Copy over the ASM_DECLARE_FUNCTION_SIZE macro from linux64.h. This macroandreast2011-11-161-0/+19
| | | | | | | | | | | | | | | | | | | | | declares the proper size of a function. Without this macro recent GNU as will complain about with: 'Error: .size expression for main does not evaluate to a constant.' Up to now we produce this: .L.main: .... .size main, .-main With the macro defined the output is this: .L.main: .... .size main,.-.L.main This affects only the 64-bit compiler. Tested with world and kernel on both, 32 and 64-bit powerpc.
* Import gcc fix for -fstack-protector that produces segfaultingfabient2011-11-091-2/+4
| | | | | | | | | | binaries on arm/armel. Related gcc bug: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35965 PR: 161128 MFC after: 1 week
* Adjust posix_memalign() prototype to match what we define in stdlib.h forstefanf2011-10-161-1/+1
| | | | | | C++ compilation. PR: standards/147210
* Upgrade of base gcc and libstdc++ to the last GPLv2-licensed revisionmm2011-03-293-3/+40
| | | | | | | | | | | | | | | | | | | (rev. 127959 of gcc-4_2-branch). Resolved GCC bugs: c++: 17763, 29365, 30535, 30917, 31337, 31941, 32108, 32112, 32346, 32898, 32992 debug: 32610, 32914 libstdc++: 33084, 33128 middle-end: 32563 rtl-optimization: 33148 tree-optimization: 25413, 32723 target: 32218 Tested by: pointyhat (miwi) Obtained from: gcc (gcc-4_2-branch up to rev. 127959) PR: gnu/153298, gnu/153959, gnu/154385 MFC after: 1 month
* Backport missing tunings for -march=core2:mm2011-03-171-2/+2
| | | | | | | | | | - enable extra 80387 mathematical constants (ext_80387_constants) [1] - enable compare and exchange 16 bytes (cmpxchg16b) [2] Verified against llvm-gcc (and apple gcc) Obtained from: gcc-4.3 (ref. svn revs. 119260 [1], 121140 [2]; GPLv2) MFC after: 2 weeks
* Fix -march/-mtune=native autodetection for Intel Core 2 CPUsmm2011-03-161-2/+9
| | | | | Obtained from: gcc 4.3 (partial rev. 119454; GPLv2) MFC after: 2 weeks
* Backport SSSE3 instruction set support to base gcc.mm2011-03-147-9/+1245
| | | | | | | Enabled by default for -march=core2 Obtained from: gcc 4.3 (rev. 117958, 121687, 121726, 123639; GPLv2) MFC after: 2 weeks
* Now that TLS is supported for sparc64 by both binutils 2.17.50 committedmarius2011-03-111-0/+7
| | | | in r218822 and rtld(1) committed in r219533 turn on TLS support in GCC.
* Backport Intel Core 2 and AMD Geode CPU types from gcc-4.3 (GPLv2)mm2011-03-074-44/+339
| | | | | | | | These options are supported in this shape in all newer GCC versions. PR: gnu/155308 Obtained from: gcc 4.3 (rev. 118090, 118973, 120846; GPLv2) MFC after: 2 weeks
* Backport svn r124339 from gcc 4.3 and add opteron-sse3, athlon64-sse3mm2011-02-201-0/+9
| | | | | | | | | | | | | and k8-sse3 cpu-types for -march=/-mtune= gcc options. These new cpu-types include the SSE3 instruction set that is supported by all newer AMD Athlon 64 and Opteron processors. All three cpu-types are supported by clang and all gcc versions starting with 4.3 SVN rev 124339 (at that time GPLv2 licensed). PR: gnu/154906 Discussed with: kib, kan, dim Obtained from: gcc 4.3 (r124339, GPLv2 licensed) MFC after: 2 weeks
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