summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* | Add a new SDHCI quirk, SDHCI_QUIRK_BROKEN_AUTO_STOP, to workaroundloos2017-09-062-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | controllers that do not support or have broken ACMD12 implementations. Reviewed by: jmcneill Obtained from: NetBSD MFC after: 2 weeks Sponsored by: Rubicon Communications, LLC (Netgate) Differential Revision: https://reviews.freebsd.org/D10602 (cherry picked from commit e0630b81d4e24fd0b8b4e35aa67b3d6ed715cbb5)
* | Add support for the no-1-8-v and wp-inverted properties in generic SDHCIloos2017-09-061-2/+22
| | | | | | | | | | | | | | | | | | FDT glue. MFC after: 2 weeks Sponsored by: Rubicon Communications, LLC (Netgate) (cherry picked from commit ae25145e58313bd6090a0258d3826dcddff4d19b)
* | Remove duplicate and unnecessary options from ARM kernels.Luiz Souza2017-09-062-3/+0
| | | | | | | | (cherry picked from commit d71ccd7655d7c5447814d1a76011d45759d9b3d1)
* | partly revert 249c1f7f8f5a84349fe87868d4bb4075624ea70d.Luiz Souza2017-09-061-8/+6
| | | | | | | | | | | | FreeBSD can handle multiple ranges now. (cherry picked from commit 12af32a29927eaf0f850ab9863920989479ddb31)
* | Make the rogue-1 DTS compatible with FreeBSD.Luiz Souza2017-09-061-13/+8
| | | | | | | | (cherry picked from commit dbefc7dead9e6e00b54c8f5f0c6b0e2c4bb498ab)
* | Enable the LED drivers on rogue-1.Luiz Souza2017-09-063-2/+22
| | | | | | | | (cherry picked from commit 93d0dfb01dd19bb4998f5f7ed1373bd85dc11b1c)
* | Add the default vlangroup for the switch ports.Luiz Souza2017-09-061-1/+10
| | | | | | | | | | | | Set the fixed ports to match the 2.5Gb uplink. (cherry picked from commit dcf3c458bca70e8a81aa7d283f40e69c512f993a)
* | Update the switch address on DTS.Luiz Souza2017-09-061-2/+2
| | | | | | | | (cherry picked from commit a620415c26e5e72359b2ed5a8bb4d05810744bc3)
* | Remove garbage at start of file.Luiz Souza2017-09-061-1/+1
| | | | | | | | (cherry picked from commit 129fd9b8eca08e11bbe433c011a7ec957b8817e8)
* | Add the preliminary support for the R-1 DTS.Luiz Souza2017-09-062-0/+434
| | | | | | | | | | | | Obtained from: ADI (cherry picked from commit 3e5fa592e54decb50f21ec377f63fcbc9def72f6)
* | The base pfSense kernel should not include any other file, remove the uFW ↵Luiz Souza2017-09-061-2/+1
| | | | | | | | | | | | include. (cherry picked from commit 13d2f38e535c68096f48f318e971f3288b4e8992)
* | Include a pfSense for the ClearFog.Luiz Souza2017-09-065-290/+228
| | | | | | | | (cherry picked from commit 839fcfcd847014b820769963d1518dd0a93fde18)
* | Disable the unused kernel MD_ROOT option.Luiz Souza2017-09-061-1/+1
| | | | | | | | (cherry picked from commit 26a836083492e0e9af222d17bd479f1292e71f54)
* | Remove deprecated option DEVICE_POLLING from pfSense kernel.Luiz Otavio O Souza2017-09-062-4/+0
| | | | | | | | | | | | Ticket #7021 (cherry picked from commit 29f1eecf8c4325a772f69849331ce0f0114f5587)
* | Add wireless modules to ARM kernel.Luiz Otavio O Souza2017-09-062-5/+72
| | | | | | | | | | | | Ticket #176/ARM (cherry picked from commit 2e470aef1ede67776cad5934e4a74413afd00a39)
* | Enable the etherswitch driver on uFW kernel.Luiz Otavio O Souza2017-09-061-0/+3
| | | | | | | | (cherry picked from commit 52b18e60f7c89b873be3f0f4f8844ebb054a06ff)
* | Break the kernel in three files to avoid the conflict of ROOTDEVNAME.Luiz Otavio O Souza2017-09-063-87/+111
| | | | | | | | (cherry picked from commit 8fb831d1d2b3a83483acddefb99a55df0b1c38d1)
* | Increase number of L2 tables required for kernel bootstrapzbb2017-09-061-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Memory space reserved for pmap_kernel_l2dtable_kva and pmap_kernel_l2ptp_kva has not been taken into account in original code. All the memory reserved from kernel space by pmap_alloc_specials() function called in pmap_bootstrap() should be mapped initially by initarm(). To create initial mapping initarm() function reserves proper number of l2 page tables. However the number of the l2 page tables does not take into account memory for: pmap_kernel_l2ptp_kva, pmap_kernel_l2dtable_kva, crashdumpmap, etc. Submitted by: Grzegorz Bernacki <gjb@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: meloun-miracle-cz Differential revision: https://reviews.freebsd.org/D10217 (cherry picked from commit 2f72ed7d5a00369d3e7f83466fca58ff94b1c3a4)
* | Fix building for ARM kernel that have FLASHADDR, PHYSADDR and LOADERRAMADDR ↵manu2017-09-061-1/+1
| | | | | | | | | | | | | | | | | | | | defined. Pointy Hat: myself Reported by: bz (cherry picked from commit 88b4a48518f9e0ebff21d16d2b163aa092b548da)
* | Keep boot parameters in ARM trampoline codemanu2017-09-061-4/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently boot parameters (r0 - r3) are forgotten in ARM trampoline code. This patch save them at startup and restore them before jumping into kernel _start() routine. This is usefull when booting with Linux ABI and/or custom bootloader. Submitted by: Grégory Soutadé <soutade@gmail.com> Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D7395 (cherry picked from commit 5292986b0f168ac2b020244298b5801430a851df)
* | Fix TEX index acquisition using L2 attributeszbb2017-09-062-3/+9
| | | | | | | | | | | | | | | | | | | | The TEX index is selected using (TEX0 C B) bits from the L2 descriptor. Use correct index by masking and shifting those bits accordingly. Differential Revision: https://reviews.freebsd.org/D11703 (cherry picked from commit 90fde46fef4df1269c1855372f80834ea8e50143)
* | [arm] Use correct index value when checking range validitygonzo2017-09-061-2/+2
| | | | | | | | | | | | | | | | Reviewed by: andrew MFC after: 3 weeks Differential Revision: https://reviews.freebsd.org/D9145 (cherry picked from commit fd5dc900256d4f0edb75e5334e7e648cb613779d)
* | Enable setting the dma tag at the nexus levelzbb2017-09-062-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow to set the dma tag for nexus in the platform init code, so that all busses and devices would be able to inherit it. This change is useful e.g. for setting coherent dma tag for the platforms with hardware IO cache coherency. Submitted by: ian Michal Mazur <mkm@semihalf.com> Reviewed by: ian Differential revision: https://reviews.freebsd.org/D11202 (cherry picked from commit 0b32b9947ce18e8f69828c42aa5a9ba8cc027857)
* | Introduce support for DMA coherent ARM platformszbb2017-09-061-13/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Inherit BUS_DMA_COHERENT flag from parent buses - Use cacheable memory attributes on dma coherent platform - Disable cache synchronization on coherent platform Changes are based on ARMv8 busdma code and commit r299683. Submitted by: Michal Mazur <mkm@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: ian Differential revision: https://reviews.freebsd.org/D11201 (cherry picked from commit dbbf5a80043fca8abfaa7ea9e855a468d0c44e88)
* | Disable PL310 outer cache sync for IO coherent platformszbb2017-09-062-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a PL310 cache is used on a system that provides hardware coherency, the outer cache sync operation is useless, and can be skipped. Moreover, on some systems, it is harmful as it causes deadlocks between the Marvell coherency mechanism, the Marvell PCIe or Crypto controllers and the Cortex-A9. To avoid this, this commit introduces a new Device Tree property 'arm,io-coherent' for the L2 cache controller node, valid only for the PL310 cache. It identifies the usage of the PL310 cache in an I/O coherent configuration. Internally, it makes the driver disable the outer cache sync operation. Note, that other outer-cache operations are not removed, as they may be needed for certain situations, such as booting secondary CPUs. Moreover, in order to enable IO coherent operation, the decision whether to use L2 cache maintenance callbacks is done in busdma layer, which was enabled in one of the previous commits. Submitted by: Michal Mazur <mkm@semihalf.com> Marcin Wojtas <mw@semihalf.com> Reviewed by: mmel Obtained from: Semihalf Differential revision: https://reviews.freebsd.org/D11245 (cherry picked from commit d4d94445f1fd0de66e64fd589865b027eab17726)
* | Manually load tunable CPU quirks.mmel2017-09-061-0/+9
| | | | | | | | | | | | | | | | | | | | | | These are needed too early, far before SYSINIT is processed. Reported by: zbb Pointy hat to: mmel MFC after: 3 weeks MFC with: r319896 (cherry picked from commit d425ca179a9613f12f17d5f283bac1eb5b85abe5)
* | Revert change to description introduced in r320002zbb2017-09-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | Currently some ARM platforms implement their own platform_probe_and_attach() function and other use common routine that calls platform's PLATFORM_ATTACH method. Keep the old description to match the preferred way of naming things. Pointed out by: andrew (cherry picked from commit f914f0a2493da296ffd18fba31afc1f58b99b17b)
* | Minor style improvements to pmap_remap_vm_attr()zbb2017-09-061-3/+3
| | | | | | | | | | | | | | Use correct platform_ function name in the comment and remove redundant tabs. (cherry picked from commit 42b0dad3ee3dc59d7fcbd3b2d709cd2ba6f424da)
* | Fix typo in "Marvell" stringzbb2017-09-061-2/+2
| | | | | | | | | | | | | | | | Change Marwell to Marvell Pointed out by: Ravi Pokala <rpokala@mac.com> (cherry picked from commit e23bb21bd5292f970933c1e4cad5fcb0b5d91e35)
* | Add detection of CPU class for ARMv6/v7zbb2017-09-061-17/+36
| | | | | | | | | | | | | | | | | | | | Submitted by: Michal Mazur <mkm@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: andrew Differential revision: https://reviews.freebsd.org/D10909 (cherry picked from commit e843e48d3646bd18f8480005464fe31a71692d13)
* | Implement tunable CPU quirks.mmel2017-09-065-9/+53
| | | | | | | | | | | | | | | | | | | | These quirks are intended for optimizing CPU performance, not for applying errata workarounds. Nobody can expect that CPU with unfixed errata is stable enough to execute the kernel until quirks are applied. MFC after: 3 weeks (cherry picked from commit 1065b8567421165a5e65e3ad5d8fa4bc348efdea)
* | Update pl310 node in Armada 38x DTS to match the one used in Linuxmw2017-09-061-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Since the cache controller nodes fixup is added to the platform code, this patch aligns it to the Linux device tree representation. Submitted by: Patryk Duda <pdk@semihalf.com> Reviewed by: cognet (mentor) Approved by: cognet (mentor) Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D11884 (cherry picked from commit 4bd0fb56b85087bc2c052cc4d2192884fca61e5d)
* | Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platformszbb2017-09-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch disables outer cache sync in PL310 driver by adding "arm,io-coherent" property. In addition to the previous patches it was the last bit needed for enabling proper operation of Armada 38x SoCs with the IO cache coherency. Submitted by: Michal Mazur <mkm@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: mmel Differential revision: https://reviews.freebsd.org/D11204 (cherry picked from commit 4bb8c5f36b6f41e820675d3a4d940cb802da42a3)
* | Remove clock-frequency properties from Armada 38x timer nodesmw2017-09-061-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the timers' base frequency setting is added to the platform code, this patch removes clock-frequency properties from global and twd timers, aligning both to the Linux device tree. Submitted by: Patryk Duda <pdk@semihalf.com> Reviewed by: cognet (mentor) Approved by: cognet (mentor) Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D11882 (cherry picked from commit bce1dbee51dd9468e51e9f3457e0304665c5a6ec)
* | Disable the build of the static/embedded DTB for the ARMADA38X kernel.loos2017-09-062-3/+9
| | | | | | | | | | | | | | | | | | Build the supported DTBs as part of modules build. MFC after: 2 weeks Sponsored by: Rubicon Communications, LLC (Netgate) (cherry picked from commit 1a3c4ffcedd2bd56d50f91238841d031ba5493cc)
* | Add PL310 device in ARMADA38X configzbb2017-09-061-0/+3
| | | | | | | | | | | | | | | | | | Submitted by: Arnaud Ysmal <arnaud.ysmal@stormshield.eu> Obtained from: Stormshield Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D10222 (cherry picked from commit 0004ab66dd5b2e6cf9cb8f99446b500d5f415904)
* | Enable pl310 coherent operation in platform init for Armada 38xmw2017-09-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating PL310 sotfware context sc_io_coherent field in platform_pl310_init() routine for Armada 38x helps to avoid using 'arm,io-coherent' property, which is by default not present in the device tree node in Linux. This way another step for DT unification between two operating systems is done. The improvemnt will also work after enabling PLATFORM for Marvell ARMv7 SoCs. Reviewed by: andrew, cognet (mentor) Approved by: cognet (mentor) Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D11883 (cherry picked from commit af179cce7339314a8ff2094c7f19749fc81fe4d8)
* | Dynamically configure timers' base frequency for Armada 38xmw2017-09-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using 'clock-frequency' device tree property for global/twd mpcore timers of Armada 38x SoCs, set it in platform_late_init stage with arm_tmr_change_frequency() function. Reviewed by: cognet (mentor) Approved by: cognet (mentor) Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D11881 (cherry picked from commit d29c07b06f869c7abafdfbe70cb31d8903ccd1d7)
* | Fix remapping VM attributes on Armada 38xmw2017-09-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pmap_remap_vm_attr() function requires indexes to pte2_attr_tab as the arguments (VM_MEMATTR_). Mistakenly, instead of them, actual values from the table were used (PTE2_ATTR_), when applying work-around for Marvell Armada 38x SoCs. Submitted by: Marcin Wojtas (mw@semihalf.com) Reported by: Rafal Kozik (rk@semihalf.com) Reviewed by: cognet (mentor) Approved by: cognet (mentor) Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D11704 (cherry picked from commit bb4af4519f7b912bfc8baa95b20cbd1a9fd0f8b7)
* | Create root DMA tag and fix MBUS windows on DMA coherent platformszbb2017-09-062-2/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada 38x SoCs, in order to work properly in IO-coherent mode, requires an update of the MBUS windows attributesd. This patch also configures nexus coherent dma tag, because all busses and children devices have to inherit this setting in runtime. The latter has to be executed as a sysinit (SI_SUB_DRIVERS type), so that bus_dma_tag_create() can be executed properly. Submitted by: Michal Mazur <mkm@semihalf.com> Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: ian Differential revision: https://reviews.freebsd.org/D11203 (cherry picked from commit 713a0a26db4493f96a2ce3200ce8429564246208)
* | Implement workaround for Armada 38X family HW issue between CPU and deviceszbb2017-09-061-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a hardware problem between Cortex-A9 CPUs and on-chip devices in Armada 38X SoCs that may cause hang on heavy load. This can be however worked around by mapping all registers and PCI IO as strongly ordered instead of device memory. Submitted by: Zbigniew Bodek <zbb@semihalf.com> Reviewed by: mmel Tested by: mw_semihalf.com Obtained from: Semihalf Differential revision: https://reviews.freebsd.org/D10218 (cherry picked from commit 0577e7dbafea61f02c4f736d8318055ed2c7ed33)
* | Restore original /soc ranges on Marvell Armada 38x boardsmw2017-09-063-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | Because fdt_get_ranges can process now multiple 'ranges' entries, restoring the ranges from original Linux device trees is possible. Submitted by: Patryk Duda <pdk@semihalf.com> Reviewed by: cognet (mentor) Approved by: cognet (mentor) Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D11877 (cherry picked from commit e77679c61c1faabbf8025ca8e22cfd64146d92ea)
* | Enable in-band link management on A388-Clearfog boardzbb2017-09-061-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds in-band link management over SGMII of the SFP transceiver on Armada-388-Clearfog board. Submitted by: Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Netgate Reviewed by: loos Differential revision: https://reviews.freebsd.org/D10708 (cherry picked from commit 88a3a7c33f29cc11080b56d4194db9edd9e2de10)
* | Correct CESA node in armada-38x.dtsizbb2017-09-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | CESA resources were invalid, what caused driver to fail during attach call. Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D8180 (cherry picked from commit 756350a9d010ce99095a13ec47d49a347f84ee1d)
* | Add buffer management entries to armada-38x.dtsizbb2017-09-061-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Hardware buffer management entries are not used yet by FreeBSD. They were added for compliance with Linux Armada 38x device tree representation and will be used in future network support. Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D8179 (cherry picked from commit e8e86cbc83f628cf0bd89e9b898a368beaf5ac27)
* | Add DTS file for Armada 385 DB-AP boardzbb2017-09-061-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada38x is already supported in the tree. This commit adds support for DB-AP board. File was taken from Linux v4.8 and accustomed to FreeBSD in minimal possible way. Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D7327 (cherry picked from commit f76be8ca9cc7e0c6c8da135f83052d5dc3978369)
* | Add DTS file for Solidrun ClearFog boardzbb2017-09-062-0/+589
| | | | | | | | | | | | | | | | | | | | | | | | ClearFog is equipped with Marvell Armada 388 SoC, which is already supported in FreeBSD. Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D7326 (cherry picked from commit c3e4ee70fad37ecd70d68098cd5803af4ef39d9a)
* | Restore DTS node of PCIe controller for A38X boardszbb2017-09-064-41/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pcie-controller node as a bus-parent of pcie nodes for Armada38x boards. This reduces diff between Linux and FreeBSD PCIe device tree representation to the minimum. This commit also allows for using multiple PCIe ports, thanks to the recent driver updates, which support such hierarchy. Restore original PCIe nodes in armada-385.dtsi and apply necessary changes in hitherto unused armada-380.dtsi. Submitted by: Michal Mazur <mkm@semihalf.com> Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield, Netgate Differential revision: https://reviews.freebsd.org/D10907 (cherry picked from commit d9f8ae151ab12118ad2101f0764b9681db254aee)
* | Add a kernel for Rogue-1.Luiz Souza2017-09-061-0/+4
| | | | | | | | (cherry picked from commit 06aa6a6c350d4370af031c7dd7a28edfb4e8d691)
* | Enable neta controller support in ARMADA38Xzbb2017-09-061-0/+1
| | | | | | | | | | | | | | | | | | Submitted by: Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D10707 (cherry picked from commit d9a969bd02823a607b6eddee0d165b6e4b9c2859)
OpenPOWER on IntegriCloud