| Commit message (Collapse) | Author | Age | Files | Lines |
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%rdi, %rsi, etc are inadvertently bypassed along with the check to
see if the instruction needs to be repeated per the 'rep' prefix.
Add "MOVS" instruction support for the 'MMIO to MMIO' case.
Reviewed by: neel
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MFC after: 3 days
X-MFC-to: stable/10
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NB: screen.4th is included by way of check-password.4th
MFC after: 3 days
X-MFC-to: stable/10
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MFC after: 3 days
X-MFC-to: stable/10
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MFC after: 3 days
MFH: stable/10
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Ficl/Forth and Lua. No visible change for Forth while enabling Lua support.
Submitted by: rpaulo
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MFC after: 3 days
X-MFC-to: stable/10 stable/9
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Per Austin group issue #884, sh should not import IFS from the environment
but always set it to $' \t\n'. For wordexp(), however, it is documented and
useful for it to use IFS from the environment.
Since sh currently imports IFS from the environment, this change has no
functional effect.
MFC after: 1 week
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X-MFC-with: r280849
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Suggested by: rdivacky
MFC after: 2 weeks
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Sponsored by: The FreeBSD Foundation
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Use ip6f_mf variable instead of checking its bits.
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The __builtin_init_dwarf_reg_size_table function is unimplemented in
clang 3.6 for AArch64. Comment it out for now and replace it with
a message and abort.
Tracked in upstream LLVM PR 22997
https://llvm.org/bugs/show_bug.cgi?id=22997
Submitted by: andrew
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Submitted by: John Wehle
Approved by: stas (mentor)
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Submitted by: John Wehle
Approved by: stas (mentor)
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specially aml8726-m6 and aml8726-m8b SoC based devices.
aml8726-m6 SoC exist in devices such as Visson ATV-102.
Hardkernel ODROID-C1 board has aml8726-m8b SoC.
The following support is included:
Basic machdep code
SMP
Interrupt controller
Clock control driver (aka gate)
Pinctrl
Timer
Real time clock
UART
GPIO
I2C
SD controller
SDXC controller
USB
Watchdog
Random number generator
PLL / Clock frequency measurement
Frame buffer
Submitted by: John Wehle
Approved by: stas (mentor)
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Suggested by: imp
Differential Revision: https://reviews.freebsd.org/D2154
Reviewed by: imp, jhb
Approved by: jhb
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still need libc_pic for a few things, but this is expected to be ready
soon.
Differential Revision: https://reviews.freebsd.org/D2136
Reviewed by: kib
Sponsored by: The FreeBSD Foundation
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- Bump up to WARNS=6
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- Remove blank (tab-only) lines.
- Fix -Wunused warnings.
- Bump up to WARNS= 6
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- Convert errx(-1, ..) to errx(1, ..)
- Move the aio(4) checks to a single function (aio_available); use modfind(2)
instead of depending on SIGSYS (doesn't work when aio(4) support is missing,
not documented in the aio syscall manpages).
- Use aio_available liberally in the testcase functions
- Use mkstemp(3) + unlink(2) instead of mktemp(3)
- Fix some -Wunused warnings
- Bump WARNS to 6
MFC after: 1 week
Submitted by: mjohnston [*]
Sponsored by: EMC / Isilon Storage Division
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file for it.
MFC after: 1 month
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MFC after: 1 month
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MFC after: 1 week
Reviewed by: ngie
Approved by: ngie
Differential Revision: D1600
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MFC after: 1 week
Reviewed by: ngie
Approved by: ngie
Differential Revision: D1600
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MFC after: 1 week
Reviewed by: ngie
Approved by: ngie
Differential Revision: D1600
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MFC after: 1 week
Reviewed by: ngie
Approved by: ngie
Differential Revision: D1600
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MFC after: 1 week
Reviewed by: ngie
Approved by: ngie
Differential Revision: D1600
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MFC after: 1 week
Reviewed by: ngie
Approved by: ngie
Differential Revision: D1600
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MFC after: 1 week
Reviewed by: ngie
Approved by: ngie
Differential Revision: D1600
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Reported by: Coverity (internal)
MFC after: 3 days
Sponsored by: EMC / Isilon Storage Division
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freebsd-update can be useful has moved into the firstboot_freebsd_update
script.
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on Intel processors. Clear spurious dependency by explicitely xoring
the destination register of popcnt.
Use bitcount64() instead of re-implementing SWAR locally, for
processors without popcnt instruction.
Reviewed by: jhb
Discussed with: jilles (previous version)
Sponsored by: The FreeBSD Foundation
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to create EC2 AMIs will come in a later commit.
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mark cannot be reached because the window advertised to the peer isn't
wide enough. While here, tweak the normal credit return too.
MFC after: 1 month
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to kern/kern_timeout.c
This does *not* address his -1 -> NOCPU comment.
Sponsored by: Netflix Inc.
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allows us to keep the KPI the same.
Discussed and brain-stormed with imp (thanks for the help Warner!)
Sponsored by: Netflix Inc.
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excluding it. This was broken in 3.0.4 (r238856).
Obtained from: https://github.com/libarchive/libarchive/commit/fa9e61
MFC after: 3 days
Sponsored by: EMC / Isilon Storage Division
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VOP_GETPAGES_ASYNC().
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arm1136 code.
Reviewed by: ian
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rather than 20. The MP 1.4 specification states in Appendix B.2:
"A period of 20 microseconds should be sufficient for IPI dispatch to
complete under normal operating conditions".
(Note that this appears to be separate from the 10 millisecond (INIT) and
200 microsecond (STARTUP) waits after the IPIs are dispatched.) The
Intel SDM is silent on this issue as far as I can tell.
At least some hardware requires 60 microseconds as noted in the PR, so
bump this to 100 to be on the safe side.
PR: 197756
Reported by: zaphod@berentweb.com
MFC after: 1 week
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As is described at http://llvm.org/bugs/show_bug.cgi?id=22408, the GNU
linkers ld.bfd and ld.gold currently only support a subset of the
whole range of AArch64 ELF TLS relocations. Furthermore, they assume
that some of the code sequences to access thread-local variables are
produced in a very specific sequence. When the sequence is not as the
linker expects, it can silently mis-relaxe/mis-optimize the
instructions.
Even if that wouldn't be the case, it's good to produce the exact
sequence, as that ensures that linkers can perform optimizing
relaxations.
This patch:
* implements support for 16MiB TLS area size instead of 4GiB TLS area
size. Ideally clang would grow an -mtls-size option to allow support
for both, but that's not part of this patch.
* by default doesn't produce local dynamic access patterns, as even
modern ld.bfd and ld.gold linkers do not support the associated
relocations. An option (-aarch64-elf-ldtls-generation) is added to
enable generation of local dynamic code sequence, but is off by
default.
* makes sure that the exact expected code sequence for local dynamic
and general dynamic accesses is produced, by making use of a new
pseudo instruction. The patch also removes two
(AArch64ISD::TLSDESC_BLR, AArch64ISD::TLSDESC_CALL) pre-existing
AArch64-specific pseudo SDNode instructions that are superseded by
the new one (TLSDESC_CALLSEQ).
Submitted by: Kristof Beyls
Differential Revision: https://reviews.freebsd.org/D2175
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[libcxx] Fix PR22771 - Support access control SFINAE in the library
version of is_convertible.
Summary:
Currently the conversion check does not take place in a context where
access control SFINAE is applied. This patch changes the context of
the test expression so that SFINAE occurs if access control does not
permit the conversion.
Related bug: https://llvm.org/bugs/show_bug.cgi?id=22771
Reviewers: mclow.lists, rsmith, dim
Reviewed By: dim
Subscribers: dim, rodrigc, emaste, cfe-commits
Differential Revision: http://reviews.llvm.org/D8461
This fixes building clang, and other programs using libc++, with newer
versions of gcc (specifically, gcc 4.8 and higher).
Reported by: rodrigc
MFC after: 1 week
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