| Commit message (Collapse) | Author | Age | Files | Lines |
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but also of different types, f.e. Sun Fire V890 can be equipped with a
mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization
and different workarounds for model specific errata. Therefore move the
CPU implementation number from a global variable to the per-CPU data.
Functions which are called before the latter is available are passed the
implementation number as a parameter now.
This file was missed in r204152.
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zero *CMAP1.
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- remove unused CADDR1
- hold lock across page table update
MFC after: 3 days
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- fix witness warnings by making configuration lock a mutex
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Reviewed by: sam
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Tx DMA burst size 2048, I beleive PCIe maximum read request size
also should match to the value of Tx DMA burst size. With this
change I can get more than 800Mbps for TCP bulk transfers.
Previously I was not able to get more than 700Mbps. If I enable TSO
it now shows 927Mbps.
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OFW properties.
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but also of different types, f.e. Sun Fire V890 can be equipped with a
mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization
and different workarounds for model specific errata. Therefore move the
CPU implementation number from a global variable to the per-CPU data.
Functions which are called before the latter is available are passed the
implementation number as a parameter now.
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to make TSO work on VLAN. So if VLAN hardware tagging is disabled
explicitly clear TSO on VLAN. While I'm here remove duplicated
VLAN_CAPABILITIES call.
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Reviewed by: thompsa
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from IFCAP_VLAN_HWTAGGING. I think some hardwares may be able to
TSO over VLAN without VLAN hardware tagging.
Driver changes and userland support will follow.
Reviewed by: thompsa
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before were possibly panicing the system in ULP code in the VIMAGE case.
Submitted by: Igor (igor ispsystem.com)
MFC after: 5 days
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big-endian architecture.
Submitted by: C. Jayachandran <c.jayachandran at gmail dot com> (initial version)
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- 'show ifnets' prints a list of ifnet *s per virtual network stack,
- 'show ifnet <struct ifnet *>' prints fields matching the given ifp.
We do not yet print the complete set of fields and might want to
factor this out to an extra if_debug.c file in case this grows
a lot[1]. We may also want to grow 'show ifnet <if_xname>' support[1].
Sponsored by: ISPsystem
Suggested by: rwatson [1]
Reviewed by: rwatson
MFC after: 5 days
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Submitted by: Andreas Tobler
Obtained from: OpenBSD
MFC after: 1 week
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resources.
Sponsored by: ISPsystem
Reviewed by: rwatson
MFC After: 5 days
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Sponsored by: ISPsystem
Reviewed by: rwatson
MFC after: 5 days
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MFC after: 1 week
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a "locked" version that will only handle a single network stack
instance. The latter is called directly from ip_destroy().
Hook up an ip_destroy() function to release resources from the
legacy IP network layer upon virtual network stack teardown.
Sponsored by: ISPsystem
Reviewed by: rwatson
MFC After: 5 days
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on mips. Its not fully done yet but its a start.
Obtained from: JC - c.jayachandran@gmail.com
M gnu/usr.bin/gdb/kgdb/trgt_mips.c
M gnu/usr.bin/gdb/arch/mips/init.c
M gnu/usr.bin/gdb/arch/mips/Makefile
M gnu/usr.bin/Makefile
M contrib/gdb/gdb/mips-tdep.h
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- changes to avoid adding theses instances on specific chips
Obtained from: C. Jayachandran - JC - c.jayachandran@gmail.com
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- add bus_space_rmi_pci.c for PCI bus space
- files.xlr update for changes in files
- pcibus.c merged into xlr_pci.c (they were small files with inter-dependencies)
- xlr_pci.c - lot of changes here with few fixes, formatting cleanup
Obtained from: C. Jayachandran (JC) - c.jayachandran@gmail.com
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- add bus_space_rmi_pci.c for PCI bus space
Obtained from: C. Jayachandran - <c.jayachandran@gmail.com>
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- remove pci related code from bus_space_rmi.c, we will have another
file for PCI bus space functions which will do byte-swapping.
- remove local SWAP implementation
- added TODO stub for unimplemented functions
Obtained from: C. Jayachandran - c.jayachandran@gmail.com
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- (cleanup) remove rmi specific 'struct mips_intrhand' - this is no
longer needed since 'struct intr_event' have all the required hooks
- add xlr_cpu_establish_hardintr, which has args for pre/post ithread
and filter hooks, so that the PCI code can add the PCI controller
interrupt ack code here
- make 'cpu_establish_hardintr' use the above function.
- (fix) change type of eirr/eimr from register_t to uint64_t. These
have to be 64bit otherwise we cannot handle interrupts from 32.
- (fix) use eimr to mask eirr before checking interrupts, so that we
will not handle masked interrupts.
Obtained from: C. Jayachandran - c.jayachandran@gmail.com
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PowerPC Book-S hardware, which had been broken for a very long time.
Submitted by: Andreas Tobler
MFC after: 1 week
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UMA segments at their physical addresses instead of into KVA. This emulates
the direct mapping behavior of OEA32 in an ad-hoc way. To make this work
properly required sharing the entire kernel PMAP with Open Firmware, so
ofw_pmap is transformed into a stub on 64-bit CPUs.
Also implement some more tweaks to get more mileage out of our limited
amount of KVA, principally by extending KVA into segment 16 until the
beginning of the first OFW mapping.
Reported by: linimon
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of its argument before atomically replacing it, which could occasionally
return the wrong value on an SMP system. This resulted in user mutex
operations hanging when using threaded applications.
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Submitted by: Giovanni Trematerra
<giovanni dot trematerra at gmail dot com>
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Submitted by: Yohanes Nugroho <yohanes at gmail dot com>
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masked with 0xfffffff0
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In my previous commit I should have moved the inclusion to the top,
instead of adding a second one.
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This header file uses __packed, without including <sys/cdefs.h>. This
means it cannot be used in the way described in sysarch(3) by only
including <machine/sysarch.h>.
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Pointed out by: bf1783 at gmail
Approved by: np (cxgb), kientzle (tar, etc.), philip (mentor)
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Approved by: delphij (mentor)
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The backtrace code tries to look for an instruction of the form "sw ra, x(sp)"
to figure out the program counter of the calling function. When we generate
the kernel exception frame we store the 'ra' at the time of the exception
using an instruction of the same form. The problem is that the 'ra' at the
time of the exception is not the same as the 'program counter' at the time
of the exception.
The fix is to save the 'exception program counter' register by staging
it through the 'ra' register.
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Discussed with: gonzo, imp
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one.
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reference to the head.
PR: kern/119307
MFC After: 1 week
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in non-immediate mode.
PR: kern/143855
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Submitted by: jilles
MFC after: 3 months
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Obtained from: NetBSD
MFC after: 3 months
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Submitted by: kib
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Submitted by: Alexander Zagrebin <alexz@visp.ru>
MFC after: 2 weeks
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messages that are plaguing me). While I'm here, delete trailing whitespace.
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* Remove an unused global variable.
* Fix an issue reported by Bruce Cran related to reusing SCTP socket which
where connected.
MFC after: 1 week
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