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* Remove the three-chain scaled power check for the AR9287 - it isn'tadrian2011-05-261-6/+0
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* Make sure only two chains are calibrated for the AR9287.adrian2011-05-261-2/+2
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* Add some open-loop TX power debugging for AR9287.adrian2011-05-261-0/+5
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* Close a race between libzfs and mountd when updating NFS exports.will2011-05-261-0/+1
| | | | | | | | | - Flush the file descriptor for the new ZFS exports file before sending a SIGHUP to mountd. Reviewed by: pjd Approved by: ken MFC after: 3 days
* Bring over the AR5416 per-rate TX power code, modified to use theadrian2011-05-261-9/+199
| | | | | | | | | | | | | AR9287 EEPROM layout. The AR9287 only supports 2ghz, so I've removed the 5ghz code (but left the 5ghz edge flags in there for now) and hard-coded the 2ghz-only path. Whilst I'm there, fix a typo (ar9285->ar9287.) This meets basic TX throughput testing - iperf TX tests == 27-28mbit in 11g, matching the rest of my 11g kit.
* Flesh out ar9287SetTransmitPower() based on the AR9285 routine.adrian2011-05-261-6/+116
| | | | | | Hard-code the per-rate TX power at 5dBm for now so testing can be done. This passes initial TX testing in 11g mode (but, obviously, at 5dBm.)
* Add a missing isync.nwhitehorn2011-05-261-0/+1
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* Flesh out the TX power calibration for the AR9287.adrian2011-05-264-0/+179
| | | | | | | | | | | | | | I'm assuming for now that the AR9287 is only open-loop TX power control (as mine is) so I've hard-coded the attach path to fail if the NIC is not open-loop. This greatly simplifies the TX calibration path and the amount of code which needs to be ported over. This still isn't complete - the rate calculation code still needs to be ported and it all needs to be glued together. Obtained from: Linux ath9k
* Added myself as src committer.ray2011-05-262-0/+4
| | | | Approved by: adrian (mentor)
* Add Marvell 88SE9172 chip PCI ID.mav2011-05-261-0/+1
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* Add the AR9287 chip identification string.adrian2011-05-261-0/+2
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* Marvell 88SE91xx controllers are known to report soft-reset completionmav2011-05-261-28/+49
| | | | | | | | | | | | | | without waiting for device readiness (or at least not updating FIS receive area in time). To workaround that, special quirk was added earlier to wait for the FIS receive area update. But it was found that under same PCI ID 0x91231b4b and revision 0x11 there are two completely different chip versions (firmware?): HBA and RAID. The problem is that RAID version in some cases, such as hot-plug, does not update FIS receive area at all! To workaround that, differentiate the chip versions by their capabilities, and, if RAID version found, skip FIS receive area update waiting and read device signature from the PxSIG register instead. This method doesn't work for HBA version when PMP attached, so keep using previous workaround there.
* Fix a bad merge from a previous commit.adrian2011-05-261-4/+6
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* Merlin -> Kiwiadrian2011-05-261-2/+2
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* Bring over my AR9287 work in progress.adrian2011-05-2616-1/+2293
| | | | | | | | | | | | | | | | | | | | | | | | | | | It isn't linked into the build because it's missing the TX power and PDADC programming code. This code is mostly based on the ath9k codebase, compared against the Atheros codebase as appropriate. What's implemented: * probe/attach * EEPROM board value programming * RX initial calibration * radio channel programming * general MAC / baseband setup * async fifo setup * open-loop tx power calibration What's missing before it can be enabled by default: * TX power / calibration setting code * closed-loop tx power calibration routines * TSF2 handling * generic timer support from ath9k Obtained from: Atheros, ath9k
* AR9287 prep work:adrian2011-05-263-3/+32
| | | | | | | | * Add PCI/PCIE devids * Add AR9287/Kiwi version check macros * AR_SREV_9287 -> AR_SREV_KIWI Obtained from: Atheros, ath9k
* Add temp sense to the EEPROM variable list;adrian2011-05-262-23/+15
| | | | Export the temperature sense variables to ah_eeprom_9287.c
* Add better names for the Intel HDMI audio codecs.mav2011-05-261-12/+14
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* + Tighten up (and simplify) the pass_cmd_vars_1 "variable definition arrivedobrien2011-05-251-12/+9
| | | | | from the calling make" test. + Be more tolerant of newlines in the plus_flag "supports the '+' flag" test.
* sh: Show errno messages in cd.jilles2011-05-251-1/+4
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* Add some missing mutex locking to the new NFS client.rmacklem2011-05-251-0/+2
| | | | MFC after: 2 weeks
* Bump the date of the man page to the date of the actual commit.bcr2011-05-251-1/+1
| | | | Noticed by: brix
* Fix the new NFS client so that it correctly sets the "must_commit"rmacklem2011-05-253-18/+11
| | | | | | | | argument for a write RPC when it succeeds for the first one and fails for a subsequent RPC within the same call to the function. This makes it compatible with the old NFS client for this case. MFC after: 2 weeks
* Document the device name change from gpioctl to gpioc in thebcr2011-05-251-5/+5
| | | | | | | | man page. PR: docs/157075 Submitted by: brix Reviewed by: gonzo
* Fix a regression introduced with previous changeset: if output is stdout,delphij2011-05-251-1/+2
| | | | do not check for symbolic link.
* [mdoc] Fixed .Dt call.ru2011-05-2518-18/+18
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* According to SATA specification, when Serial ATA Enclosure Management Bridgemav2011-05-253-29/+65
| | | | | | | | | | | | | | | | | | | | (SEMB) is unable to communicate to Storage Enclosure Processor (SEP), in response to hard and soft resets it should among other things return value 0x7F in Status register. The weird side is that it means DRQ bit set, which tells that reset request is not completed. It would be fine if SEMB was the only device on port. But if SEMB connected to PMP or built into it, it may block access to other devices sharing same SATA port. Make some tunings/fixes to soft-reset handling to workaround the issue: - ahci(4): request CLO on the port after soft reset to ignore DRQ bit; - siis(4): gracefully reinitialize port after soft reset timeout (hardware doesn't detect reset request completion in this case); - mvs(4): if PMP is used, send dummy soft-reset to the PMP port to make it clear DRQ bit for us. For now this makes quirks in ata_pmp.c, hiding SEMB ports of SiI3726/SiI4726 PMPs, less important. Further, if hardware permit, I hope to implement real SEMB support.
* Prevent non-aligned reading from provider while tasting. Rejectae2011-05-252-0/+10
| | | | | | | providers with unsupported sectorsize. Reported by: Joerg Wunsch MFC after: 1 week
* Bring back r222275. runfw(4) will statically link in rt2870.fw.uukevlo2011-05-252-2/+0
| | | | | | to the kernel, though I have MODULES_OVERRIDE="" in GENERIC. Spotted by: thompsa
* Do not truncate available disk space to the closest track boundary.ae2011-05-251-7/+3
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* Do not truncate available disk space to the closest track boundary.ae2011-05-251-2/+1
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* Do not truncate available disk space to the closest track boundary.ae2011-05-251-4/+3
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* Add a description to the checksum target about not onlybcr2011-05-251-1/+3
| | | | | | | | | | being able to verify, but also having the ability to fetch distfiles that are missing or failed the checksum calculation PR: docs/138887 Submitted by: Radim Kolar (hsn at sendmail dot cz) MFC after: 5 days
* The current ANI capability information uses a different set ofadrian2011-05-254-27/+47
| | | | | | | | | | | | | | | | values for the commands, compared to the internal command values (HAL_ANI_CMD.) My eventual aim is to make the HAL_ANI_CMD internal enum match the public API and then remove all this messiness. This now allows HAL_CAP_INTMIT users to use a public HAL_CAP_INTMIT_ enum rather than magic constants. The only magic constants currently used by if_ath are "enable" and "present". Some local tools of mine allow for direct, manual fiddling of the ANI variables and I'll convert these to use the public enum API before I commit them.
* Tidy up the ANI API in preparation for looking to expose some moreadrian2011-05-256-18/+32
| | | | | | | | | | | of the ANI statistics and committing some tools which use these. * Change HAL_ANI_* commands _back_ to be numerical, rather than a bitmap; * modify access to the ANI control bitmap to convert a command to a bitmap; * Fix the ANI noise immunity fiddling for CCK errors - it wasn't checking whether noise immunity was disabled or not.
* run(4) needs firmware loaded to workkevlo2011-05-252-0/+2
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* Build and install a BSD licensed grep.obrien2011-05-255-8/+28
| | | | | | | | If WITH_BSD_GREP is not set, it will be 'bsdgrep' and GNUgrep will be '[ef]grep'. Otherwise, BSD-grep will be the grep family, and GNUgrep will be 'gnugrep'. Discussed with: brooks
* Add FEATURE() definitions for IPv4 and IPv6 so that we can usebz2011-05-252-0/+3
| | | | | | | | | | feature_present(3) to dynamically decide whether to use one or the other family. Reviewed by: gnn Sponsored by: The FreeBSD Foundation Sponsored by: iXsystems MFC after: 10 days
* style(9)yongari2011-05-241-16/+17
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* Don't pass pointer to name buffer which is on the stack to another thread,pjd2011-05-241-20/+11
| | | | | | | because the stack might be paged out once the other thread tries to use the data. Instead, just allocate memory. MFC after: 2 weeks
* Don't access task structure once we call task function.pjd2011-05-244-20/+3
| | | | | | | | The task structure might be no longer available. This also allows to eliminates the need for two tasks in the zio structure. Submitted by: anonymous MFC after: 2 weeks
* Silly spelling typos.jhb2011-05-241-4/+4
| | | | Submitted by: "b. f."
* The ANI control for the AR5416 and later chips was calling ar5212AniControl(),adrian2011-05-244-2/+11
| | | | | | | | | | which did AR5212 specific initialisation. This would cause some slight silliness when enabling/disabling ANI. Just to be completely correct - and to ensure the phy error mask/RX filter register isn't incorrectly played with - make the ANI control function a method, have it set appropriately for AR5212/AR5416, and call that from the ANI control interface.
* Simplify ALIGNDOWN macro.ae2011-05-241-1/+1
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* Fix calculation of alignment for odd values. Also do not change valueae2011-05-241-2/+2
| | | | when it is already aligned.
* Assume the link to be dead if bit error rate (BER) parameter is set to 1.zec2011-05-241-1/+30
| | | | | | | | | | | When a transition from link alive to link dead configuration or vice versa occurs, notify any upstream and / or downstream peers using NGM_FLOW messagges. Link state notification using NGM_FLOW messages is modelled around around already existing code in ng_ether.c. MFC after: 3 days
* Provide fake link status information in an attempt to let ng_eiface(4)zec2011-05-241-1/+70
| | | | | | | | | | | | virtual ifnets more realistically mimic physical ethernet interfaces. The main motivation behind this change is to allow for ng_eiface(4) interfaces to participate in STP if_bridge(4) configurations. When announcing link status changes, switch to the vnet to which the ifnet belongs, since it is possible for ng_eiface ifnets to be assigned to a vnet different from the one in which its netgraph node resides. MFC after: 3 days
* Fix an issue with critical sections and SMP rendezvous handlers.jhb2011-05-241-7/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifically, a critical_exit() call that drops the nesting level to zero has a brief window where the pending preemption flag is set and the nesting level is set to zero. This is done purposefully to avoid races where a preemption scheduled by an interrupt could be lost otherwise (see revision 144777). However, this does mean that if an interrupt fires during this window and enters and exits a critical section, it may preempt from the interrupt context. This is generally fine as the interrupt code is careful to arrange critical sections so that they are not exited until it is safe to preempt (e.g. interrupts EOI'd and masked if necessary). However, the SMP rendezvous IPI handler does not quite follow this rule, and in general a rendezvous can never be preempted. Rendezvous handlers are also not permitted to schedule threads to execute, so they will not typically trigger preemptions. SMP rendezvous handlers may use spinlocks (carefully) such as the rm_cleanIPI() handler used in rmlocks, but using a spinlock also enters and exits a critical section. If the interrupted top-half code is in the brief window of critical_exit() where the nesting level is zero but a preemption is pending, then releasing the spinlock can trigger a preemption. Because we know that SMP rendezvous handlers can never schedule a thread, we know that a critical_exit() in an SMP rendezvous handler will only preempt in this edge case. We also know that the top-half thread will happily handle the deferred preemption once the SMP rendezvous has completed, so the preemption will not be lost. This makes it safe to employ a workaround where we use a nested critical section in the SMP rendezvous code itself around rendezvous action routines to prevent any preemptions during an SMP rendezvous. The workaround intentionally avoids checking for a deferred preemption when leaving the critical section on the assumption that if there is a pending preemption it will be handled by the interrupted top-half code. Submitted by: mlaier (variation specific to rm_cleanIPI()) Obtained from: Isilon MFC after: 1 week
* Update comments for DEVICE_PROBE() to reflect that BUS_PROBE_DEFAULT isjhb2011-05-241-9/+11
| | | | | | | | | now the preferred typical return value from a probe routine. Discourage the use of 0 (BUS_PROBE_SPECIFIC) as it should be used very rarely. Point the reader to the DEVICE_PROBE(9) manpage for more detailed notes on possible probe return values. Submitted by: Philip Soeberg philip-dev of soeberg net
* Simplify a stale assertion. We have not called mi_switch() from a nestedjhb2011-05-241-3/+1
| | | | | | critical section during a preemption for several years. MFC after: 1 week
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