| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
| |
Fix unload of USB audio kernel module.
|
|
|
|
| |
This is a direct commit to stable/10.
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Fix a bug in the HPET emulation where a timer interrupt could be lost when the
guest disables the HPET.
The HPET timer interrupt is triggered from the callout handler associated with
the timer. It is possible for the callout handler to be delayed before it gets
a chance to execute. If the guest disables the HPET during this window then the
handler never gets a chance to execute and the timer interrupt is lost.
This is now fixed by injecting a timer interrupt into the guest if the callout
time is detected to be in the past when the HPET is disabled.
|
|
|
|
|
|
| |
corresponding top(1) change.
Sponsored by: The FreeBSD Foundation
|
|
|
|
| |
Don't reply monlist request when it's not enabled.
|
|
|
|
| |
Remove some prototypes for undefined functions.
|
|
|
|
|
|
|
|
|
|
| |
(NANO_CONFIG): New variable containing path of config file, so that
the configuration can reference additional files relative to its own
location.
(NANO_MODULES): If set to "default", install all built modules.
Reviewed by: imp
|
|
|
|
| |
Add new AMT serial port PCI ID on Intel Lynx Point chipset
|
|
|
|
| |
Requested by: ache
|
|
|
|
| |
and rend after this point.
|
|
|
|
|
|
| |
Fix the VCVT instruction. It must round towards zero when converting from
a floating-point to an integer value. This was not the case causing issues
when printing certain values.
|
| |
|
| |
|
|
|
|
|
| |
Make sure the PCB is aligned on 8 bytes, we may use ldrd/strd to access it,
which may have strong alignment requirements.
|
|
|
|
|
| |
Fix an itt instruction. We need to execute both the mov and b instructions
when building for Thumb.
|
|
|
|
|
|
|
|
| |
- Fix a typo.
- Use bus_dmamap_unload(), it is not optional.
- The new allocator won't return coherent memory for any size > PAGE_SIZE,
so don't assume we have coherent memory, and explicitely use
bus_dmamap_sync().
|
| |
|
| |
|
|
|
|
|
|
|
|
| |
- Don't claim the adapter is idle if it is clearing a drive.
- Fix an off by one error when checking for the stop event. This
resulted in not showing the most recent event by default.
- When the stop even is hit, break out of the outer loop to stop
fetching more events.
|
| |
|
|
|
|
|
|
|
|
|
|
| |
Fix a couple of issues with vcpu state:
- Add a parameter to 'vcpu_set_state()' to enforce that the vcpu is in the
IDLE state before the requested state transition. This guarantees that
there is exactly one ioctl() operating on a vcpu at any point in time and
prevents unintended state transitions.
- Fix a race between VMRUN() and vcpu_notify_event() due to 'vcpu->hostcpu'
being updated outside of the vcpu_lock().
|
|
|
|
|
|
|
|
| |
Interrupts need to be disabled on entry to cpu_sleep() for ARM. Given
that and the need to be in a critical section when switching to idleclock
mode for event timers, use spinlock_enter()/exit() to achieve both needs.
Clean up some style nits.
|
|
|
|
|
|
|
| |
Make the hardware memory and instruction barrier functions work on armv4
and armv5 as well.
Add cpu_l2cache_drain_writebuf(), use it to implement generic_bs_barrier().
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Move the mptramp code which is specific to the Marvell ArmadaXP SoC out of
the common locore.S file and into the mv/armadaxp directory.
Consolidate all the AP core startup stuff under a single #ifdef SMP block
Call idcache_inv_all from the AP core entry code before turning on the MMU.
Also, enable instruction and branch caches, which should be safe now that
they're properly initialized/invalidated first.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Move the pl310.enabled tunable to hw.pl310.enabled. Clean up a few minor
style(9) nits. Use DEVMETHOD_END.
Break out the code that figures out the L2 cache geometry to its own
routine, so that it can be called from multiple places in upcoming changes.
Call platform_pl310_init() before enabling the controller, and handle the
case where the controller is already enabled.
Add defines for the bits in the PL310 debug control register.
Add a public routine to set the L2 cache ram latencies. This can be
called by platform init routines to fine-tune cache performance.
Enable PL310 power-saving modes and tune the cache ram latencies for imx6.
|
|
|
|
|
|
| |
Omit from the universe build all config files tagged with #NO_UNIVERSE.
Add FDT to the VYBRID kernel.
|
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
|
| |
Add SMP support for Zedboard.
Use edge-triggered interrupts rather than polling loops to avoid missing
transitions of the INIT_B line. Also, release the mutex during uiomove().
Convert the Zynq SoC support to the new routines for static device mapping.
|
| |
|
| |
|
|
|
|
|
| |
Move common device tree informations to separate dtsi files for A10 and
A20 SoC. Change cubieboard1 and cubieboard2 dts files accordingly.
|
| |
|
|
|
|
|
|
|
|
|
|
| |
There is no difference between IPI_STOP and IPI_STOP_HARD on ARM, so
map them both to the same interrupt number like other arches do.
Flush and invalidate caches on each CPU as part of handling IPI_STOP.
Don't use multiprocessing-extensions instruction on processors that don't
support SMP.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Call cpu_icache_sync_range() rather than sync_all since we know the range
and flushing the entire icache is needlessly expensive.
Provide a proper armv7 implementation of icache_sync_all rather than
using armv7_idcache_wbinv_all, because wbinv_all doesn't broadcast the
operation to other cores. In elf_cpu_load_file() use icache_sync_all()
and explain why it's needed (and why other sync operations aren't).
Remove cpu_idcache_wbinv_all() from kdb_cpu_trap(), it's no longer needed.
Explain why wbinv_all is SMP-safe when dumping, and add a missing l2 cache
flush. (Either it was missing here, or it isn't needed in the minidump
case. Adding it here seems like the safer path to consistancy.)
|
|
|
|
|
|
|
|
|
|
| |
The freescale imx uart driver works for the whole i.MX family, so rename
the header file to not have "5xx" in the name.
Flesh out imx_uart_init() so that we're not relying on u-boot to init
the hardware (meaning uarts other than the console will work).
Reword a comment block a bit.
|
|
|
|
|
|
| |
Stop calling imx51_ccm_foo() clock functions from imx6 code. Instead
define a few imx_ccm_foo() functions that are implemented by the imx51
or imx6 ccm code.
|
|
|
|
|
|
|
| |
Add the deprecated fp{get,set}* functions, a few ports use them.
Rename the fp{get,set}* files so they no longer conflict with the
softfloat version of these files.
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
| |
Improve the i.MX53 / Digi DTS:
* Fix the IPU address.
* Fix the PATA definition.
* Add another I2C.
* Add more UARTs.
* Add SATA.
|
| |
|
|
|
|
|
| |
* Define support for the SDHCI driver, although it doesn't work yet
* Fix the memory mappings for IPU
|
| |
|
| |
|
|
|
|
|
|
|
|
| |
Tell VM we now have ARM platforms with physically discontiguous memory.
Define the full 1024M of ram on the imx51 and imx53 boards.
Use a more professional uart device description.
|
|
|
|
|
| |
Mark __fixdfdi/__aeabi_d2lz with COMPILER_RT_ABI so it uses the correct
calling convention for __aeabi_* functions.
|
|
|
|
|
|
|
|
| |
Follow files.imx51 and add vt support for imx53.
Add fsl,imx53 compatible string.
Need to include machine/fdt.h in vt_early_fb.c
|