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Diffstat (limited to 'usr.bin/clang/llc/llc.1')
-rw-r--r-- | usr.bin/clang/llc/llc.1 | 210 |
1 files changed, 95 insertions, 115 deletions
diff --git a/usr.bin/clang/llc/llc.1 b/usr.bin/clang/llc/llc.1 index b7862db..19f357a 100644 --- a/usr.bin/clang/llc/llc.1 +++ b/usr.bin/clang/llc/llc.1 @@ -1,5 +1,5 @@ .\" $FreeBSD$ -.TH "LLC" "1" "2012-08-16" "3.2" "LLVM" +.TH "LLC" "1" "2013-04-11" "3.3" "LLVM" .SH NAME llc \- LLVM static compiler . @@ -36,241 +36,221 @@ level margin: \\n[rst2man-indent\\n[rst2man-indent-level]] \fBllc\fP [\fIoptions\fP] [\fIfilename\fP] .SH DESCRIPTION .sp -The \fBllc\fP command compiles LLVM source inputs into assembly language for a -specified architecture. The assembly language output can then be passed through -a native assembler and linker to generate a native executable. +The \fBllc\fP command compiles LLVM source inputs into assembly language +for a specified architecture. The assembly language output can then be passed +through a native assembler and linker to generate a native executable. .sp The choice of architecture for the output assembly code is automatically -determined from the input file, unless the \fB\-march\fP option is used to override -the default. +determined from the input file, unless the \fI\%-march\fP option is used to +override the default. .SH OPTIONS .sp -If \fIfilename\fP is \- or omitted, \fBllc\fP reads from standard input. Otherwise, it -will from \fIfilename\fP. Inputs can be in either the LLVM assembly language -format (.ll) or the LLVM bitcode format (.bc). +If \fBfilename\fP is "\fB\-\fP" or omitted, \fBllc\fP reads from standard input. +Otherwise, it will from \fBfilename\fP. Inputs can be in either the LLVM assembly +language format (\fB.ll\fP) or the LLVM bitcode format (\fB.bc\fP). .sp -If the \fB\-o\fP option is omitted, then \fBllc\fP will send its output to standard -output if the input is from standard input. If the \fB\-o\fP option specifies \-, -then the output will also be sent to standard output. +If the \fI\-o\fP option is omitted, then \fBllc\fP will send its output +to standard output if the input is from standard input. If the \fI\-o\fP +option specifies "\fB\-\fP", then the output will also be sent to standard output. .sp -If no \fB\-o\fP option is specified and an input file other than \- is specified, -then \fBllc\fP creates the output filename by taking the input filename, -removing any existing \fI.bc\fP extension, and adding a \fI.s\fP suffix. +If no \fI\-o\fP option is specified and an input file other than "\fB\-\fP" is +specified, then \fBllc\fP creates the output filename by taking the input +filename, removing any existing \fB.bc\fP extension, and adding a \fB.s\fP suffix. .sp -Other \fBllc\fP options are as follows: +Other \fBllc\fP options are described below. .SS End\-user Options -.sp -\fB\-help\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-help Print a summary of command line options. .UNINDENT -.UNINDENT -.sp -\fB\-O\fP=\fIuint\fP .INDENT 0.0 -.INDENT 3.5 -Generate code at different optimization levels. These correspond to the \fI\-O0\fP, -\fI\-O1\fP, \fI\-O2\fP, and \fI\-O3\fP optimization levels used by \fBllvm\-gcc\fP and -\fBclang\fP. +.TP +.B \-O=uint +Generate code at different optimization levels. These correspond to the +\fB\-O0\fP, \fB\-O1\fP, \fB\-O2\fP, and \fB\-O3\fP optimization levels used by +\fBllvm\-gcc\fP and \fBclang\fP. .UNINDENT -.UNINDENT -.sp -\fB\-mtriple\fP=\fItarget triple\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-mtriple=<target triple> Override the target triple specified in the input file with the specified string. .UNINDENT -.UNINDENT -.sp -\fB\-march\fP=\fIarch\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-march=<arch> Specify the architecture for which to generate assembly, overriding the target encoded in the input file. See the output of \fBllc \-help\fP for a list of valid architectures. By default this is inferred from the target triple or autodetected to the current architecture. .UNINDENT -.UNINDENT -.sp -\fB\-mcpu\fP=\fIcpuname\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-mcpu=<cpuname> Specify a specific chip in the current architecture to generate code for. By default this is inferred from the target triple and autodetected to the current architecture. For a list of available CPUs, use: -\fBllvm\-as < /dev/null | llc \-march=xyz \-mcpu=help\fP +.INDENT 7.0 +.INDENT 3.5 +.sp +.nf +.ft C +llvm\-as < /dev/null | llc \-march=xyz \-mcpu=help +.ft P +.fi +.UNINDENT .UNINDENT .UNINDENT -.sp -\fB\-mattr\fP=\fIa1,+a2,\-a3,...\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-mattr=a1,+a2,\-a3,... Override or control specific attributes of the target, such as whether SIMD operations are enabled or not. The default set of attributes is set by the current CPU. For a list of available attributes, use: -\fBllvm\-as < /dev/null | llc \-march=xyz \-mattr=help\fP +.INDENT 7.0 +.INDENT 3.5 +.sp +.nf +.ft C +llvm\-as < /dev/null | llc \-march=xyz \-mattr=help +.ft P +.fi +.UNINDENT .UNINDENT .UNINDENT -.sp -\fB\-\-disable\-fp\-elim\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-disable\-fp\-elim Disable frame pointer elimination optimization. .UNINDENT -.UNINDENT -.sp -\fB\-\-disable\-excess\-fp\-precision\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-disable\-excess\-fp\-precision Disable optimizations that may produce excess precision for floating point. Note that this option can dramatically slow down code on some systems (e.g. X86). .UNINDENT -.UNINDENT -.sp -\fB\-\-enable\-no\-infs\-fp\-math\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-enable\-no\-infs\-fp\-math Enable optimizations that assume no Inf values. .UNINDENT -.UNINDENT -.sp -\fB\-\-enable\-no\-nans\-fp\-math\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-enable\-no\-nans\-fp\-math Enable optimizations that assume no NAN values. .UNINDENT -.UNINDENT -.sp -\fB\-\-enable\-unsafe\-fp\-math\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-enable\-unsafe\-fp\-math Enable optimizations that make unsafe assumptions about IEEE math (e.g. that addition is associative) or may not work for all input ranges. These optimizations allow the code generator to make use of some instructions which -would otherwise not be usable (such as fsin on X86). -.UNINDENT +would otherwise not be usable (such as \fBfsin\fP on X86). .UNINDENT -.sp -\fB\-\-enable\-correct\-eh\-support\fP .INDENT 0.0 -.INDENT 3.5 -Instruct the \fBlowerinvoke\fP pass to insert code for correct exception handling -support. This is expensive and is by default omitted for efficiency. +.TP +.B \-\-enable\-correct\-eh\-support +Instruct the \fBlowerinvoke\fP pass to insert code for correct exception +handling support. This is expensive and is by default omitted for efficiency. .UNINDENT -.UNINDENT -.sp -\fB\-\-stats\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-stats Print statistics recorded by code\-generation passes. .UNINDENT -.UNINDENT -.sp -\fB\-\-time\-passes\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-time\-passes Record the amount of time needed for each pass and print a report to standard error. .UNINDENT -.UNINDENT -.sp -\fB\-\-load\fP=\fIdso_path\fP .INDENT 0.0 -.INDENT 3.5 -Dynamically load \fIdso_path\fP (a path to a dynamically shared object) that -implements an LLVM target. This will permit the target name to be used with the -\fB\-march\fP option so that code can be generated for that target. -.UNINDENT +.TP +.B \-\-load=<dso_path> +Dynamically load \fBdso_path\fP (a path to a dynamically shared object) that +implements an LLVM target. This will permit the target name to be used with +the \fI\%-march\fP option so that code can be generated for that target. .UNINDENT .SS Tuning/Configuration Options -.sp -\fB\-\-print\-machineinstrs\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-print\-machineinstrs Print generated machine code between compilation phases (useful for debugging). .UNINDENT -.UNINDENT -.sp -\fB\-\-regalloc\fP=\fIallocator\fP .INDENT 0.0 -.INDENT 3.5 -Specify the register allocator to use. The default \fIallocator\fP is \fIlocal\fP. +.TP +.B \-\-regalloc=<allocator> +Specify the register allocator to use. The default \fBallocator\fP is \fIlocal\fP. Valid register allocators are: .sp \fIsimple\fP -.INDENT 0.0 +.INDENT 7.0 .INDENT 3.5 Very simple "always spill" register allocator .UNINDENT .UNINDENT .sp \fIlocal\fP -.INDENT 0.0 +.INDENT 7.0 .INDENT 3.5 Local register allocator .UNINDENT .UNINDENT .sp \fIlinearscan\fP -.INDENT 0.0 +.INDENT 7.0 .INDENT 3.5 Linear scan global register allocator .UNINDENT .UNINDENT .sp \fIiterativescan\fP -.INDENT 0.0 +.INDENT 7.0 .INDENT 3.5 Iterative scan global register allocator .UNINDENT .UNINDENT .UNINDENT -.UNINDENT -.sp -\fB\-\-spiller\fP=\fIspiller\fP .INDENT 0.0 -.INDENT 3.5 +.TP +.B \-\-spiller=<spiller> Specify the spiller to use for register allocators that support it. Currently -this option is used only by the linear scan register allocator. The default -\fIspiller\fP is \fIlocal\fP. Valid spillers are: +this option is used only by the linear scan register allocator. The default +\fBspiller\fP is \fIlocal\fP. Valid spillers are: .sp \fIsimple\fP -.INDENT 0.0 +.INDENT 7.0 .INDENT 3.5 Simple spiller .UNINDENT .UNINDENT .sp \fIlocal\fP -.INDENT 0.0 +.INDENT 7.0 .INDENT 3.5 Local spiller .UNINDENT .UNINDENT .UNINDENT -.UNINDENT .SS Intel IA\-32\-specific Options -.sp -\fB\-\-x86\-asm\-syntax=att|intel\fP .INDENT 0.0 -.INDENT 3.5 -Specify whether to emit assembly code in AT&T syntax (the default) or intel +.TP +.B \-\-x86\-asm\-syntax=[att|intel] +Specify whether to emit assembly code in AT&T syntax (the default) or Intel syntax. .UNINDENT -.UNINDENT .SH EXIT STATUS .sp -If \fBllc\fP succeeds, it will exit with 0. Otherwise, if an error occurs, -it will exit with a non\-zero value. +If \fBllc\fP succeeds, it will exit with 0. Otherwise, if an error +occurs, it will exit with a non\-zero value. .SH SEE ALSO .sp -lli|lli +lli .SH AUTHOR Maintained by The LLVM Team (http://llvm.org/). .SH COPYRIGHT -2012, LLVM Project +2003-2013, LLVM Project .\" Generated by docutils manpage writer. . |