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-rw-r--r--test/CodeGen/X86/memset-2.ll8
-rw-r--r--test/CodeGen/X86/memset-3.ll12
-rw-r--r--test/MC/Disassembler/arm-tests.txt62
-rw-r--r--test/MC/Disassembler/neon-tests.txt41
-rw-r--r--test/MC/Disassembler/thumb-tests.txt81
-rw-r--r--test/Transforms/GVN/2010-03-31-RedundantPHIs.ll46
-rw-r--r--test/Transforms/IndVarSimplify/2008-11-17-Floating.ll35
-rw-r--r--test/Transforms/IndVarSimplify/crash.ll19
-rw-r--r--test/Transforms/IndVarSimplify/dangling-use.ll41
-rw-r--r--test/Transforms/IndVarSimplify/floating-point-iv.ll (renamed from test/Transforms/IndVarSimplify/2008-11-03-Floating.ll)49
10 files changed, 297 insertions, 97 deletions
diff --git a/test/CodeGen/X86/memset-2.ll b/test/CodeGen/X86/memset-2.ll
index 702632c..0e15595 100644
--- a/test/CodeGen/X86/memset-2.ll
+++ b/test/CodeGen/X86/memset-2.ll
@@ -1,13 +1,11 @@
-; RUN: llc < %s | FileCheck %s
-
-target triple = "i386"
+; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s
declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
define fastcc void @t1() nounwind {
entry:
; CHECK: t1:
-; CHECK: call memset
+; CHECK: call _memset
call void @llvm.memset.i32( i8* null, i8 0, i32 188, i32 1 ) nounwind
unreachable
}
@@ -15,7 +13,7 @@ entry:
define fastcc void @t2(i8 signext %c) nounwind {
entry:
; CHECK: t2:
-; CHECK: call memset
+; CHECK: call _memset
call void @llvm.memset.i32( i8* undef, i8 %c, i32 76, i32 1 ) nounwind
unreachable
}
diff --git a/test/CodeGen/X86/memset-3.ll b/test/CodeGen/X86/memset-3.ll
new file mode 100644
index 0000000..9b20ad5
--- /dev/null
+++ b/test/CodeGen/X86/memset-3.ll
@@ -0,0 +1,12 @@
+; RUN: llc -mtriple=i386-apple-darwin < %s | not grep memset
+; PR6767
+
+define void @t() nounwind ssp {
+entry:
+ %buf = alloca [512 x i8], align 1
+ %ptr = getelementptr inbounds [512 x i8]* %buf, i32 0, i32 0
+ call void @llvm.memset.i32(i8* %ptr, i8 undef, i32 512, i32 1)
+ unreachable
+}
+
+declare void @llvm.memset.i32(i8* nocapture, i8, i32, i32) nounwind
diff --git a/test/MC/Disassembler/arm-tests.txt b/test/MC/Disassembler/arm-tests.txt
new file mode 100644
index 0000000..094a2d7
--- /dev/null
+++ b/test/MC/Disassembler/arm-tests.txt
@@ -0,0 +1,62 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
+
+# CHECK: b #0
+0xfe 0xff 0xff 0xea
+
+# CHECK: bfc r8, #0, #16
+0x1f 0x80 0xcf 0xe7
+
+# CHECK: bfi r8, r0, #16, #1
+0x10 0x88 0xd0 0xe7
+
+# CHECK: cmn r0, #1
+0x01 0x00 0x70 0xe3
+
+# CHECK: dmb nshst
+0x56 0xf0 0x7f 0xf5
+
+# CHECK: ldr r0, [r2], #15
+0x0f 0x00 0x92 0xe4
+
+# CHECK: lsls r0, r2, #31
+0x82 0x0f 0xb0 0xe1
+
+# CHECK: mcr2 p0, #0, r2, cr1, cr0, #7
+0xf0 0x20 0x01 0xfe
+
+# CHECK: movt r8, #65535
+0xff 0x8f 0x4f 0xe3
+
+# CHECK: pkhbt r8, r9, r10, lsl #4
+0x1a 0x82 0x89 0xe6
+
+# CHECK: pop {r0, r2, r4, r6, r8, r10}
+0x55 0x05 0xbd 0xe8
+
+# CHECK: push {r0, r2, r4, r6, r8, r10}
+0x55 0x05 0x2d 0xe9
+
+# CHECK: qsax r8, r9, r10
+0x5a 0x8f 0x29 0xe6
+
+# CHECK: rfedb r0!
+0x00 0x0a 0x30 0xf9
+
+# CHECK: sbcs r0, pc, #1
+0x01 0x00 0xdf 0xe2
+
+# CHECK: sbfx r0, r1, #0, #8
+0x51 0x00 0xa7 0xe7
+
+# CHECK: ssat r8, #1, r10, lsl #8
+0x1a 0x84 0xa0 0xe6
+
+# CHECK: stmdb r10!, {r4, r5, r6, r7, lr}
+0xf0 0x40 0x2a 0xe9
+
+# CHECK: teq r0, #31
+0x1f 0x00 0x30 0xe3
+
+# CHECK: ubfx r0, r0, #16, #1
+0x50 0x08 0xe0 0xe7
+
diff --git a/test/MC/Disassembler/neon-tests.txt b/test/MC/Disassembler/neon-tests.txt
new file mode 100644
index 0000000..5d37b8c
--- /dev/null
+++ b/test/MC/Disassembler/neon-tests.txt
@@ -0,0 +1,41 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
+
+# CHECK: vbif q15, q7, q0
+0x50 0xe1 0x7e 0xf3
+
+# CHECK: vcvt.f32.s32 q15, q0, #1
+0x50 0xee 0xff 0xf2
+
+# CHECK: vdup.32 q3, d1[0]
+0x41 0x6c 0xb4 0xf3
+
+# CHECK: vld4.8 {d0, d1, d2, d3}, [r2], r7
+0x07 0x00 0x22 0xf4
+
+# CHECK: vld4.8 {d4, d6, d8, d10}, [r2]
+0x0f 0x41 0x22 0xf4
+
+# CHECK: vmov d0, d15
+0x1f 0x01 0x2f 0xf2
+
+# CHECK: vmul.f32 d0, d0, d6
+0x16 0x0d 0x00 0xf3
+
+# CHECK: vneg.f32 q0, q0
+0xc0 0x07 0xb9 0xf3
+
+# CHECK: vqrdmulh.s32 d0, d0, d3[1]
+0x63 0x0d 0xa0 0xf2
+
+# CHECK: vrshr.s32 d0, d0, #16
+0x10 0x02 0xb0 0xf2
+
+# CHECK: vshll.i16 q3, d1, #16
+0x01 0x63 0xb6 0xf3
+
+# CHECK: vsri.32 q15, q0, #1
+0x50 0xe4 0xff 0xf3
+
+# CHECK: vtbx.8 d18, {d4, d5, d6}, d7
+0x47 0x2a 0xf4 0xf3
+
diff --git a/test/MC/Disassembler/thumb-tests.txt b/test/MC/Disassembler/thumb-tests.txt
new file mode 100644
index 0000000..e7e6385
--- /dev/null
+++ b/test/MC/Disassembler/thumb-tests.txt
@@ -0,0 +1,81 @@
+# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 | FileCheck %s
+
+# CHECK: add r5, sp, #68
+0x11 0xad
+
+# CHECK: adcs r0, r0, #1
+0x50 0xf1 0x01 0x00
+
+# CHECK: b #34
+0x0f 0xe0
+
+# CHECK: bfi r2, r10, #0, #1
+0x6a 0xf3 0x00 0x02
+
+# CHECK: cbnz r7, #20
+0x57 0xb9
+
+# CHECK: cmp r3, r4
+0xa3 0x42
+
+# CHECK: cmn.w r0, #31
+0x10 0xf1 0x1f 0x0f
+
+# CHECK: ldmia r0!, {r1}
+0x02 0xc8
+
+# CHECK: ldrd r0, r1, [r7, #64]!
+0xf7 0xe9 0x10 0x01
+
+# CHECK: lsls.w r0, pc, #1
+0x5f 0xea 0x4f 0x00
+
+# CHECK: mov r11, r7
+0xbb 0x46
+
+# CHECK: pkhtb r2, r4, r6, asr #16
+0xc4 0xea 0x26 0x42
+
+# CHECK: pop {r2, r4, r6, r8, r10, r12}
+0xbd 0xe8 0x54 0x15
+
+# CHECK: push {r2, r4, r6, r8, r10, r12}
+0x2d 0xe9 0x54 0x15
+
+# CHECK: rsbs r0, r0, #0
+0x40 0x42
+
+# CHECK: strd r0, [r7, #64]
+0xc7 0xe9 0x10 0x01
+
+# CHECK: sub sp, #60
+0x8f 0xb0
+
+# CHECK: subw r0, pc, #1
+0xaf 0xf2 0x01 0x00
+
+# CHECK: uqadd16 r3, r4, r5
+0x94 0xfa 0x55 0xf3
+
+# CHECK: usada8 r5, r4, r3, r2
+0x74 0xfb 0x03 0x25
+
+# CHECK: uxtab16 r1, r2, r3, ror #8
+0x32 0xfa 0x93 0xf1
+
+# IT block begin
+# CHECK: ittte eq
+0x03 0xbf
+
+# CHECK: moveq r3, #3
+0x03 0x23
+
+# CHECK: asreq r1, r0, #5
+0x41 0x11
+
+# CHECK: lsleq r1, r0, #28
+0x01 0x07
+
+# CHECK: rsbne r1, r2, #0
+0x51 0x42
+# IT block end
diff --git a/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll b/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
deleted file mode 100644
index 066e303..0000000
--- a/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
+++ /dev/null
@@ -1,46 +0,0 @@
-; RUN: opt < %s -gvn -enable-full-load-pre -S | FileCheck %s
-
-define i8* @cat(i8* %s1, ...) nounwind {
-entry:
- br i1 undef, label %bb, label %bb3
-
-bb: ; preds = %entry
- unreachable
-
-bb3: ; preds = %entry
- store i8* undef, i8** undef, align 4
- br i1 undef, label %bb5, label %bb6
-
-bb5: ; preds = %bb3
- unreachable
-
-bb6: ; preds = %bb3
- br label %bb12
-
-bb8: ; preds = %bb12
- br i1 undef, label %bb9, label %bb10
-
-bb9: ; preds = %bb8
- %0 = load i8** undef, align 4 ; <i8*> [#uses=0]
- %1 = load i8** undef, align 4 ; <i8*> [#uses=0]
- br label %bb11
-
-bb10: ; preds = %bb8
- br label %bb11
-
-bb11: ; preds = %bb10, %bb9
-; CHECK: bb11:
-; CHECK: phi
-; CHECK-NOT: phi
- br label %bb12
-
-bb12: ; preds = %bb11, %bb6
-; CHECK: bb12:
-; CHECK: phi
-; CHECK-NOT: phi
- br i1 undef, label %bb8, label %bb13
-
-bb13: ; preds = %bb12
-; CHECK: bb13:
- ret i8* undef
-}
diff --git a/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll b/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll
deleted file mode 100644
index 311d3da..0000000
--- a/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll
+++ /dev/null
@@ -1,35 +0,0 @@
-; RUN: opt < %s -indvars -S | grep icmp | count 2
-; RUN: opt < %s -indvars -S | grep sitofp | count 1
-; RUN: opt < %s -indvars -S | grep uitofp | count 1
-
-define void @bar() nounwind {
-entry:
- br label %bb
-
-bb: ; preds = %bb, %entry
- %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
- %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
- %1 = fadd double %x.0.reg2mem.0, 1.0e+0 ; <double> [#uses=2]
- %2 = fcmp olt double %1, 2147483646.0e+0 ; <i1> [#uses=1]
- br i1 %2, label %bb, label %return
-
-return: ; preds = %bb
- ret void
-}
-
-define void @bar1() nounwind {
-entry:
- br label %bb
-
-bb: ; preds = %bb, %entry
- %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
- %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
- %1 = fadd double %x.0.reg2mem.0, 1.0e+0 ; <double> [#uses=2]
- %2 = fcmp olt double %1, 2147483647.0e+0 ; <i1> [#uses=1]
- br i1 %2, label %bb, label %return
-
-return: ; preds = %bb
- ret void
-}
-
-declare i32 @foo(double)
diff --git a/test/Transforms/IndVarSimplify/crash.ll b/test/Transforms/IndVarSimplify/crash.ll
new file mode 100644
index 0000000..14f79fe
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/crash.ll
@@ -0,0 +1,19 @@
+; RUN: opt -indvars %s -disable-output
+
+declare i32 @putchar(i8) nounwind
+
+define void @t2(i1* %P) nounwind {
+; <label>:0
+ br label %1
+
+; <label>:1 ; preds = %1, %0
+ %2 = phi double [ 9.000000e+00, %0 ], [ %4, %1 ] ; <double> [#uses=1]
+ %3 = tail call i32 @putchar(i8 72) ; <i32> [#uses=0]
+ %4 = fadd double %2, -1.000000e+00 ; <double> [#uses=2]
+ %5 = fcmp ult double %4, 0.000000e+00 ; <i1> [#uses=1]
+ store i1 %5, i1* %P
+ br i1 %5, label %6, label %1
+
+; <label>:6 ; preds = %1
+ ret void
+} \ No newline at end of file
diff --git a/test/Transforms/IndVarSimplify/dangling-use.ll b/test/Transforms/IndVarSimplify/dangling-use.ll
new file mode 100644
index 0000000..51c3120
--- /dev/null
+++ b/test/Transforms/IndVarSimplify/dangling-use.ll
@@ -0,0 +1,41 @@
+; RUN: opt -indvars -disable-output < %s
+
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i8:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
+target triple = "powerpc-apple-darwin11"
+
+define void @vec_inverse_5_7_vert_loop_copyseparate(i8* %x, i32 %n, i32 %rowbytes) nounwind {
+entry:
+ %tmp1 = sdiv i32 %n, 3 ; <i32> [#uses=1]
+ %tmp2 = sdiv i32 %rowbytes, 5 ; <i32> [#uses=2]
+ br label %bb49
+
+bb49: ; preds = %bb48, %entry
+ %x_addr.0 = phi i8* [ %x, %entry ], [ %tmp481, %bb48 ] ; <i8*> [#uses=2]
+ br label %bb10
+
+bb10: ; preds = %bb49
+ %tmp326 = mul nsw i32 %tmp1, %tmp2 ; <i32> [#uses=1]
+ %tmp351 = getelementptr inbounds i8* %x_addr.0, i32 %tmp326 ; <i8*> [#uses=1]
+ br i1 false, label %bb.nph, label %bb48
+
+bb.nph: ; preds = %bb10
+ br label %bb23
+
+bb23: ; preds = %bb28, %bb.nph
+ %pOriginHi.01 = phi i8* [ %tmp351, %bb.nph ], [ %pOriginHi.0, %bb28 ] ; <i8*> [#uses=2]
+ %tmp378 = bitcast i8* %pOriginHi.01 to i8* ; <i8*> [#uses=1]
+ store i8* %tmp378, i8** null
+ %tmp385 = getelementptr inbounds i8* %pOriginHi.01, i32 %tmp2 ; <i8*> [#uses=1]
+ br label %bb28
+
+bb28: ; preds = %bb23
+ %pOriginHi.0 = phi i8* [ %tmp385, %bb23 ] ; <i8*> [#uses=1]
+ br i1 false, label %bb23, label %bb28.bb48_crit_edge
+
+bb28.bb48_crit_edge: ; preds = %bb28
+ br label %bb48
+
+bb48: ; preds = %bb28.bb48_crit_edge, %bb10
+ %tmp481 = getelementptr inbounds i8* %x_addr.0, i32 1 ; <i8*> [#uses=1]
+ br label %bb49
+}
diff --git a/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll b/test/Transforms/IndVarSimplify/floating-point-iv.ll
index 7b4032b..8f4b870 100644
--- a/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll
+++ b/test/Transforms/IndVarSimplify/floating-point-iv.ll
@@ -1,5 +1,5 @@
-; RUN: opt < %s -indvars -S | grep icmp | count 4
-define void @bar() nounwind {
+; RUN: opt < %s -indvars -S | FileCheck %s
+define void @test1() nounwind {
entry:
br label %bb
@@ -12,11 +12,13 @@ bb: ; preds = %bb, %entry
return: ; preds = %bb
ret void
+; CHECK: @test1
+; CHECK: icmp
}
declare i32 @foo(double)
-define void @bar2() nounwind {
+define void @test2() nounwind {
entry:
br label %bb
@@ -29,25 +31,29 @@ bb: ; preds = %bb, %entry
return: ; preds = %bb
ret void
+; CHECK: @test2
+; CHECK: icmp
}
-define void @bar3() nounwind {
+define void @test3() nounwind {
entry:
br label %bb
bb: ; preds = %bb, %entry
- %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
- %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
- %1 = fadd double %x.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=2]
- %2 = fcmp olt double %1, -1.000000e+00 ; <i1> [#uses=1]
+ %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]
+ %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind
+ %1 = fadd double %x.0.reg2mem.0, 1.000000e+00
+ %2 = fcmp olt double %1, -1.000000e+00
br i1 %2, label %bb, label %return
-return: ; preds = %bb
+return:
ret void
+; CHECK: @test3
+; CHECK: fcmp
}
-define void @bar4() nounwind {
+define void @test4() nounwind {
entry:
br label %bb
@@ -58,8 +64,29 @@ bb: ; preds = %bb, %entry
%2 = fcmp olt double %1, 1.000000e+00 ; <i1> [#uses=1]
br i1 %2, label %bb, label %return
-return: ; preds = %bb
+return:
ret void
+; CHECK: @test4
+; CHECK: fcmp
}
+; PR6761
+define void @test5() nounwind {
+; <label>:0
+ br label %1
+
+; <label>:1 ; preds = %1, %0
+ %2 = phi double [ 9.000000e+00, %0 ], [ %4, %1 ] ; <double> [#uses=1]
+ %3 = tail call i32 @foo(double 0.0) ; <i32> [#uses=0]
+ %4 = fadd double %2, -1.000000e+00 ; <double> [#uses=2]
+ %5 = fcmp ult double %4, 0.000000e+00 ; <i1> [#uses=1]
+ br i1 %5, label %exit, label %1
+
+exit:
+ ret void
+
+; CHECK: @test5
+; CHECK: icmp eq i32 {{.*}}, 10
+; CHECK-NEXT: br i1
+}
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