diff options
Diffstat (limited to 'test')
75 files changed, 2975 insertions, 40 deletions
diff --git a/test/Analysis/LoopDependenceAnalysis/dg.exp b/test/Analysis/LoopDependenceAnalysis/dg.exp new file mode 100644 index 0000000..f200589 --- /dev/null +++ b/test/Analysis/LoopDependenceAnalysis/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] diff --git a/test/Analysis/LoopDependenceAnalysis/local-array.ll b/test/Analysis/LoopDependenceAnalysis/local-array.ll new file mode 100644 index 0000000..c42e0fa --- /dev/null +++ b/test/Analysis/LoopDependenceAnalysis/local-array.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 2} %t | count 1 +; RUN: grep {0,1: dependent} %t | count 1 + +; x[5] = x[6] // with x being an array on the stack + +define void @foo(...) nounwind { +entry: + %xptr = alloca [256 x i32], align 4 + %x.ld.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 6 + %x.st.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 5 + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %x = load i32* %x.ld.addr + store i32 %x, i32* %x.st.addr + %i.next = add i64 %i, 1 + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/Analysis/LoopDependenceAnalysis/no-array.ll b/test/Analysis/LoopDependenceAnalysis/no-array.ll new file mode 100644 index 0000000..03b9f4d --- /dev/null +++ b/test/Analysis/LoopDependenceAnalysis/no-array.ll @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 2} %t | count 1 +; RUN: grep {0,1: dependent} %t | count 1 + +; x[5] = x[6] // with x being a pointer passed as argument + +define void @foo(i32* nocapture %xptr) nounwind { +entry: + %x.ld.addr = getelementptr i32* %xptr, i64 6 + %x.st.addr = getelementptr i32* %xptr, i64 5 + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %x = load i32* %x.ld.addr + store i32 %x, i32* %x.st.addr + %i.next = add i64 %i, 1 + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll b/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll new file mode 100644 index 0000000..c416ff3 --- /dev/null +++ b/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll @@ -0,0 +1,30 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 3} %t | count 1 +; RUN: grep {0,2: dependent} %t | count 1 +; RUN: grep {1,2: independent} %t | count 1 + +; for (i = 0; i < 256; i++) +; x[i] = x[i] + y[i] + +@x = common global [256 x i32] zeroinitializer, align 4 +@y = common global [256 x i32] zeroinitializer, align 4 + +define void @foo(...) nounwind { +entry: + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %y.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i + %x.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i + %x = load i32* %x.addr + %y = load i32* %y.addr + %r = add i32 %y, %x + store i32 %r, i32* %x.addr + %i.next = add i64 %i, 1 + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll b/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll new file mode 100644 index 0000000..7295863 --- /dev/null +++ b/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 3} %t | count 1 +; RUN: grep {0,2: dependent} %t | count 1 +; RUN: grep {1,2: independent} %t | count 1 + +; for (i = 0; i < 256; i++) +; x[i+1] = x[i] + y[i] + +@x = common global [256 x i32] zeroinitializer, align 4 +@y = common global [256 x i32] zeroinitializer, align 4 + +define void @foo(...) nounwind { +entry: + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i + %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i + %i.next = add i64 %i, 1 + %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.next + %x = load i32* %x.ld.addr + %y = load i32* %y.ld.addr + %r = add i32 %y, %x + store i32 %r, i32* %x.st.addr + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/Analysis/LoopDependenceAnalysis/ziv1.ll b/test/Analysis/LoopDependenceAnalysis/ziv1.ll new file mode 100644 index 0000000..e42c0a0 --- /dev/null +++ b/test/Analysis/LoopDependenceAnalysis/ziv1.ll @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 2} %t | count 1 +; RUN: grep {0,1: dependent} %t | count 1 + +; x[5] = x[6] + +@x = common global [256 x i32] zeroinitializer, align 4 + +define void @foo(...) nounwind { +entry: + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %x = load i32* getelementptr ([256 x i32]* @x, i32 0, i64 6) + store i32 %x, i32* getelementptr ([256 x i32]* @x, i32 0, i64 5) + %i.next = add i64 %i, 1 + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/Analysis/LoopDependenceAnalysis/ziv2.ll b/test/Analysis/LoopDependenceAnalysis/ziv2.ll new file mode 100644 index 0000000..cecf3a7 --- /dev/null +++ b/test/Analysis/LoopDependenceAnalysis/ziv2.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 2} %t | count 1 +; RUN: grep {0,1: dependent} %t | count 1 + +; x[c] = x[c+1] // with c being a loop-invariant constant + +@x = common global [256 x i32] zeroinitializer, align 4 + +define void @foo(i64 %c0) nounwind { +entry: + %c1 = add i64 %c0, 1 + %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %c0 + %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %c1 + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %x = load i32* %x.ld.addr + store i32 %x, i32* %x.st.addr + %i.next = add i64 %i, 1 + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll new file mode 100644 index 0000000..27cad7c --- /dev/null +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll @@ -0,0 +1,122 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + +@nn = external global i32 ; <i32*> [#uses=1] +@al_len = external global i32 ; <i32*> [#uses=2] +@no_mat = external global i32 ; <i32*> [#uses=2] +@no_mis = external global i32 ; <i32*> [#uses=2] +@"\01LC12" = external constant [29 x i8], align 1 ; <[29 x i8]*> [#uses=1] +@"\01LC16" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] +@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1] + +declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind + +declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + %0 = load i32* undef, align 4 ; <i32> [#uses=2] + %1 = add i32 %0, 1 ; <i32> [#uses=2] + store i32 %1, i32* undef, align 4 + %2 = load i32* undef, align 4 ; <i32> [#uses=1] + store i32 %2, i32* @nn, align 4 + store i32 0, i32* @al_len, align 4 + store i32 0, i32* @no_mat, align 4 + store i32 0, i32* @no_mis, align 4 + %3 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1] + tail call arm_apcscc void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind + %4 = sitofp i32 undef to double ; <double> [#uses=1] + %5 = fdiv double %4, 1.000000e+01 ; <double> [#uses=1] + %6 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; <i32> [#uses=0] + %7 = load i32* @al_len, align 4 ; <i32> [#uses=1] + %8 = load i32* @no_mat, align 4 ; <i32> [#uses=1] + %9 = load i32* @no_mis, align 4 ; <i32> [#uses=1] + %10 = sub i32 %7, %8 ; <i32> [#uses=1] + %11 = sub i32 %10, %9 ; <i32> [#uses=1] + %12 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; <i32> [#uses=0] + %13 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; <i32> [#uses=0] + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + br i1 undef, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + br i1 undef, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + br i1 undef, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll new file mode 100644 index 0000000..3a14d67 --- /dev/null +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll @@ -0,0 +1,116 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + +@no_mat = external global i32 ; <i32*> [#uses=1] +@no_mis = external global i32 ; <i32*> [#uses=2] +@"\01LC11" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] +@"\01LC15" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] +@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1] + +declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind + +declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + %0 = load i32* undef, align 4 ; <i32> [#uses=3] + %1 = add i32 %0, 1 ; <i32> [#uses=2] + store i32 %1, i32* undef, align 4 + %2 = load i32* undef, align 4 ; <i32> [#uses=2] + %3 = sub i32 %2, %0 ; <i32> [#uses=1] + store i32 0, i32* @no_mat, align 4 + store i32 0, i32* @no_mis, align 4 + %4 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1] + tail call arm_apcscc void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind + %5 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; <i32> [#uses=0] + %6 = load i32* @no_mis, align 4 ; <i32> [#uses=1] + %7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; <i32> [#uses=0] + %8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; <i32> [#uses=0] + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + br i1 undef, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + br i1 undef, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + br i1 undef, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + %indvar11 = phi i32 [ 0, %bb8 ], [ %tmp13, %bb11 ] ; <i32> [#uses=2] + %tmp13 = add i32 %indvar11, 1 ; <i32> [#uses=2] + %count.0 = sub i32 undef, %indvar11 ; <i32> [#uses=0] + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll new file mode 100644 index 0000000..f94b59d --- /dev/null +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll @@ -0,0 +1,128 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + +@JJ = external global i32* ; <i32**> [#uses=1] + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + %0 = load i32** @JJ, align 4 ; <i32*> [#uses=1] + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + %cflag.0.i = phi i16 [ 0, %bb228.i ], [ 0, %bb74.i ], [ 1, %bb138.i ] ; <i16> [#uses=1] + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + %.not297 = icmp ne i16 %cflag.0.i, 0 ; <i1> [#uses=1] + %or.cond298 = and i1 undef, %.not297 ; <i1> [#uses=1] + br i1 %or.cond298, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; <i32> [#uses=1] + %cflag.418.i = phi i16 [ 0, %bb.nph.i98 ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=1] + %pj.317.i = phi i32 [ undef, %bb.nph.i98 ], [ %8, %bb218.i ] ; <i32> [#uses=1] + %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %7, %bb218.i ] ; <i32> [#uses=1] + %fj.515.i = phi i32 [ undef, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; <i32> [#uses=3] + %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; <i32> [#uses=2] + %i.121.i = sub i32 undef, undef ; <i32> [#uses=3] + %tmp105.i = sub i32 undef, undef ; <i32> [#uses=1] + %1 = sub i32 %c.1020.i, undef ; <i32> [#uses=0] + br i1 undef, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + %2 = icmp slt i32 %fj.515.i, undef ; <i1> [#uses=1] + %3 = and i1 %2, undef ; <i1> [#uses=1] + br i1 %3, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + %fi.5.i = phi i32 [ undef, %bb167.i ], [ %ci.910.i, %bb158.i ], [ undef, %bb160.i ], [ %ci.910.i, %bb161.i ], [ undef, %bb163.i ] ; <i32> [#uses=1] + %fj.4.i = phi i32 [ undef, %bb167.i ], [ undef, %bb158.i ], [ %fj.515.i, %bb160.i ], [ undef, %bb161.i ], [ %fj.515.i, %bb163.i ] ; <i32> [#uses=2] + %scevgep88.i = getelementptr i32* null, i32 %i.121.i ; <i32*> [#uses=3] + %4 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=2] + %scevgep89.i = getelementptr i32* %0, i32 %i.121.i ; <i32*> [#uses=3] + %5 = load i32* %scevgep89.i, align 4 ; <i32> [#uses=1] + %ci.10.i = select i1 undef, i32 %pi.316.i, i32 %i.121.i ; <i32> [#uses=0] + %cj.9.i = select i1 undef, i32 %pj.317.i, i32 undef ; <i32> [#uses=0] + %6 = icmp slt i32 undef, 0 ; <i1> [#uses=3] + %ci.12.i = select i1 %6, i32 %fi.5.i, i32 %4 ; <i32> [#uses=2] + %cj.11.i100 = select i1 %6, i32 %fj.4.i, i32 %5 ; <i32> [#uses=1] + %c.14.i = select i1 %6, i32 0, i32 undef ; <i32> [#uses=2] + store i32 %c.14.i, i32* undef, align 4 + %7 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=1] + %8 = load i32* %scevgep89.i, align 4 ; <i32> [#uses=1] + store i32 %ci.12.i, i32* %scevgep88.i, align 4 + store i32 %cj.11.i100, i32* %scevgep89.i, align 4 + store i32 %4, i32* undef, align 4 + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + %cflag.3.i = phi i16 [ %cflag.418.i, %bb168.i ], [ 1, %bb211.i ] ; <i16> [#uses=2] + %9 = icmp slt i32 %tmp105.i, undef ; <i1> [#uses=1] + br i1 %9, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + %cflag.4.lcssa.i = phi i16 [ 0, %bb153.i ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=0] + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll new file mode 100644 index 0000000..bca7f79 --- /dev/null +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll @@ -0,0 +1,128 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + +@r = external global i32 ; <i32*> [#uses=1] +@qr = external global i32 ; <i32*> [#uses=1] +@II = external global i32* ; <i32**> [#uses=1] +@no_mis = external global i32 ; <i32*> [#uses=1] +@name1 = external global i8* ; <i8**> [#uses=1] + +declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + %0 = load i8** @name1, align 4 ; <i8*> [#uses=0] + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + store i32 0, i32* @no_mis, align 4 + %1 = getelementptr i8* %A, i32 0 ; <i8*> [#uses=1] + %2 = getelementptr i8* %B, i32 0 ; <i8*> [#uses=1] + tail call arm_apcscc void @diff(i8* %1, i8* %2, i32 undef, i32 undef, i32 undef, i32 undef) nounwind + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + %3 = load i32** @II, align 4 ; <i32*> [#uses=1] + %4 = load i32* @r, align 4 ; <i32> [#uses=1] + %5 = load i32* @qr, align 4 ; <i32> [#uses=1] + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + br i1 undef, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + %6 = add i32 undef, -1 ; <i32> [#uses=3] + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; <i32> [#uses=1] + %f.419.i = phi i32 [ undef, %bb.nph.i98 ], [ %f.5.i, %bb218.i ] ; <i32> [#uses=1] + %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %10, %bb218.i ] ; <i32> [#uses=1] + %fj.515.i = phi i32 [ %6, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; <i32> [#uses=2] + %fi.614.i = phi i32 [ undef, %bb.nph.i98 ], [ %fi.5.i, %bb218.i ] ; <i32> [#uses=3] + %cj.811.i = phi i32 [ %6, %bb.nph.i98 ], [ %cj.11.i100, %bb218.i ] ; <i32> [#uses=3] + %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; <i32> [#uses=2] + %7 = sub i32 %f.419.i, %4 ; <i32> [#uses=5] + %8 = sub i32 %c.1020.i, %5 ; <i32> [#uses=2] + %9 = icmp slt i32 %7, %8 ; <i1> [#uses=1] + br i1 %9, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + %fi.5.i = phi i32 [ %fi.614.i, %bb167.i ], [ %ci.910.i, %bb158.i ], [ %fi.614.i, %bb160.i ], [ %ci.910.i, %bb161.i ], [ %fi.614.i, %bb163.i ] ; <i32> [#uses=2] + %fj.4.i = phi i32 [ %cj.811.i, %bb167.i ], [ %cj.811.i, %bb158.i ], [ %fj.515.i, %bb160.i ], [ %cj.811.i, %bb161.i ], [ %fj.515.i, %bb163.i ] ; <i32> [#uses=2] + %f.5.i = phi i32 [ %7, %bb167.i ], [ %8, %bb158.i ], [ %7, %bb160.i ], [ %7, %bb161.i ], [ %7, %bb163.i ] ; <i32> [#uses=2] + %scevgep88.i = getelementptr i32* %3, i32 undef ; <i32*> [#uses=1] + %ci.10.i = select i1 undef, i32 %pi.316.i, i32 undef ; <i32> [#uses=0] + %ci.12.i = select i1 undef, i32 %fi.5.i, i32 undef ; <i32> [#uses=1] + %cj.11.i100 = select i1 undef, i32 %fj.4.i, i32 undef ; <i32> [#uses=1] + %c.14.i = select i1 undef, i32 %f.5.i, i32 undef ; <i32> [#uses=1] + %10 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=1] + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + br i1 undef, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + %11 = getelementptr i32* null, i32 %6 ; <i32*> [#uses=1] + store i32 undef, i32* %11, align 4 + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll new file mode 100644 index 0000000..0c90592 --- /dev/null +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll @@ -0,0 +1,99 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + +@XX = external global i32* ; <i32**> [#uses=1] + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + %0 = load i32** @XX, align 4 ; <i32*> [#uses=0] + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + br i1 undef, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + %1 = sub i32 undef, undef ; <i32> [#uses=4] + %2 = sub i32 undef, undef ; <i32> [#uses=1] + br i1 undef, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + %f.5.i = phi i32 [ %1, %bb167.i ], [ %2, %bb158.i ], [ %1, %bb160.i ], [ %1, %bb161.i ], [ %1, %bb163.i ] ; <i32> [#uses=1] + %c.14.i = select i1 undef, i32 %f.5.i, i32 undef ; <i32> [#uses=1] + store i32 %c.14.i, i32* undef, align 4 + store i32 undef, i32* null, align 4 + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + br i1 undef, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} diff --git a/test/CodeGen/ARM/2009-07-01-CommuteBug.ll b/test/CodeGen/ARM/2009-07-01-CommuteBug.ll new file mode 100644 index 0000000..dfccefc --- /dev/null +++ b/test/CodeGen/ARM/2009-07-01-CommuteBug.ll @@ -0,0 +1,130 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + +@qr = external global i32 ; <i32*> [#uses=1] +@II = external global i32* ; <i32**> [#uses=1] +@JJ = external global i32* ; <i32**> [#uses=1] + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + %0 = load i32** @II, align 4 ; <i32*> [#uses=1] + %1 = load i32** @JJ, align 4 ; <i32*> [#uses=1] + %2 = load i32* @qr, align 4 ; <i32> [#uses=1] + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + %cflag.0.i = phi i16 [ %cflag.1.i, %bb228.i ], [ %cflag.1.i, %bb74.i ], [ 1, %bb138.i ] ; <i16> [#uses=2] + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + %.not297 = icmp ne i16 %cflag.0.i, 0 ; <i1> [#uses=1] + %or.cond298 = and i1 undef, %.not297 ; <i1> [#uses=1] + br i1 %or.cond298, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; <i32> [#uses=1] + %f.419.i = phi i32 [ undef, %bb.nph.i98 ], [ %f.5.i, %bb218.i ] ; <i32> [#uses=1] + %cflag.418.i = phi i16 [ 0, %bb.nph.i98 ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=1] + %pj.317.i = phi i32 [ undef, %bb.nph.i98 ], [ %7, %bb218.i ] ; <i32> [#uses=1] + %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %6, %bb218.i ] ; <i32> [#uses=1] + %fj.515.i = phi i32 [ undef, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; <i32> [#uses=2] + %fi.614.i = phi i32 [ undef, %bb.nph.i98 ], [ %fi.5.i, %bb218.i ] ; <i32> [#uses=3] + %cj.811.i = phi i32 [ undef, %bb.nph.i98 ], [ %cj.11.i100, %bb218.i ] ; <i32> [#uses=3] + %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; <i32> [#uses=2] + %3 = sub i32 %f.419.i, 0 ; <i32> [#uses=5] + %4 = sub i32 %c.1020.i, %2 ; <i32> [#uses=2] + %5 = icmp slt i32 %3, %4 ; <i1> [#uses=1] + br i1 %5, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + %fi.5.i = phi i32 [ %fi.614.i, %bb167.i ], [ %ci.910.i, %bb158.i ], [ %fi.614.i, %bb160.i ], [ %ci.910.i, %bb161.i ], [ %fi.614.i, %bb163.i ] ; <i32> [#uses=2] + %fj.4.i = phi i32 [ %cj.811.i, %bb167.i ], [ %cj.811.i, %bb158.i ], [ %fj.515.i, %bb160.i ], [ %cj.811.i, %bb161.i ], [ %fj.515.i, %bb163.i ] ; <i32> [#uses=2] + %f.5.i = phi i32 [ %3, %bb167.i ], [ %4, %bb158.i ], [ %3, %bb160.i ], [ %3, %bb161.i ], [ %3, %bb163.i ] ; <i32> [#uses=2] + %scevgep88.i = getelementptr i32* %0, i32 undef ; <i32*> [#uses=2] + %scevgep89.i = getelementptr i32* %1, i32 undef ; <i32*> [#uses=2] + %ci.10.i = select i1 undef, i32 %pi.316.i, i32 undef ; <i32> [#uses=0] + %cj.9.i = select i1 undef, i32 %pj.317.i, i32 undef ; <i32> [#uses=0] + %ci.12.i = select i1 undef, i32 %fi.5.i, i32 undef ; <i32> [#uses=2] + %cj.11.i100 = select i1 undef, i32 %fj.4.i, i32 undef ; <i32> [#uses=2] + %c.14.i = select i1 undef, i32 %f.5.i, i32 undef ; <i32> [#uses=1] + %6 = load i32* %scevgep88.i, align 4 ; <i32> [#uses=1] + %7 = load i32* %scevgep89.i, align 4 ; <i32> [#uses=1] + store i32 %ci.12.i, i32* %scevgep88.i, align 4 + store i32 %cj.11.i100, i32* %scevgep89.i, align 4 + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + %cflag.3.i = phi i16 [ %cflag.418.i, %bb168.i ], [ 1, %bb211.i ] ; <i16> [#uses=2] + %8 = icmp slt i32 undef, undef ; <i1> [#uses=1] + br i1 %8, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + %cflag.4.lcssa.i = phi i16 [ 0, %bb153.i ], [ %cflag.3.i, %bb218.i ] ; <i16> [#uses=2] + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + %cflag.1.i = phi i16 [ 0, %bb146.i ], [ %cflag.0.i, %bb151.i ], [ %cflag.4.lcssa.i, %bb220.i ], [ 1, %bb12 ], [ %cflag.4.lcssa.i, %bb221.i ] ; <i16> [#uses=2] + br i1 false, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 false, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} diff --git a/test/CodeGen/ARM/ldr.ll b/test/CodeGen/ARM/ldr.ll index 23c0b99..ea99655 100644 --- a/test/CodeGen/ARM/ldr.ll +++ b/test/CodeGen/ARM/ldr.ll @@ -1,23 +1,59 @@ -; RUN: llvm-as < %s | llc -march=arm | \ -; RUN: grep {ldr r0} | count 3 +; RUN: llvm-as < %s | llc -march=arm | grep {ldr r0} | count 7 +; RUN: llvm-as < %s | llc -march=arm | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=arm | not grep mvn +; RUN: llvm-as < %s | llc -march=arm | grep ldr | grep lsl +; RUN: llvm-as < %s | llc -march=arm | grep ldr | grep lsr define i32 @f1(i32* %v) { entry: - %tmp = load i32* %v ; <i32> [#uses=1] + %tmp = load i32* %v ret i32 %tmp } define i32 @f2(i32* %v) { entry: - %tmp2 = getelementptr i32* %v, i32 1023 ; <i32*> [#uses=1] - %tmp = load i32* %tmp2 ; <i32> [#uses=1] + %tmp2 = getelementptr i32* %v, i32 1023 + %tmp = load i32* %tmp2 ret i32 %tmp } define i32 @f3(i32* %v) { entry: - %tmp2 = getelementptr i32* %v, i32 1024 ; <i32*> [#uses=1] - %tmp = load i32* %tmp2 ; <i32> [#uses=1] + %tmp2 = getelementptr i32* %v, i32 1024 + %tmp = load i32* %tmp2 ret i32 %tmp } +define i32 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} + +define i32 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} diff --git a/test/CodeGen/ARM/sxt_rot.ll b/test/CodeGen/ARM/sxt_rot.ll index bfecce8..e9f302c 100644 --- a/test/CodeGen/ARM/sxt_rot.ll +++ b/test/CodeGen/ARM/sxt_rot.ll @@ -1,8 +1,15 @@ ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \ -; RUN: grep sxtb | count 1 +; RUN: grep sxtb | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \ +; RUN: grep sxtb | grep ror | count 1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \ ; RUN: grep sxtab | count 1 +define i32 @test0(i8 %A) { + %B = sext i8 %A to i32 + ret i32 %B +} + define i8 @test1(i32 %A) signext { %B = lshr i32 %A, 8 %C = shl i32 %A, 24 diff --git a/test/CodeGen/PowerPC/available-externally.ll b/test/CodeGen/PowerPC/available-externally.ll new file mode 100644 index 0000000..cfad6ea --- /dev/null +++ b/test/CodeGen/PowerPC/available-externally.ll @@ -0,0 +1,69 @@ +; RUN: llvm-as < %s | llc | grep {bl L_exact_log2.stub} +; PR4482 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "powerpc-apple-darwin8" + +define i32 @foo(i64 %x) nounwind { +entry: + %x_addr = alloca i64 ; <i64*> [#uses=2] + %retval = alloca i32 ; <i32*> [#uses=2] + %0 = alloca i32 ; <i32*> [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i64 %x, i64* %x_addr + %1 = load i64* %x_addr, align 8 ; <i64> [#uses=1] + %2 = call i32 @exact_log2(i64 %1) nounwind ; <i32> [#uses=1] + store i32 %2, i32* %0, align 4 + %3 = load i32* %0, align 4 ; <i32> [#uses=1] + store i32 %3, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval1 +} + +define available_externally i32 @exact_log2(i64 %x) nounwind { +entry: + %x_addr = alloca i64 ; <i64*> [#uses=6] + %retval = alloca i32 ; <i32*> [#uses=2] + %iftmp.0 = alloca i32 ; <i32*> [#uses=3] + %0 = alloca i32 ; <i32*> [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + store i64 %x, i64* %x_addr + %1 = load i64* %x_addr, align 8 ; <i64> [#uses=1] + %2 = sub i64 0, %1 ; <i64> [#uses=1] + %3 = load i64* %x_addr, align 8 ; <i64> [#uses=1] + %4 = and i64 %2, %3 ; <i64> [#uses=1] + %5 = load i64* %x_addr, align 8 ; <i64> [#uses=1] + %6 = icmp ne i64 %4, %5 ; <i1> [#uses=1] + br i1 %6, label %bb2, label %bb + +bb: ; preds = %entry + %7 = load i64* %x_addr, align 8 ; <i64> [#uses=1] + %8 = icmp eq i64 %7, 0 ; <i1> [#uses=1] + br i1 %8, label %bb2, label %bb1 + +bb1: ; preds = %bb + %9 = load i64* %x_addr, align 8 ; <i64> [#uses=1] + %10 = call i64 @llvm.cttz.i64(i64 %9) ; <i64> [#uses=1] + %11 = trunc i64 %10 to i32 ; <i32> [#uses=1] + store i32 %11, i32* %iftmp.0, align 4 + br label %bb3 + +bb2: ; preds = %bb, %entry + store i32 -1, i32* %iftmp.0, align 4 + br label %bb3 + +bb3: ; preds = %bb2, %bb1 + %12 = load i32* %iftmp.0, align 4 ; <i32> [#uses=1] + store i32 %12, i32* %0, align 4 + %13 = load i32* %0, align 4 ; <i32> [#uses=1] + store i32 %13, i32* %retval, align 4 + br label %return + +return: ; preds = %bb3 + %retval4 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval4 +} + +declare i64 @llvm.cttz.i64(i64) nounwind readnone diff --git a/test/CodeGen/Thumb2/load-global.ll b/test/CodeGen/Thumb2/load-global.ll index 0ffcb95..1b1fe7b 100644 --- a/test/CodeGen/Thumb2/load-global.ll +++ b/test/CodeGen/Thumb2/load-global.ll @@ -1,5 +1,15 @@ -; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | grep add | grep pc +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=static | \ +; RUN: not grep {L_G\$non_lazy_ptr} +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | \ +; RUN: grep {L_G\$non_lazy_ptr} | count 2 +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | \ +; RUN: grep {ldr.*pc} | count 1 +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | \ +; RUN: grep {GOT} | count 1 @G = external global i32 diff --git a/test/CodeGen/Thumb2/thumb2-adc.ll b/test/CodeGen/Thumb2/thumb2-adc.ll index 4424c1a..c1565b3 100644 --- a/test/CodeGen/Thumb2/thumb2-adc.ll +++ b/test/CodeGen/Thumb2/thumb2-adc.ll @@ -1,32 +1,32 @@ ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adc\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5 -; 734439407617 = 0x000000ab00000001 +; 734439407618 = 0x000000ab00000002 define i64 @f1(i64 %a) { - %tmp = add i64 %a, 734439407617 + %tmp = add i64 %a, 734439407618 ret i64 %tmp } -; 5066626890203137 = 0x0012001200000001 +; 5066626890203138 = 0x0012001200000002 define i64 @f2(i64 %a) { - %tmp = add i64 %a, 5066626890203137 + %tmp = add i64 %a, 5066626890203138 ret i64 %tmp } -; 3747052064576897025 = 0x3400340000000001 +; 3747052064576897026 = 0x3400340000000002 define i64 @f3(i64 %a) { - %tmp = add i64 %a, 3747052064576897025 + %tmp = add i64 %a, 3747052064576897026 ret i64 %tmp } -; 6221254862626095105 = 0x5656565600000001 +; 6221254862626095106 = 0x5656565600000002 define i64 @f4(i64 %a) { - %tmp = add i64 %a, 6221254862626095105 + %tmp = add i64 %a, 6221254862626095106 ret i64 %tmp } -; 287104476244869121 = 0x03fc000000000001 +; 287104476244869122 = 0x03fc000000000002 define i64 @f5(i64 %a) { - %tmp = add i64 %a, 287104476244869121 + %tmp = add i64 %a, 287104476244869122 ret i64 %tmp } diff --git a/test/CodeGen/Thumb2/thumb2-add2.ll b/test/CodeGen/Thumb2/thumb2-add2.ll index f94b3c1..be89508 100644 --- a/test/CodeGen/Thumb2/thumb2-add2.ll +++ b/test/CodeGen/Thumb2/thumb2-add2.ll @@ -29,8 +29,3 @@ define i32 @f5(i32 %a) { %tmp = add i32 %a, 510 ret i32 %tmp } - -define i32 @f6(i32 %a) { - %tmp = add i32 %a, 4095 - ret i32 %tmp -} diff --git a/test/CodeGen/Thumb2/thumb2-add5.ll b/test/CodeGen/Thumb2/thumb2-add5.ll index 5870be2..2245214 100644 --- a/test/CodeGen/Thumb2/thumb2-add5.ll +++ b/test/CodeGen/Thumb2/thumb2-add5.ll @@ -1,6 +1,36 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = add i32 %a, %b ret i32 %tmp } + +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-and.ll b/test/CodeGen/Thumb2/thumb2-and.ll index 360c977..ab191d5 100644 --- a/test/CodeGen/Thumb2/thumb2-and.ll +++ b/test/CodeGen/Thumb2/thumb2-and.ll @@ -1,6 +1,36 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = and i32 %a, %b ret i32 %tmp } + +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-bic.ll b/test/CodeGen/Thumb2/thumb2-bic.ll index ac15ad6..f5a3d20 100644 --- a/test/CodeGen/Thumb2/thumb2-bic.ll +++ b/test/CodeGen/Thumb2/thumb2-bic.ll @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = xor i32 %b, 4294967295 @@ -23,3 +27,33 @@ define i32 @f4(i32 %a, i32 %b) { %tmp1 = and i32 %tmp, %a ret i32 %tmp1 } + +define i32 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = and i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 %tmp, 4294967295 + %tmp2 = and i32 %tmp1, %a + ret i32 %tmp2 +} + +define i32 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 %tmp, 4294967295 + %tmp2 = and i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = and i32 %tmp1, %a + ret i32 %tmp2 +} diff --git a/test/CodeGen/Thumb2/thumb2-cmn.ll b/test/CodeGen/Thumb2/thumb2-cmn.ll new file mode 100644 index 0000000..ffe8b98 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-cmn.ll @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 + +define i1 @f1(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp ne i32 %a, %nb + ret i1 %tmp +} + +define i1 @f2(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp ne i32 %nb, %a + ret i1 %tmp +} + +define i1 @f3(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp eq i32 %a, %nb + ret i1 %tmp +} + +define i1 @f4(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp eq i32 %nb, %a + ret i1 %tmp +} + +define i1 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %nb = sub i32 0, %tmp + %tmp1 = icmp eq i32 %nb, %a + ret i1 %tmp1 +} + +define i1 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %nb = sub i32 0, %tmp + %tmp1 = icmp ne i32 %nb, %a + ret i1 %tmp1 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %nb = sub i32 0, %tmp + %tmp1 = icmp eq i32 %a, %nb + ret i1 %tmp1 +} + +define i1 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %nb = sub i32 0, %tmp + %tmp1 = icmp ne i32 %a, %nb + ret i1 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-cmp.ll b/test/CodeGen/Thumb2/thumb2-cmp.ll index cd2442b..63f20cd 100644 --- a/test/CodeGen/Thumb2/thumb2-cmp.ll +++ b/test/CodeGen/Thumb2/thumb2-cmp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "cmp " | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*#\[0-9\]*$} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5 ; 0x000000bb = 187 define i1 @f1(i32 %a) { diff --git a/test/CodeGen/Thumb2/thumb2-cmp2.ll b/test/CodeGen/Thumb2/thumb2-cmp2.ll index 8c60b46..368a3b3 100644 --- a/test/CodeGen/Thumb2/thumb2-cmp2.ll +++ b/test/CodeGen/Thumb2/thumb2-cmp2.ll @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\]} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i1 @f1(i32 %a, i32 %b) { %tmp = icmp ne i32 %a, %b @@ -9,3 +13,29 @@ define i1 @f2(i32 %a, i32 %b) { %tmp = icmp eq i32 %a, %b ret i1 %tmp } + +define i1 @f6(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = icmp eq i32 %tmp, %a + ret i1 %tmp1 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = icmp ne i32 %tmp, %a + ret i1 %tmp1 +} + +define i1 @f8(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = icmp eq i32 %a, %tmp + ret i1 %tmp1 +} + +define i1 @f9(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = icmp ne i32 %a, %tmp + ret i1 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-eor.ll b/test/CodeGen/Thumb2/thumb2-eor.ll index ec98f64..56bb46a 100644 --- a/test/CodeGen/Thumb2/thumb2-eor.ll +++ b/test/CodeGen/Thumb2/thumb2-eor.ll @@ -1,6 +1,41 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = xor i32 %a, %b ret i32 %tmp } + +define i32 @f2(i32 %a, i32 %b) { + %tmp = xor i32 %b, %a + ret i32 %tmp +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 %tmp, %a + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f6(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 %tmp, %a + ret i32 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-jumptbl.ll b/test/CodeGen/Thumb2/thumb2-jumptbl.ll new file mode 100644 index 0000000..512c669 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-jumptbl.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr\\W*pc,} | count 1 + +define i32 @foo(i32 %a) nounwind { +entry: + switch i32 %a, label %bb4 [ + i32 1, label %bb5 + i32 2, label %bb1 + i32 3, label %bb2 + i32 5, label %bb3 + ] + +bb1: ; preds = %entry + ret i32 1 + +bb2: ; preds = %entry + ret i32 1234 + +bb3: ; preds = %entry + ret i32 3456 + +bb4: ; preds = %entry + ret i32 0 + +bb5: ; preds = %entry + ret i32 12 +} diff --git a/test/CodeGen/Thumb2/thumb2-ldr.ll b/test/CodeGen/Thumb2/thumb2-ldr.ll new file mode 100644 index 0000000..19c7584 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-ldr.ll @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr r0} | count 7 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldr | grep lsl +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldr + +define i32 @f1(i32* %v) { +entry: + %tmp = load i32* %v + ret i32 %tmp +} + +define i32 @f2(i32* %v) { +entry: + %tmp2 = getelementptr i32* %v, i32 1023 + %tmp = load i32* %tmp2 + ret i32 %tmp +} + +define i32 @f3(i32* %v) { +entry: + %tmp2 = getelementptr i32* %v, i32 1024 + %tmp = load i32* %tmp2 + ret i32 %tmp +} + +define i32 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} + +define i32 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} diff --git a/test/CodeGen/Thumb2/thumb2-ldr_ext.ll b/test/CodeGen/Thumb2/thumb2-ldr_ext.ll new file mode 100644 index 0000000..d48ecef --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-ldr_ext.ll @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrb | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrh | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrsb | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrsh | count 1 + +define i32 @test1(i8* %v.pntr.s0.u1) { + %tmp.u = load i8* %v.pntr.s0.u1 + %tmp1.s = zext i8 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test2(i16* %v.pntr.s0.u1) { + %tmp.u = load i16* %v.pntr.s0.u1 + %tmp1.s = zext i16 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test3(i8* %v.pntr.s1.u0) { + %tmp.s = load i8* %v.pntr.s1.u0 + %tmp1.s = sext i8 %tmp.s to i32 + ret i32 %tmp1.s +} + +define i32 @test4() { + %tmp.s = load i16* null + %tmp1.s = sext i16 %tmp.s to i32 + ret i32 %tmp1.s +} diff --git a/test/CodeGen/Thumb2/thumb2-ldr_post.ll b/test/CodeGen/Thumb2/thumb2-ldr_post.ll new file mode 100644 index 0000000..79ffa82 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-ldr_post.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep {ldr.*\\\[.*\],} | count 1 + +define i32 @test(i32 %a, i32 %b, i32 %c) { + %tmp1 = mul i32 %a, %b ; <i32> [#uses=2] + %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1] + %tmp3 = load i32* %tmp2 ; <i32> [#uses=1] + %tmp4 = sub i32 %tmp1, 8 ; <i32> [#uses=1] + %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1] + ret i32 %tmp5 +} + diff --git a/test/CodeGen/Thumb2/thumb2-ldr_pre.ll b/test/CodeGen/Thumb2/thumb2-ldr_pre.ll new file mode 100644 index 0000000..f773e63 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-ldr_pre.ll @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep {ldr.*\\!} | count 3 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep {ldrsb.*\\!} | count 1 + +define i32* @test1(i32* %X, i32* %dest) { + %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2] + %A = load i32* %Y ; <i32> [#uses=1] + store i32 %A, i32* %dest + ret i32* %Y +} + +define i32 @test2(i32 %a, i32 %b) { + %tmp1 = sub i32 %a, 64 ; <i32> [#uses=2] + %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1] + %tmp3 = load i32* %tmp2 ; <i32> [#uses=1] + %tmp4 = sub i32 %tmp1, %b ; <i32> [#uses=1] + %tmp5 = add i32 %tmp4, %tmp3 ; <i32> [#uses=1] + ret i32 %tmp5 +} + +define i8* @test3(i8* %X, i32* %dest) { + %tmp1 = getelementptr i8* %X, i32 4 + %tmp2 = load i8* %tmp1 + %tmp3 = sext i8 %tmp2 to i32 + store i32 %tmp3, i32* %dest + ret i8* %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-ldrb.ll b/test/CodeGen/Thumb2/thumb2-ldrb.ll new file mode 100644 index 0000000..5bacb8e --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-ldrb.ll @@ -0,0 +1,60 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrb r0} | count 7 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrb | grep lsl +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldrb + +define i8 @f1(i8* %v) { +entry: + %tmp = load i8* %v + ret i8 %tmp +} + +define i8 @f2(i8* %v) { +entry: + %tmp2 = getelementptr i8* %v, i8 1023 + %tmp = load i8* %tmp2 + ret i8 %tmp +} + +define i8 @f3(i32 %base) { +entry: + %tmp1 = add i32 %base, 4096 + %tmp2 = inttoptr i32 %tmp1 to i8* + %tmp3 = load i8* %tmp2 + ret i8 %tmp3 +} + +define i8 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i8* + %tmp3 = load i8* %tmp2 + ret i8 %tmp3 +} + +define i8 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i8* + %tmp3 = load i8* %tmp2 + ret i8 %tmp3 +} + +define i8 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + %tmp4 = load i8* %tmp3 + ret i8 %tmp4 +} + +define i8 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + %tmp4 = load i8* %tmp3 + ret i8 %tmp4 +} diff --git a/test/CodeGen/Thumb2/thumb2-ldrh.ll b/test/CodeGen/Thumb2/thumb2-ldrh.ll new file mode 100644 index 0000000..15f803e --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-ldrh.ll @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrh r0} | count 7 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrh | grep lsl +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldrh + +define i16 @f1(i16* %v) { +entry: + %tmp = load i16* %v + ret i16 %tmp +} + +define i16 @f2(i16* %v) { +entry: + %tmp2 = getelementptr i16* %v, i16 1023 + %tmp = load i16* %tmp2 + ret i16 %tmp +} + +define i16 @f3(i16* %v) { +entry: + %tmp2 = getelementptr i16* %v, i16 2048 + %tmp = load i16* %tmp2 + ret i16 %tmp +} + +define i16 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i16* + %tmp3 = load i16* %tmp2 + ret i16 %tmp3 +} + +define i16 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i16* + %tmp3 = load i16* %tmp2 + ret i16 %tmp3 +} + +define i16 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + %tmp4 = load i16* %tmp3 + ret i16 %tmp4 +} + +define i16 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + %tmp4 = load i16* %tmp3 + ret i16 %tmp4 +} diff --git a/test/CodeGen/Thumb2/thumb2-mvn2.ll b/test/CodeGen/Thumb2/thumb2-mvn2.ll index 178f02b..df9b11b 100644 --- a/test/CodeGen/Thumb2/thumb2-mvn2.ll +++ b/test/CodeGen/Thumb2/thumb2-mvn2.ll @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a) { %tmp = xor i32 4294967295, %a @@ -9,3 +13,29 @@ define i32 @f2(i32 %a) { %tmp = xor i32 %a, 4294967295 ret i32 %tmp } + +define i32 @f5(i32 %a) { + %tmp = shl i32 %a, 5 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} + +define i32 @f6(i32 %a) { + %tmp = lshr i32 %a, 6 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} + +define i32 @f7(i32 %a) { + %tmp = ashr i32 %a, 7 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} + +define i32 @f8(i32 %a) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-orn.ll b/test/CodeGen/Thumb2/thumb2-orn.ll index 1add347..92c4564 100644 --- a/test/CodeGen/Thumb2/thumb2-orn.ll +++ b/test/CodeGen/Thumb2/thumb2-orn.ll @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = xor i32 %b, 4294967295 @@ -23,3 +27,33 @@ define i32 @f4(i32 %a, i32 %b) { %tmp1 = or i32 %tmp, %a ret i32 %tmp1 } + +define i32 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} diff --git a/test/CodeGen/Thumb2/thumb2-orr.ll b/test/CodeGen/Thumb2/thumb2-orr.ll index 9222946..9891658 100644 --- a/test/CodeGen/Thumb2/thumb2-orr.ll +++ b/test/CodeGen/Thumb2/thumb2-orr.ll @@ -1,6 +1,36 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp2 = or i32 %a, %b ret i32 %tmp2 } + +define i32 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} + +define i32 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} + +define i32 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} + +define i32 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} diff --git a/test/CodeGen/Thumb2/thumb2-rsb.ll b/test/CodeGen/Thumb2/thumb2-rsb.ll index 934e377..5779687 100644 --- a/test/CodeGen/Thumb2/thumb2-rsb.ll +++ b/test/CodeGen/Thumb2/thumb2-rsb.ll @@ -1,9 +1,30 @@ -; XFAIL: * -; this will match as "sub" until we get register shifting +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1 +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 +} -define i32 @f1(i32 %a, i32 %b) { - %tmp = sub i32 %b, %a - ret i32 %tmp +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 } diff --git a/test/CodeGen/Thumb2/thumb2-sbc2.ll b/test/CodeGen/Thumb2/thumb2-sbc2.ll new file mode 100644 index 0000000..4302f76 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-sbc2.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sbc\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1 + +define i64 @f1(i64 %a, i64 %b) { + %tmp = sub i64 %a, %b + ret i64 %tmp +} diff --git a/test/CodeGen/Thumb2/thumb2-str.ll b/test/CodeGen/Thumb2/thumb2-str.ll new file mode 100644 index 0000000..4097a6c --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-str.ll @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$} +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1 + +define i32 @f1(i32 %a, i32* %v) { + store i32 %a, i32* %v + ret i32 %a +} + +define i32 @f2(i32 %a, i32* %v) { + %tmp2 = getelementptr i32* %v, i32 1023 + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f2a(i32 %a, i32* %v) { + %tmp2 = getelementptr i32* %v, i32 -32 + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f3(i32 %a, i32* %v) { + %tmp2 = getelementptr i32* %v, i32 1024 + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f4(i32 %a, i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i32* + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f5(i32 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i32* + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f6(i32 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + store i32 %a, i32* %tmp3 + ret i32 %a +} + +define i32 @f7(i32 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + store i32 %a, i32* %tmp3 + ret i32 %a +} diff --git a/test/CodeGen/Thumb2/thumb2-str_post.ll b/test/CodeGen/Thumb2/thumb2-str_post.ll new file mode 100644 index 0000000..536011c --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-str_post.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep {strh .*\\\[.*\], #-4} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep {str .*\\\[.*\],} | count 1 + +define i16 @test1(i32* %X, i16* %A) { + %Y = load i32* %X ; <i32> [#uses=1] + %tmp1 = trunc i32 %Y to i16 ; <i16> [#uses=1] + store i16 %tmp1, i16* %A + %tmp2 = ptrtoint i16* %A to i16 ; <i16> [#uses=1] + %tmp3 = sub i16 %tmp2, 4 ; <i16> [#uses=1] + ret i16 %tmp3 +} + +define i32 @test2(i32* %X, i32* %A) { + %Y = load i32* %X ; <i32> [#uses=1] + store i32 %Y, i32* %A + %tmp1 = ptrtoint i32* %A to i32 ; <i32> [#uses=1] + %tmp2 = sub i32 %tmp1, 4 ; <i32> [#uses=1] + ret i32 %tmp2 +} diff --git a/test/CodeGen/Thumb2/thumb2-str_pre.ll b/test/CodeGen/Thumb2/thumb2-str_pre.ll new file mode 100644 index 0000000..1e93b70 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-str_pre.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep {str.*\\!} | count 2 + +define void @test1(i32* %X, i32* %A, i32** %dest) { + %B = load i32* %A ; <i32> [#uses=1] + %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2] + store i32 %B, i32* %Y + store i32* %Y, i32** %dest + ret void +} + +define i16* @test2(i16* %X, i32* %A) { + %B = load i32* %A ; <i32> [#uses=1] + %Y = getelementptr i16* %X, i32 4 ; <i16*> [#uses=2] + %tmp = trunc i32 %B to i16 ; <i16> [#uses=1] + store i16 %tmp, i16* %Y + ret i16* %Y +} diff --git a/test/CodeGen/Thumb2/thumb2-strb.ll b/test/CodeGen/Thumb2/thumb2-strb.ll new file mode 100644 index 0000000..d8401cd6 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-strb.ll @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$} +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1 + +define i8 @f1(i8 %a, i8* %v) { + store i8 %a, i8* %v + ret i8 %a +} + +define i8 @f2(i8 %a, i8* %v) { + %tmp2 = getelementptr i8* %v, i32 4092 + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f2a(i8 %a, i8* %v) { + %tmp2 = getelementptr i8* %v, i32 -128 + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f3(i8 %a, i8* %v) { + %tmp2 = getelementptr i8* %v, i32 4096 + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f4(i8 %a, i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i8* + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f5(i8 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i8* + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f6(i8 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + store i8 %a, i8* %tmp3 + ret i8 %a +} + +define i8 @f7(i8 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + store i8 %a, i8* %tmp3 + ret i8 %a +} diff --git a/test/CodeGen/Thumb2/thumb2-strh.ll b/test/CodeGen/Thumb2/thumb2-strh.ll new file mode 100644 index 0000000..80dedf0 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-strh.ll @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$} +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1 + +define i16 @f1(i16 %a, i16* %v) { + store i16 %a, i16* %v + ret i16 %a +} + +define i16 @f2(i16 %a, i16* %v) { + %tmp2 = getelementptr i16* %v, i32 2046 + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f2a(i16 %a, i16* %v) { + %tmp2 = getelementptr i16* %v, i32 -64 + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f3(i16 %a, i16* %v) { + %tmp2 = getelementptr i16* %v, i32 2048 + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f4(i16 %a, i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i16* + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f5(i16 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i16* + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f6(i16 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + store i16 %a, i16* %tmp3 + ret i16 %a +} + +define i16 @f7(i16 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + store i16 %a, i16* %tmp3 + ret i16 %a +} diff --git a/test/CodeGen/Thumb2/thumb2-sub.ll b/test/CodeGen/Thumb2/thumb2-sub.ll new file mode 100644 index 0000000..cf82704 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-sub.ll @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\[w\]\\?\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5 + +; 171 = 0x000000ab +define i32 @f1(i32 %a) { + %tmp = sub i32 %a, 171 + ret i32 %tmp +} + +; 1179666 = 0x00120012 +define i32 @f2(i32 %a) { + %tmp = sub i32 %a, 1179666 + ret i32 %tmp +} + +; 872428544 = 0x34003400 +define i32 @f3(i32 %a) { + %tmp = sub i32 %a, 872428544 + ret i32 %tmp +} + +; 1448498774 = 0x56565656 +define i32 @f4(i32 %a) { + %tmp = sub i32 %a, 1448498774 + ret i32 %tmp +} + +; 510 = 0x000001fe +define i32 @f5(i32 %a) { + %tmp = sub i32 %a, 510 + ret i32 %tmp +} diff --git a/test/CodeGen/Thumb2/thumb2-sub2.ll b/test/CodeGen/Thumb2/thumb2-sub2.ll new file mode 100644 index 0000000..c7ebd22 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-sub2.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {subw\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#4095} | count 1 + +define i32 @f1(i32 %a) { + %tmp = sub i32 %a, 4095 + ret i32 %tmp +} diff --git a/test/CodeGen/Thumb2/thumb2-sub4.ll b/test/CodeGen/Thumb2/thumb2-sub4.ll new file mode 100644 index 0000000..fd283fd --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-sub4.ll @@ -0,0 +1,36 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 + +define i32 @f1(i32 %a, i32 %b) { + %tmp = sub i32 %a, %b + ret i32 %tmp +} + +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-sub5.ll b/test/CodeGen/Thumb2/thumb2-sub5.ll new file mode 100644 index 0000000..3e9ec25 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-sub5.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {subs\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 + +define i64 @f1(i64 %a, i64 %b) { + %tmp = sub i64 %a, %b + ret i64 %tmp +} diff --git a/test/CodeGen/Thumb2/thumb2-sxt_rot.ll b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll new file mode 100644 index 0000000..4afe354 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll @@ -0,0 +1,29 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep sxtb | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep sxtb | grep ror | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep sxtab | count 1 + +define i32 @test0(i8 %A) { + %B = sext i8 %A to i32 + ret i32 %B +} + +define i8 @test1(i32 %A) signext { + %B = lshr i32 %A, 8 + %C = shl i32 %A, 24 + %D = or i32 %B, %C + %E = trunc i32 %D to i8 + ret i8 %E +} + +define i32 @test2(i32 %A, i32 %X) signext { + %B = lshr i32 %A, 8 + %C = shl i32 %A, 24 + %D = or i32 %B, %C + %E = trunc i32 %D to i8 + %F = sext i8 %E to i32 + %G = add i32 %F, %X + ret i32 %G +} diff --git a/test/CodeGen/Thumb2/thumb2-teq.ll b/test/CodeGen/Thumb2/thumb2-teq.ll new file mode 100644 index 0000000..c3c2094 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-teq.ll @@ -0,0 +1,71 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10 + +; 0x000000bb = 187 +define i1 @f1(i32 %a) { + %tmp = xor i32 %a, 187 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x000000bb = 187 +define i1 @f2(i32 %a) { + %tmp = xor i32 %a, 187 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f3(i32 %a) { + %tmp = xor i32 %a, 11141290 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f4(i32 %a) { + %tmp = xor i32 %a, 11141290 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f5(i32 %a) { + %tmp = xor i32 %a, 3422604288 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f6(i32 %a) { + %tmp = xor i32 %a, 3422604288 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f7(i32 %a) { + %tmp = xor i32 %a, 3722304989 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f8(i32 %a) { + %tmp = xor i32 %a, 3722304989 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f9(i32 %a) { + %tmp = xor i32 %a, 1114112 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f10(i32 %a) { + %tmp = xor i32 %a, 1114112 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-teq2.ll b/test/CodeGen/Thumb2/thumb2-teq2.ll new file mode 100644 index 0000000..fe2b2c8 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-teq2.ll @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 + +define i1 @f1(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f2(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f3(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +define i1 @f4(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +define i1 @f6(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f8(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f9(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} diff --git a/test/CodeGen/Thumb2/thumb2-tst.ll b/test/CodeGen/Thumb2/thumb2-tst.ll new file mode 100644 index 0000000..9e2d3e5 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-tst.ll @@ -0,0 +1,71 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10 + +; 0x000000bb = 187 +define i1 @f1(i32 %a) { + %tmp = and i32 %a, 187 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x000000bb = 187 +define i1 @f2(i32 %a) { + %tmp = and i32 %a, 187 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f3(i32 %a) { + %tmp = and i32 %a, 11141290 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f4(i32 %a) { + %tmp = and i32 %a, 11141290 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f5(i32 %a) { + %tmp = and i32 %a, 3422604288 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f6(i32 %a) { + %tmp = and i32 %a, 3422604288 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f7(i32 %a) { + %tmp = and i32 %a, 3722304989 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f8(i32 %a) { + %tmp = and i32 %a, 3722304989 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f9(i32 %a) { + %tmp = and i32 %a, 1114112 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f10(i32 %a) { + %tmp = and i32 %a, 1114112 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} diff --git a/test/CodeGen/Thumb2/thumb2-tst2.ll b/test/CodeGen/Thumb2/thumb2-tst2.ll new file mode 100644 index 0000000..c0f404c --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-tst2.ll @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 + +define i1 @f1(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f2(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f3(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +define i1 @f4(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +define i1 @f6(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f8(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f9(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} diff --git a/test/CodeGen/Thumb2/thumb2-uxt_rot.ll b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll new file mode 100644 index 0000000..0d1cc18 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep uxtb | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep uxtab | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep uxth | count 1 + +define i8 @test1(i32 %A.u) zeroext { + %B.u = trunc i32 %A.u to i8 + ret i8 %B.u +} + +define i32 @test2(i32 %A.u, i32 %B.u) zeroext { + %C.u = trunc i32 %B.u to i8 + %D.u = zext i8 %C.u to i32 + %E.u = add i32 %A.u, %D.u + ret i32 %E.u +} + +define i32 @test3(i32 %A.u) zeroext { + %B.u = lshr i32 %A.u, 8 + %C.u = shl i32 %A.u, 24 + %D.u = or i32 %B.u, %C.u + %E.u = trunc i32 %D.u to i16 + %F.u = zext i16 %E.u to i32 + ret i32 %F.u +} diff --git a/test/CodeGen/Thumb2/thumb2-uxtb.ll b/test/CodeGen/Thumb2/thumb2-uxtb.ll new file mode 100644 index 0000000..28a5fe4 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-uxtb.ll @@ -0,0 +1,74 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | \ +; RUN: grep uxt | count 10 + +define i32 @test1(i32 %x) { + %tmp1 = and i32 %x, 16711935 ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32 @test2(i32 %x) { + %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] + %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @test3(i32 %x) { + %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] + %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @test4(i32 %x) { + %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] + %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] + ret i32 %tmp6 +} + +define i32 @test5(i32 %x) { + %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] + %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] + ret i32 %tmp2 +} + +define i32 @test6(i32 %x) { + %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1] + %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1] + %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1] + %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1] + %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1] + ret i32 %tmp6 +} + +define i32 @test7(i32 %x) { + %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1] + %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1] + %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1] + %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1] + %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1] + ret i32 %tmp6 +} + +define i32 @test8(i32 %x) { + %tmp1 = shl i32 %x, 8 ; <i32> [#uses=1] + %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1] + %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1] + %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1] + ret i32 %tmp6 +} + +define i32 @test9(i32 %x) { + %tmp1 = lshr i32 %x, 24 ; <i32> [#uses=1] + %tmp4 = shl i32 %x, 8 ; <i32> [#uses=1] + %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1] + %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1] + ret i32 %tmp6 +} + +define i32 @test10(i32 %p0) { + %tmp1 = lshr i32 %p0, 7 ; <i32> [#uses=1] + %tmp2 = and i32 %tmp1, 16253176 ; <i32> [#uses=2] + %tmp4 = lshr i32 %tmp2, 5 ; <i32> [#uses=1] + %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1] + %tmp7 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1] + ret i32 %tmp7 +} diff --git a/test/CodeGen/Thumb2/tls1.ll b/test/CodeGen/Thumb2/tls1.ll new file mode 100644 index 0000000..6abb6eb --- /dev/null +++ b/test/CodeGen/Thumb2/tls1.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {i(tpoff)} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {__aeabi_read_tp} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi \ +; RUN: -relocation-model=pic | grep {__tls_get_addr} + + +@i = thread_local global i32 15 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/Thumb2/tls2.ll b/test/CodeGen/Thumb2/tls2.ll new file mode 100644 index 0000000..3396b0b --- /dev/null +++ b/test/CodeGen/Thumb2/tls2.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {i(gottpoff)} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {ldr r., \[pc, r.\]} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi \ +; RUN: -relocation-model=pic | grep {__tls_get_addr} + +@i = external thread_local global i32 ; <i32*> [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} diff --git a/test/CodeGen/X86/fast-isel-constpool.ll b/test/CodeGen/X86/fast-isel-constpool.ll new file mode 100644 index 0000000..ac2595a --- /dev/null +++ b/test/CodeGen/X86/fast-isel-constpool.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -fast-isel | grep {LCPI1_0(%rip)} +; Make sure fast isel uses rip-relative addressing when required. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin9.0" + +define i32 @f0(double %x) nounwind { +entry: + %retval = alloca i32 ; <i32*> [#uses=2] + %x.addr = alloca double ; <double*> [#uses=2] + store double %x, double* %x.addr + %tmp = load double* %x.addr ; <double> [#uses=1] + %cmp = fcmp olt double %tmp, 8.500000e-01 ; <i1> [#uses=1] + %conv = zext i1 %cmp to i32 ; <i32> [#uses=1] + store i32 %conv, i32* %retval + %0 = load i32* %retval ; <i32> [#uses=1] + ret i32 %0 +} diff --git a/test/CodeGen/X86/fast-isel-gv.ll b/test/CodeGen/X86/fast-isel-gv.ll new file mode 100644 index 0000000..b2f8850 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-gv.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -fast-isel | grep {_kill@GOTPCREL(%rip)} +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10.0" +@f = global i8 (...)* @kill ; <i8 (...)**> [#uses=1] + +declare signext i8 @kill(...) + +define i32 @main() nounwind ssp { +entry: + %retval = alloca i32 ; <i32*> [#uses=2] + %0 = alloca i32 ; <i32*> [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + %1 = load i8 (...)** @f, align 8 ; <i8 (...)*> [#uses=1] + %2 = icmp ne i8 (...)* %1, @kill ; <i1> [#uses=1] + %3 = zext i1 %2 to i32 ; <i32> [#uses=1] + store i32 %3, i32* %0, align 4 + %4 = load i32* %0, align 4 ; <i32> [#uses=1] + store i32 %4, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval ; <i32> [#uses=1] + ret i32 %retval1 +} diff --git a/test/CodeGen/X86/inline-asm-fpstack3.ll b/test/CodeGen/X86/inline-asm-fpstack3.ll new file mode 100644 index 0000000..ac89a1d --- /dev/null +++ b/test/CodeGen/X86/inline-asm-fpstack3.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: grep {fld %%st(0)} %t +; PR4459 + +declare x86_fp80 @ceil(x86_fp80) + +declare void @test(x86_fp80) + +define void @test2(x86_fp80 %a) { +entry: + %0 = call x86_fp80 @ceil(x86_fp80 %a) + call void asm sideeffect "fistpl $0", "{st}"( x86_fp80 %0) + call void @test(x86_fp80 %0 ) + ret void +} diff --git a/test/CodeGen/X86/inline-asm-fpstack4.ll b/test/CodeGen/X86/inline-asm-fpstack4.ll new file mode 100644 index 0000000..c9122fa --- /dev/null +++ b/test/CodeGen/X86/inline-asm-fpstack4.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR4484 + +declare x86_fp80 @ceil() + +declare void @test(x86_fp80) + +define void @test2(x86_fp80 %a) { +entry: + %0 = call x86_fp80 @ceil() + call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a) + call void @test(x86_fp80 %0) + ret void +} + diff --git a/test/CodeGen/X86/inline-asm-fpstack5.ll b/test/CodeGen/X86/inline-asm-fpstack5.ll new file mode 100644 index 0000000..64f3788 --- /dev/null +++ b/test/CodeGen/X86/inline-asm-fpstack5.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR4485 + +define void @test(x86_fp80* %a) { +entry: + %0 = load x86_fp80* %a, align 16 + %1 = fmul x86_fp80 %0, 0xK4006B400000000000000 + %2 = fmul x86_fp80 %1, 0xK4012F424000000000000 + tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2) + %3 = load x86_fp80* %a, align 16 + %4 = fmul x86_fp80 %3, 0xK4006B400000000000000 + %5 = fmul x86_fp80 %4, 0xK4012F424000000000000 + tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5) + ret void +} diff --git a/test/Feature/mdnode2.ll b/test/Feature/mdnode2.ll new file mode 100644 index 0000000..9feac7e --- /dev/null +++ b/test/Feature/mdnode2.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llvm-dis > %t.ll +; RUN: grep "!0 = constant metadata !{i32 21, i32 22}" %t.ll +; RUN: grep "!1 = constant metadata !{i32 23, i32 24}" %t.ll +; RUN: grep "@llvm.blah = constant metadata !{i32 1000, i16 200, metadata !1, metadata !0}" %t.ll +!0 = constant metadata !{i32 21, i32 22} +!1 = constant metadata !{i32 23, i32 24} +@llvm.blah = constant metadata !{i32 1000, i16 200, metadata !1, metadata !0} diff --git a/test/Feature/mdnode3.ll b/test/Feature/mdnode3.ll new file mode 100644 index 0000000..fc61ae2 --- /dev/null +++ b/test/Feature/mdnode3.ll @@ -0,0 +1,3 @@ +; RUN: llvm-as < %s | llvm-dis | llvm-as -f -o /dev/null +!0 = constant metadata !{i32 21, i32 22} +@llvm.blah = constant metadata !{i32 1000, i16 200, metadata !0, metadata !0} diff --git a/test/FrontendC++/2009-06-30-ByrefBlock.cpp b/test/FrontendC++/2009-06-30-ByrefBlock.cpp new file mode 100644 index 0000000..6f8869c --- /dev/null +++ b/test/FrontendC++/2009-06-30-ByrefBlock.cpp @@ -0,0 +1,8 @@ +// Insure __block_holder_tmp is allocated on the stack. +// RUN: %llvmgxx %s -S -O2 -o - | egrep {__block_holder_tmp.*alloca} +// <rdar://problem/5865221> +extern void fubar_dispatch_sync(void (^PP)(void)); +void fubar() { + __block void *voodoo; + fubar_dispatch_sync(^(void){voodoo=0;}); +} diff --git a/test/MC/AsmParser/directive_align.s b/test/MC/AsmParser/directive_align.s new file mode 100644 index 0000000..5715cb3 --- /dev/null +++ b/test/MC/AsmParser/directive_align.s @@ -0,0 +1,16 @@ +# RUN: llvm-mc %s > %t + +# RUN: grep -A 2 TEST0 %t > %t2 +# RUN: grep ".p2align 1, 0" %t2 | count 1 +TEST0: + .align 1 + +# RUN: grep -A 2 TEST1 %t > %t2 +# RUN: grep ".p2alignl 3, 0, 2" %t2 | count 1 +TEST1: + .align32 3,,2 + +# RUN: grep -A 2 TEST2 %t > %t2 +# RUN: grep ".balign 3, 10" %t2 | count 1 +TEST2: + .balign 3,10 diff --git a/test/MC/AsmParser/directive_symbol_attrs.s b/test/MC/AsmParser/directive_symbol_attrs.s new file mode 100644 index 0000000..186e967 --- /dev/null +++ b/test/MC/AsmParser/directive_symbol_attrs.s @@ -0,0 +1,7 @@ +# RUN: llvm-mc %s > %t + +# RUN: grep -A 3 TEST0 %t > %t2 +# RUN: grep ".globl a" %t2 | count 1 +# RUN: grep ".globl b" %t2 | count 1 +TEST0: + .globl a, b diff --git a/test/MC/AsmParser/exprs.s b/test/MC/AsmParser/exprs.s new file mode 100644 index 0000000..20de3a5 --- /dev/null +++ b/test/MC/AsmParser/exprs.s @@ -0,0 +1,62 @@ +// FIXME: For now this test just checks that llvm-mc works. Once we have .macro, +// .if, and .abort we can write a better test (without resorting to miles of +// greps). + +// RUN: llvm-mc %s > %t + + .text +g: +h: +j: +k: + .data + .byte !1 + 2 + .byte !0 + .byte ~0 + .byte -1 + .byte +1 + .byte 1 + 2 + .byte 1 & 3 + .byte 4 / 2 + .byte 4 / -2 + .byte 1 == 1 + .byte 1 == 0 + .byte 1 > 0 + .byte 1 >= 1 + .byte 1 < 2 + .byte 1 <= 1 + .byte 4 % 3 + .byte 2 * 2 + .byte 2 != 2 + .byte 2 <> 2 + .byte 1 | 2 + .byte 1 << 1 + .byte 2 >> 1 + .byte ~0 >> 1 + .byte 3 - 2 + .byte 1 ^ 3 + .byte 1 && 2 + .byte 3 && 0 + .byte 1 || 2 + .byte 0 || 0 + + .set c, 10 + .byte c + 1 + + d = e + 10 + .long d + + f = g - h + 5 + .long f + + i = (j + 10) - (k + 2) + .long i + + l = m - n + 4 + + .text +m: +n: + nop + +
\ No newline at end of file diff --git a/test/MC/AsmParser/x86_operands.s b/test/MC/AsmParser/x86_operands.s new file mode 100644 index 0000000..708f1bd --- /dev/null +++ b/test/MC/AsmParser/x86_operands.s @@ -0,0 +1,36 @@ +// FIXME: Actually test that we get the expected results. + +// RUN: llvm-mc %s > %t + +# Immediates + push $1 + push $(1+2) + push $a + push $1 + 2 + +# Disambiguation + push 4+4 + push (4+4) + push (4+4)(%eax) + push 8(%eax) + push (%eax) + push (4+4)(,%eax) + +# Indirect Memory Operands + push 1(%eax) + push 1(%eax,%ebx) + push 1(%eax,%ebx,) + push 1(%eax,%ebx,4) + push 1(,%ebx) + push 1(,%ebx,) + push 1(,%ebx,4) + push 1(,%ebx,(2+2)) + +# '*' + call a + call *a + call *%eax + call 4(%eax) # FIXME: Warn or reject. + call *4(%eax) + + diff --git a/test/TableGen/ListArgs.td b/test/TableGen/ListArgs.td new file mode 100644 index 0000000..daa0de6 --- /dev/null +++ b/test/TableGen/ListArgs.td @@ -0,0 +1,11 @@ +// RUN: tblgen %s + +class B<list<int> v> { + list<int> vals = v; +} + +class BB<list<list<int>> vals> : B<vals[0]>; +class BBB<list<list<int>> vals> : BB<vals>; + +def OneB : BBB<[[1,2,3]]>; +def TwoB : BBB<[[1,2,3],[4,5,6]]>; diff --git a/test/TableGen/ListArgsSimple.td b/test/TableGen/ListArgsSimple.td new file mode 100644 index 0000000..b3b2078 --- /dev/null +++ b/test/TableGen/ListArgsSimple.td @@ -0,0 +1,8 @@ +// RUN: tblgen %s + +class B<int v> { + int val = v; +} + +class BB<list<int> vals> : B<vals[0]>; +class BBB<list<int> vals> : BB<vals>; diff --git a/test/Transforms/IndVarSimplify/loop_evaluate9.ll b/test/Transforms/IndVarSimplify/loop_evaluate9.ll new file mode 100644 index 0000000..5a7a859 --- /dev/null +++ b/test/Transforms/IndVarSimplify/loop_evaluate9.ll @@ -0,0 +1,78 @@ +; RUN: llvm-as < %s | opt -indvars | llvm-dis > %t +; RUN: grep {\[%\]tmp5.lcssa = phi i8 \\\[ 63, \[%\]cc70a02__complex_integers__Oadd.153.exit.i \\\]} %t +; RUN: grep {\[%\]tmp4.lcssa = phi i8 \\\[ -28, \[%\]cc70a02__complex_integers__Oadd.153.exit.i \\\]} %t +; PR4477 + +; Indvars should compute the exit values in loop. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i386-pc-linux-gnu" + %struct.cc70a02__complex_integers__complex_type = type { i8, i8 } +@.str = internal constant [13 x i8] c"fc70a00.adb\00\00", align 1 ; <[13 x i8]*> [#uses=1] + +define void @_ada_cc70a02() { +entry: + br label %bb1.i + +bb1.i: ; preds = %bb2.i, %entry + %indvar.i = phi i32 [ 0, %entry ], [ %indvar.next.i, %bb2.i ] ; <i32> [#uses=2] + %result.0.i = phi i16 [ 0, %entry ], [ %ins36.i, %bb2.i ] ; <i16> [#uses=2] + %tmp38.i = trunc i16 %result.0.i to i8 ; <i8> [#uses=2] + %tmp = add i8 %tmp38.i, 96 ; <i8> [#uses=1] + %tmp1 = icmp ugt i8 %tmp, -56 ; <i1> [#uses=1] + br i1 %tmp1, label %bb.i.i, label %bb1.i.i + +bb.i.i: ; preds = %bb1.i + tail call void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 24) noreturn + unreachable + +bb1.i.i: ; preds = %bb1.i + %tmp41.i = lshr i16 %result.0.i, 8 ; <i16> [#uses=1] + %tmp42.i = trunc i16 %tmp41.i to i8 ; <i8> [#uses=2] + %tmp2 = add i8 %tmp42.i, 109 ; <i8> [#uses=1] + %tmp3 = icmp ugt i8 %tmp2, -56 ; <i1> [#uses=1] + br i1 %tmp3, label %bb2.i.i, label %cc70a02__complex_integers__Oadd.153.exit.i + +bb2.i.i: ; preds = %bb1.i.i + tail call void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 24) noreturn + unreachable + +cc70a02__complex_integers__Oadd.153.exit.i: ; preds = %bb1.i.i + %tmp4 = add i8 %tmp38.i, -4 ; <i8> [#uses=2] + %tmp5 = add i8 %tmp42.i, 9 ; <i8> [#uses=2] + %tmp25.i = zext i8 %tmp4 to i16 ; <i16> [#uses=1] + %tmp33.i = zext i8 %tmp5 to i16 ; <i16> [#uses=1] + %tmp34.i = shl i16 %tmp33.i, 8 ; <i16> [#uses=1] + %ins36.i = or i16 %tmp34.i, %tmp25.i ; <i16> [#uses=1] + %tmp6 = icmp eq i32 %indvar.i, 6 ; <i1> [#uses=1] + br i1 %tmp6, label %cc70a02__complex_multiplication.170.exit, label %bb2.i + +bb2.i: ; preds = %cc70a02__complex_integers__Oadd.153.exit.i + %indvar.next.i = add i32 %indvar.i, 1 ; <i32> [#uses=1] + br label %bb1.i + +cc70a02__complex_multiplication.170.exit: ; preds = %cc70a02__complex_integers__Oadd.153.exit.i + %tmp7 = icmp eq i8 %tmp4, -28 ; <i1> [#uses=1] + %tmp8 = icmp eq i8 %tmp5, 63 ; <i1> [#uses=1] + %or.cond = and i1 %tmp8, %tmp7 ; <i1> [#uses=1] + br i1 %or.cond, label %return, label %bb1 + +bb1: ; preds = %cc70a02__complex_multiplication.170.exit + tail call void @exit(i32 1) + ret void + +return: ; preds = %cc70a02__complex_multiplication.170.exit + ret void +} + +declare fastcc void @cc70a02__complex_integers__complex.164(%struct.cc70a02__complex_integers__complex_type* noalias nocapture sret, i8 signext, i8 signext) nounwind + +declare fastcc void @cc70a02__complex_integers__Osubtract.149(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4) + +declare fastcc void @cc70a02__complex_integers__Oadd.153(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4, %struct.cc70a02__complex_integers__complex_type* byval align 4) + +declare fastcc void @cc70a02__complex_multiplication.170(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4) + +declare void @__gnat_rcheck_12(i8*, i32) noreturn + +declare void @exit(i32) diff --git a/test/Transforms/InstCombine/2009-07-02-MaskedIntVector.ll b/test/Transforms/InstCombine/2009-07-02-MaskedIntVector.ll new file mode 100644 index 0000000..7505de1 --- /dev/null +++ b/test/Transforms/InstCombine/2009-07-02-MaskedIntVector.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis +; PR4495 + +define i32 @test(i64 %test) { +entry: + %0 = bitcast <4 x i32> undef to <16 x i8> ; <<16 x i8>> [#uses=1] + %t12 = shufflevector <16 x i8> %0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> ; <<16 x i8>> [#uses=1] + %t11 = bitcast <16 x i8> %t12 to <2 x i64> ; <<2 x i64>> [#uses=1] + %t9 = extractelement <2 x i64> %t11, i32 0 ; <i64> [#uses=1] + %t10 = bitcast i64 %t9 to <2 x i32> ; <<2 x i32>> [#uses=1] + %t7 = bitcast i64 %test to <2 x i32> ; <<2 x i32>> [#uses=1] + %t6 = xor <2 x i32> %t10, %t7 ; <<2 x i32>> [#uses=1] + %t1 = extractelement <2 x i32> %t6, i32 0 ; <i32> [#uses=1] + ret i32 %t1 +} diff --git a/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll b/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll new file mode 100644 index 0000000..8695d1e --- /dev/null +++ b/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {ret i32 0} +; PR4487 + +; Bitcasts between vectors and scalars are valid, despite being ill-advised. + +define i32 @test(i64 %a) { +bb20: + %t1 = bitcast i64 %a to <2 x i32> + %t2 = bitcast i64 %a to <2 x i32> + %t3 = xor <2 x i32> %t1, %t2 + %t4 = extractelement <2 x i32> %t3, i32 0 + ret i32 %t4 +} + diff --git a/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll b/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll new file mode 100644 index 0000000..caaa8ad --- /dev/null +++ b/test/Transforms/LoopIndexSplit/non-iv-cmp-operand.ll @@ -0,0 +1,195 @@ +; RUN: llvm-as < %s | opt -inline -reassociate -loop-rotate -loop-index-split -indvars -simplifycfg -verify +; PR4471 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.VEC_basic_block_base = type { i32, i32, [1 x %struct.basic_block_def*] } + %struct.VEC_basic_block_gc = type { %struct.VEC_basic_block_base } + %struct.VEC_edge_base = type { i32, i32, [1 x %struct.edge_def*] } + %struct.VEC_edge_gc = type { %struct.VEC_edge_base } + %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] } + %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base } + %struct.VEC_temp_slot_p_base = type { i32, i32, [1 x %struct.temp_slot*] } + %struct.VEC_temp_slot_p_gc = type { %struct.VEC_temp_slot_p_base } + %struct.VEC_tree_base = type { i32, i32, [1 x %struct.tree_node*] } + %struct.VEC_tree_gc = type { %struct.VEC_tree_base } + %struct.__sbuf = type { i8*, i32 } + %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } + %struct.basic_block_def = type { %struct.tree_node*, %struct.VEC_edge_gc*, %struct.VEC_edge_gc*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_il_dependent, %struct.tree_node*, %struct.edge_prediction*, i64, i32, i32, i32, i32 } + %struct.basic_block_il_dependent = type { %struct.rtl_bb_info* } + %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [2 x i64] } + %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } + %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } + %struct.block_symbol = type { [3 x %struct.rtunion], %struct.object_block*, i64 } + %struct.case_node = type { %struct.case_node*, %struct.case_node*, %struct.case_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } + %struct.control_flow_graph = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.VEC_basic_block_gc*, i32, i32, i32, %struct.VEC_basic_block_gc*, i32 } + %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.__sbuf*, i32, i32, i64, i32 } + %struct.edge_def_insns = type { %struct.rtx_def* } + %struct.edge_prediction = type opaque + %struct.eh_status = type opaque + %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.__sbuf, i32, i8*, %struct.rtx_def** } + %struct.et_node = type opaque + %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } + %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.control_flow_graph*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.VEC_temp_slot_p_gc*, %struct.temp_slot*, %struct.var_refs_queue*, i32, i32, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.htab*, %struct.rtx_def*, i32, i32, %struct.__sbuf, %struct.VEC_tree_gc*, %struct.tree_node*, i8*, i8*, i8*, i8*, i8*, %struct.tree_node*, i8, i8, i8, i8, i8 } + %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i64, i64, i64, i32, i32, i8* (i64, i64)*, void (i8*)*, i8*, i8* (i8*, i64, i64)*, void (i8*, i8*)*, i32 } + %struct.initial_value_struct = type opaque + %struct.lang_decl = type opaque + %struct.language_function = type opaque + %struct.loop = type opaque + %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, [4 x i32], i32, i32, i32 } + %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* } + %struct.obstack = type { i64, %struct._obstack_chunk*, i8*, i8*, i8*, i64, i32, %struct._obstack_chunk* (i8*, i64)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } + %struct.omp_clause_subcode = type { i32 } + %struct.rtl_bb_info = type { %struct.rtx_def*, %struct.rtx_def*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, %struct.rtx_def*, %struct.rtx_def*, i32 } + %struct.rtunion = type { i8* } + %struct.rtx_def = type { i16, i8, i8, %struct.u } + %struct.section = type { %struct.unnamed_section } + %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } + %struct.stack_local_entry = type opaque + %struct.temp_slot = type opaque + %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8 } + %struct.tree_decl_common = type { %struct.tree_decl_minimal, %struct.tree_node*, i8, i8, i8, i8, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } + %struct.tree_decl_minimal = type { %struct.tree_common, %struct.__sbuf, i32, %struct.tree_node*, %struct.tree_node* } + %struct.tree_decl_non_common = type { %struct.tree_decl_with_vis, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } + %struct.tree_decl_u1 = type { i64 } + %struct.tree_decl_with_rtl = type { %struct.tree_decl_common, %struct.rtx_def* } + %struct.tree_decl_with_vis = type { %struct.tree_decl_with_rtl, %struct.tree_node*, %struct.tree_node*, i8, i8, i8 } + %struct.tree_function_decl = type { %struct.tree_decl_non_common, i8, i8, %struct.function* } + %struct.tree_node = type { %struct.tree_function_decl } + %struct.u = type { %struct.block_symbol } + %struct.unnamed_section = type { %struct.omp_clause_subcode, void (i8*)*, i8*, %struct.section* } + %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } + %struct.varasm_status = type opaque + %union.tree_ann_d = type opaque + +define void @emit_case_bit_tests(%struct.tree_node* %index_type, %struct.tree_node* %index_expr, %struct.tree_node* %minval, %struct.tree_node* %range, %struct.case_node* %nodes, %struct.rtx_def* %default_label) nounwind { +entry: + br label %bb17 + +bb: ; preds = %bb17 + %0 = call i64 @tree_low_cst(%struct.tree_node* undef, i32 1) nounwind ; <i64> [#uses=1] + %1 = trunc i64 %0 to i32 ; <i32> [#uses=1] + br label %bb15 + +bb10: ; preds = %bb15 + %2 = icmp ugt i32 %j.0, 63 ; <i1> [#uses=1] + br i1 %2, label %bb11, label %bb12 + +bb11: ; preds = %bb10 + %3 = zext i32 0 to i64 ; <i64> [#uses=0] + br label %bb14 + +bb12: ; preds = %bb10 + %4 = or i64 undef, undef ; <i64> [#uses=0] + br label %bb14 + +bb14: ; preds = %bb12, %bb11 + %5 = add i32 %j.0, 1 ; <i32> [#uses=1] + br label %bb15 + +bb15: ; preds = %bb14, %bb + %j.0 = phi i32 [ %1, %bb ], [ %5, %bb14 ] ; <i32> [#uses=3] + %6 = icmp ugt i32 %j.0, undef ; <i1> [#uses=1] + br i1 %6, label %bb16, label %bb10 + +bb16: ; preds = %bb15 + br label %bb17 + +bb17: ; preds = %bb16, %entry + br i1 undef, label %bb18, label %bb + +bb18: ; preds = %bb17 + unreachable +} + +declare i64 @tree_low_cst(%struct.tree_node*, i32) + +define void @expand_case(%struct.tree_node* %exp) nounwind { +entry: + br i1 undef, label %bb2, label %bb + +bb: ; preds = %entry + unreachable + +bb2: ; preds = %entry + br i1 undef, label %bb3, label %bb4 + +bb3: ; preds = %bb2 + unreachable + +bb4: ; preds = %bb2 + br i1 undef, label %bb127, label %bb5 + +bb5: ; preds = %bb4 + br i1 undef, label %bb6, label %bb7 + +bb6: ; preds = %bb5 + unreachable + +bb7: ; preds = %bb5 + br i1 undef, label %bb9, label %bb8 + +bb8: ; preds = %bb7 + unreachable + +bb9: ; preds = %bb7 + br i1 undef, label %bb11, label %bb10 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + br i1 undef, label %bb37, label %bb21 + +bb21: ; preds = %bb11 + unreachable + +bb37: ; preds = %bb11 + br i1 undef, label %bb38, label %bb39 + +bb38: ; preds = %bb37 + ret void + +bb39: ; preds = %bb37 + br i1 undef, label %bb59, label %bb40 + +bb40: ; preds = %bb39 + br i1 undef, label %bb41, label %bb59 + +bb41: ; preds = %bb40 + br i1 undef, label %bb42, label %bb59 + +bb42: ; preds = %bb41 + br i1 undef, label %bb43, label %bb59 + +bb43: ; preds = %bb42 + br i1 undef, label %bb59, label %bb44 + +bb44: ; preds = %bb43 + br i1 undef, label %bb56, label %bb58 + +bb56: ; preds = %bb44 + unreachable + +bb58: ; preds = %bb44 + call void @emit_case_bit_tests(%struct.tree_node* undef, %struct.tree_node* undef, %struct.tree_node* null, %struct.tree_node* undef, %struct.case_node* undef, %struct.rtx_def* undef) nounwind + br i1 undef, label %bb126, label %bb125 + +bb59: ; preds = %bb43, %bb42, %bb41, %bb40, %bb39 + br i1 undef, label %bb70, label %bb60 + +bb60: ; preds = %bb59 + unreachable + +bb70: ; preds = %bb59 + unreachable + +bb125: ; preds = %bb58 + unreachable + +bb126: ; preds = %bb58 + unreachable + +bb127: ; preds = %bb4 + ret void +} diff --git a/test/Transforms/LoopSimplify/merge-exits.ll b/test/Transforms/LoopSimplify/merge-exits.ll new file mode 100644 index 0000000..c5bf7fd --- /dev/null +++ b/test/Transforms/LoopSimplify/merge-exits.ll @@ -0,0 +1,45 @@ +; RUN: llvm-as < %s | opt -loopsimplify -loop-rotate -instcombine -indvars \ +; RUN: | llvm-dis > %t +; RUN: not grep sext %t +; RUN: grep {phi i64} %t | count 1 + +; Loopsimplify should be able to merge the two loop exits +; into one, so that loop rotate can rotate the loop, so +; that indvars can promote the induction variable to i64 +; without needing casts. + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + +define float @t(float* %pTmp1, float* %peakWeight, i32 %bandEdgeIndex) nounwind { +entry: + %t0 = load float* %peakWeight, align 4 ; <float> [#uses=1] + br label %bb1 + +bb: ; preds = %bb2 + %t1 = sext i32 %hiPart.0 to i64 ; <i64> [#uses=1] + %t2 = getelementptr float* %pTmp1, i64 %t1 ; <float*> [#uses=1] + %t3 = load float* %t2, align 4 ; <float> [#uses=1] + %t4 = fadd float %t3, %distERBhi.0 ; <float> [#uses=1] + %t5 = add i32 %hiPart.0, 1 ; <i32> [#uses=2] + %t6 = sext i32 %t5 to i64 ; <i64> [#uses=1] + %t7 = getelementptr float* %peakWeight, i64 %t6 ; <float*> [#uses=1] + %t8 = load float* %t7, align 4 ; <float> [#uses=1] + %t9 = fadd float %t8, %peakCount.0 ; <float> [#uses=1] + br label %bb1 + +bb1: ; preds = %bb, %entry + %peakCount.0 = phi float [ %t0, %entry ], [ %t9, %bb ] ; <float> [#uses=2] + %hiPart.0 = phi i32 [ 0, %entry ], [ %t5, %bb ] ; <i32> [#uses=3] + %distERBhi.0 = phi float [ 0.000000e+00, %entry ], [ %t4, %bb ] ; <float> [#uses=3] + %t10 = fcmp uge float %distERBhi.0, 2.500000e+00 ; <i1> [#uses=1] + br i1 %t10, label %bb3, label %bb2 + +bb2: ; preds = %bb1 + %t11 = add i32 %bandEdgeIndex, -1 ; <i32> [#uses=1] + %t12 = icmp sgt i32 %t11, %hiPart.0 ; <i1> [#uses=1] + br i1 %t12, label %bb, label %bb3 + +bb3: ; preds = %bb2, %bb1 + %t13 = fdiv float %peakCount.0, %distERBhi.0 ; <float> [#uses=1] + ret float %t13 +} |
