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-rw-r--r--test/MC/Disassembler/ARM/neon.txt74
1 files changed, 64 insertions, 10 deletions
diff --git a/test/MC/Disassembler/ARM/neon.txt b/test/MC/Disassembler/ARM/neon.txt
index c5dbee3..649424a 100644
--- a/test/MC/Disassembler/ARM/neon.txt
+++ b/test/MC/Disassembler/ARM/neon.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -triple armv7-unknown-unknown -disassemble -mattr +fp16 < %s | FileCheck %s
+# RUN: llvm-mc -triple armv7-unknown-unknown -mcpu=cortex-a9 -disassemble < %s | FileCheck %s
0x20 0x03 0xf1 0xf3
# CHECK: vabs.s8 d16, d16
@@ -1734,6 +1734,25 @@
0xcf 0x1a 0xe0 0xf4
# CHECK: vld3.32 {d17[1], d19[1], d21[1]}, [r0]
+# CHECK: vld3.8 {d0[], d1[], d2[]}, [r4]
+0x0f 0x0e 0xa4 0xf4
+# CHECK: vld3.8 {d0[], d1[], d2[]}, [r4]!
+0x0d 0x0e 0xa4 0xf4
+# CHECK: vld3.8 {d0[], d2[], d4[]}, [r4], r5
+0x25 0x0e 0xa4 0xf4
+# CHECK: vld3.16 {d0[], d2[], d4[]}, [r4]
+0x6f 0x0e 0xa4 0xf4
+# CHECK: vld3.16 {d0[], d1[], d2[]}, [r4]!
+0x4d 0x0e 0xa4 0xf4
+# CHECK: vld3.16 {d0[], d2[], d4[]}, [r4], r5
+0x65 0x0e 0xa4 0xf4
+# CHECK: vld3.32 {d0[], d1[], d2[]}, [r4]
+0x8f 0x0e 0xa4 0xf4
+# CHECK: vld3.32 {d0[], d1[], d2[]}, [r4]!
+0x8d 0x0e 0xa4 0xf4
+# CHECK: vld3.32 {d0[], d2[], d4[]}, [r4], r5
+0xa5 0x0e 0xa4 0xf4
+
0x3f 0x03 0xe0 0xf4
# CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
0x4f 0x07 0xe0 0xf4
@@ -1745,6 +1764,30 @@
0x4f 0x1b 0xe0 0xf4
# CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
+0x0f 0x0f 0xa4 0xf4
+# CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4]
+0x3f 0x0f 0xa4 0xf4
+# CHECK: vld4.8 {d0[], d2[], d4[], d6[]}, [r4, :32]
+0x1d 0x0f 0xa4 0xf4
+# CHECK: vld4.8 {d0[], d1[], d2[], d3[]}, [r4, :32]!
+0x35 0x0f 0xa4 0xf4
+# CHECK: vld4.8 {d0[], d2[], d4[], d6[]}, [r4, :32], r5
+0x4f 0x0f 0xa4 0xf4
+# CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4]
+0x7f 0x0f 0xa4 0xf4
+# CHECK: vld4.16 {d0[], d2[], d4[], d6[]}, [r4, :64]
+0x5d 0x0f 0xa4 0xf4
+# CHECK: vld4.16 {d0[], d1[], d2[], d3[]}, [r4, :64]!
+0x75 0x0f 0xa4 0xf4
+# CHECK: vld4.16 {d0[], d2[], d4[], d6[]}, [r4, :64], r5
+0x8f 0x0f 0xa4 0xf4
+# CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4]
+0xbf 0x0f 0xa4 0xf4
+# CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4, :64]
+0xdd 0x0f 0xa4 0xf4
+# CHECK: vld4.32 {d0[], d1[], d2[], d3[]}, [r4, :128]!
+0xf5 0x0f 0xa4 0xf4
+# CHECK: vld4.32 {d0[], d2[], d4[], d6[]}, [r4, :128], r5
0x1f 0x07 0x40 0xf4
@@ -1852,7 +1895,26 @@
# CHECK: vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]!
0x3d 0x2a 0x5e 0x6c
-# CHECK: vmovvs r2, lr, s29, s30
+# CHECK: vmovvs r2, lr, s27, s28
+
+0x31 0x1a 0x42 0xec
+0x11 0x1a 0x42 0xec
+0x31 0x1a 0x52 0xec
+0x11 0x1a 0x52 0xec
+# CHECK: vmov s3, s4, r1, r2
+# CHECK: vmov s2, s3, r1, r2
+# CHECK: vmov r1, r2, s3, s4
+# CHECK: vmov r1, r2, s2, s3
+
+0x1f 0x1b 0x42 0xec
+0x30 0x1b 0x42 0xec
+0x1f 0x1b 0x52 0xec
+0x30 0x1b 0x52 0xec
+# CHECK: vmov d15, r1, r2
+# CHECK: vmov d16, r1, r2
+# CHECK: vmov r1, r2, d15
+# CHECK: vmov r1, r2, d16
+
0xe9 0x1a 0xb2 0x4e
# CHECK: vcvttmi.f32.f16 s2, s19
@@ -1869,14 +1931,6 @@
# CHECK: vmov.f32 d0, #1.600000e+01
# CHECK: vmov.f32 q0, #1.600000e+01
-# rdar://10798451
-0xe7 0xf9 0x32 0x1d
-# CHECK vld2.8 {d17[], d19[]}, [r7, :16], r2
-0xe7 0xf9 0x3d 0x1d
-# CHECK vld2.8 {d17[], d19[]}, [r7, :16]!
-0xe7 0xf9 0x3f 0x1d
-# CHECK vld2.8 {d17[], d19[]}, [r7, :16]
-
# rdar://11034702
0x0d 0x87 0x04 0xf4
# CHECK: vst1.8 {d8}, [r4]!
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