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-rw-r--r--test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll3
-rw-r--r--test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll3
-rw-r--r--test/ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll25
-rw-r--r--test/ExecutionEngine/MCJIT/eh.ll32
-rw-r--r--test/ExecutionEngine/MCJIT/fpbitcast.ll5
-rw-r--r--test/ExecutionEngine/MCJIT/lit.local.cfg9
-rw-r--r--test/ExecutionEngine/MCJIT/non-extern-addend.ll12
-rw-r--r--test/ExecutionEngine/MCJIT/test-global-ctors.ll1
-rw-r--r--test/ExecutionEngine/fpbitcast.ll5
-rw-r--r--test/ExecutionEngine/lit.local.cfg2
-rw-r--r--test/ExecutionEngine/test-interp-vec-arithm_float.ll20
-rw-r--r--test/ExecutionEngine/test-interp-vec-arithm_int.ll37
-rw-r--r--test/ExecutionEngine/test-interp-vec-loadstore.ll1
-rw-r--r--test/ExecutionEngine/test-interp-vec-logical.ll22
-rw-r--r--test/ExecutionEngine/test-interp-vec-setcond-fp.ll25
-rw-r--r--test/ExecutionEngine/test-interp-vec-setcond-int.ll69
16 files changed, 260 insertions, 11 deletions
diff --git a/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll
index 0ab0274..349db69 100644
--- a/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll
+++ b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll
@@ -1,4 +1,5 @@
-; RUN: %lli -force-interpreter=true %s | grep 1
+; RUN: %lli -force-interpreter=true %s | FileCheck %s
+; CHECK: 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
diff --git a/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll b/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll
index 0912897..9897602 100644
--- a/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll
+++ b/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll
@@ -1,4 +1,5 @@
-; RUN: %lli_mcjit -force-interpreter=true %s | grep 1
+; RUN: %lli_mcjit -force-interpreter=true %s | FileCheck %s
+; CHECK: 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
diff --git a/test/ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll b/test/ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll
new file mode 100644
index 0000000..3f402c5
--- /dev/null
+++ b/test/ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll
@@ -0,0 +1,25 @@
+; RUN: %lli_mcjit %s
+;
+; Verify relocations to global symbols with addend work correctly.
+;
+; Compiled from this C code:
+;
+; int test[2] = { -1, 0 };
+; int *p = &test[1];
+;
+; int main (void)
+; {
+; return *p;
+; }
+;
+
+@test = global [2 x i32] [i32 -1, i32 0], align 4
+@p = global i32* getelementptr inbounds ([2 x i32]* @test, i64 0, i64 1), align 8
+
+define i32 @main() {
+entry:
+ %0 = load i32** @p, align 8
+ %1 = load i32* %0, align 4
+ ret i32 %1
+}
+
diff --git a/test/ExecutionEngine/MCJIT/eh.ll b/test/ExecutionEngine/MCJIT/eh.ll
new file mode 100644
index 0000000..c213573
--- /dev/null
+++ b/test/ExecutionEngine/MCJIT/eh.ll
@@ -0,0 +1,32 @@
+; RUN: %lli_mcjit %s
+; XFAIL: arm, cygwin, win32, mingw
+declare i8* @__cxa_allocate_exception(i64)
+declare void @__cxa_throw(i8*, i8*, i8*)
+declare i32 @__gxx_personality_v0(...)
+declare void @__cxa_end_catch()
+declare i8* @__cxa_begin_catch(i8*)
+
+@_ZTIi = external constant i8*
+
+define void @throwException() {
+ %exception = tail call i8* @__cxa_allocate_exception(i64 4)
+ call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
+ unreachable
+}
+
+define i32 @main() {
+entry:
+ invoke void @throwException()
+ to label %try.cont unwind label %lpad
+
+lpad:
+ %p = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %e = extractvalue { i8*, i32 } %p, 0
+ call i8* @__cxa_begin_catch(i8* %e)
+ call void @__cxa_end_catch()
+ br label %try.cont
+
+try.cont:
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/MCJIT/fpbitcast.ll b/test/ExecutionEngine/MCJIT/fpbitcast.ll
index fb5ab6f..ea39617 100644
--- a/test/ExecutionEngine/MCJIT/fpbitcast.ll
+++ b/test/ExecutionEngine/MCJIT/fpbitcast.ll
@@ -1,5 +1,6 @@
-; RUN: %lli_mcjit -force-interpreter=true %s | grep 40091eb8
-;
+; RUN: %lli_mcjit -force-interpreter=true %s | FileCheck %s
+; CHECK: 40091eb8
+
define i32 @test(double %x) {
entry:
%x46.i = bitcast double %x to i64
diff --git a/test/ExecutionEngine/MCJIT/lit.local.cfg b/test/ExecutionEngine/MCJIT/lit.local.cfg
index fc29f65..30ed4e8 100644
--- a/test/ExecutionEngine/MCJIT/lit.local.cfg
+++ b/test/ExecutionEngine/MCJIT/lit.local.cfg
@@ -8,16 +8,17 @@ def getRoot(config):
root = getRoot(config)
targets = set(root.targets_to_build.split())
-if ('X86' in targets) | ('ARM' in targets) | ('Mips' in targets) | \
- ('PowerPC' in targets):
+if ('X86' in targets) | ('AArch64' in targets) | ('ARM' in targets) | \
+ ('Mips' in targets) | ('PowerPC' in targets) | ('SystemZ' in targets):
config.unsupported = False
else:
config.unsupported = True
-if root.host_arch not in ['x86', 'x86_64', 'ARM', 'Mips', 'PowerPC']:
+if root.host_arch not in ['i386', 'x86', 'x86_64',
+ 'AArch64', 'ARM', 'Mips', 'PowerPC', 'SystemZ']:
config.unsupported = True
-if root.host_os in ['Darwin']:
+if 'i386-apple-darwin' in root.target_triple:
config.unsupported = True
if 'powerpc' in root.target_triple and not 'powerpc64' in root.target_triple:
diff --git a/test/ExecutionEngine/MCJIT/non-extern-addend.ll b/test/ExecutionEngine/MCJIT/non-extern-addend.ll
new file mode 100644
index 0000000..3a6e634
--- /dev/null
+++ b/test/ExecutionEngine/MCJIT/non-extern-addend.ll
@@ -0,0 +1,12 @@
+; RUN: %lli_mcjit %s > /dev/null
+
+define i32 @foo(i32 %X, i32 %Y, double %A) {
+ %cond212 = fcmp ueq double %A, 2.000000e+00 ; <i1> [#uses=1]
+ %cast110 = zext i1 %cond212 to i32 ; <i32> [#uses=1]
+ ret i32 %cast110
+}
+
+define i32 @main() {
+ %reg212 = call i32 @foo( i32 0, i32 1, double 1.000000e+00 ) ; <i32> [#uses=1]
+ ret i32 %reg212
+}
diff --git a/test/ExecutionEngine/MCJIT/test-global-ctors.ll b/test/ExecutionEngine/MCJIT/test-global-ctors.ll
index 4510d9b..947d8f5 100644
--- a/test/ExecutionEngine/MCJIT/test-global-ctors.ll
+++ b/test/ExecutionEngine/MCJIT/test-global-ctors.ll
@@ -1,4 +1,5 @@
; RUN: %lli_mcjit %s > /dev/null
+; XFAIL: darwin
@var = global i32 1, align 4
@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @ctor_func }]
@llvm.global_dtors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @dtor_func }]
diff --git a/test/ExecutionEngine/fpbitcast.ll b/test/ExecutionEngine/fpbitcast.ll
index fa84be4..e6d06f8 100644
--- a/test/ExecutionEngine/fpbitcast.ll
+++ b/test/ExecutionEngine/fpbitcast.ll
@@ -1,5 +1,6 @@
-; RUN: %lli -force-interpreter=true %s | grep 40091eb8
-;
+; RUN: %lli -force-interpreter=true %s | FileCheck %s
+; CHECK: 40091eb8
+
define i32 @test(double %x) {
entry:
%x46.i = bitcast double %x to i64
diff --git a/test/ExecutionEngine/lit.local.cfg b/test/ExecutionEngine/lit.local.cfg
index 1f8ae69..b6945ad 100644
--- a/test/ExecutionEngine/lit.local.cfg
+++ b/test/ExecutionEngine/lit.local.cfg
@@ -7,7 +7,7 @@ def getRoot(config):
root = getRoot(config)
-if root.host_arch in ['PowerPC', 'AArch64']:
+if root.host_arch in ['PowerPC', 'AArch64', 'SystemZ']:
config.unsupported = True
if 'hexagon' in root.target_triple:
diff --git a/test/ExecutionEngine/test-interp-vec-arithm_float.ll b/test/ExecutionEngine/test-interp-vec-arithm_float.ll
new file mode 100644
index 0000000..d7f4ac9
--- /dev/null
+++ b/test/ExecutionEngine/test-interp-vec-arithm_float.ll
@@ -0,0 +1,20 @@
+; RUN: %lli %s > /dev/null
+
+
+define i32 @main() {
+
+ %A_float = fadd <4 x float> <float 0.0, float 11.0, float 22.0, float 33.0>, <float 44.0, float 55.0, float 66.0, float 77.0>
+ %B_float = fsub <4 x float> %A_float, <float 88.0, float 99.0, float 100.0, float 111.0>
+ %C_float = fmul <4 x float> %B_float, %B_float
+ %D_float = fdiv <4 x float> %C_float, %B_float
+ %E_float = frem <4 x float> %D_float, %A_float
+
+
+ %A_double = fadd <3 x double> <double 0.0, double 111.0, double 222.0>, <double 444.0, double 555.0, double 665.0>
+ %B_double = fsub <3 x double> %A_double, <double 888.0, double 999.0, double 1001.0>
+ %C_double = fmul <3 x double> %B_double, %B_double
+ %D_double = fdiv <3 x double> %C_double, %B_double
+ %E_double = frem <3 x double> %D_double, %A_double
+
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/test-interp-vec-arithm_int.ll b/test/ExecutionEngine/test-interp-vec-arithm_int.ll
new file mode 100644
index 0000000..0ee14fe
--- /dev/null
+++ b/test/ExecutionEngine/test-interp-vec-arithm_int.ll
@@ -0,0 +1,37 @@
+; RUN: %lli %s > /dev/null
+
+define i32 @main() {
+ %A_i8 = add <5 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4>, <i8 12, i8 34, i8 56, i8 78, i8 89>
+ %B_i8 = sub <5 x i8> %A_i8, <i8 11, i8 22, i8 33, i8 44, i8 55>
+ %C_i8 = mul <5 x i8> %B_i8, %B_i8
+ %D_i8 = sdiv <5 x i8> %C_i8, %C_i8
+ %E_i8 = srem <5 x i8> %D_i8, %D_i8
+ %F_i8 = udiv <5 x i8> <i8 5, i8 6, i8 7, i8 8, i8 9>, <i8 6, i8 5, i8 4, i8 3, i8 2>
+ %G_i8 = urem <5 x i8> <i8 6, i8 7, i8 8, i8 9, i8 10>, <i8 5, i8 4, i8 2, i8 2, i8 1>
+
+ %A_i16 = add <4 x i16> <i16 0, i16 1, i16 2, i16 3>, <i16 123, i16 345, i16 567, i16 789>
+ %B_i16 = sub <4 x i16> %A_i16, <i16 111, i16 222, i16 333, i16 444>
+ %C_i16 = mul <4 x i16> %B_i16, %B_i16
+ %D_i16 = sdiv <4 x i16> %C_i16, %C_i16
+ %E_i16 = srem <4 x i16> %D_i16, %D_i16
+ %F_i16 = udiv <4 x i16> <i16 5, i16 6, i16 7, i16 8>, <i16 6, i16 5, i16 4, i16 3>
+ %G_i16 = urem <4 x i16> <i16 6, i16 7, i16 8, i16 9>, <i16 5, i16 4, i16 3, i16 2>
+
+ %A_i32 = add <3 x i32> <i32 0, i32 1, i32 2>, <i32 1234, i32 3456, i32 5678>
+ %B_i32 = sub <3 x i32> %A_i32, <i32 1111, i32 2222, i32 3333>
+ %C_i32 = mul <3 x i32> %B_i32, %B_i32
+ %D_i32 = sdiv <3 x i32> %C_i32, %C_i32
+ %E_i32 = srem <3 x i32> %D_i32, %D_i32
+ %F_i32 = udiv <3 x i32> <i32 5, i32 6, i32 7>, <i32 6, i32 5, i32 4>
+ %G_i32 = urem <3 x i32> <i32 6, i32 7, i32 8>, <i32 5, i32 4, i32 3>
+
+ %A_i64 = add <2 x i64> <i64 0, i64 1>, <i64 12455, i64 34567>
+ %B_i64 = sub <2 x i64> %A_i64, <i64 11111, i64 22222>
+ %C_i64 = mul <2 x i64> %B_i64, %B_i64
+ %D_i64 = sdiv <2 x i64> %C_i64, %C_i64
+ %E_i64 = srem <2 x i64> %D_i64, %D_i64
+ %F_i64 = udiv <2 x i64> <i64 5, i64 6>, <i64 6, i64 5>
+ %G_i64 = urem <2 x i64> <i64 6, i64 7>, <i64 5, i64 3>
+
+ ret i32 0
+}
diff --git a/test/ExecutionEngine/test-interp-vec-loadstore.ll b/test/ExecutionEngine/test-interp-vec-loadstore.ll
index e9f5b44..e500711 100644
--- a/test/ExecutionEngine/test-interp-vec-loadstore.ll
+++ b/test/ExecutionEngine/test-interp-vec-loadstore.ll
@@ -1,4 +1,5 @@
; RUN: %lli -force-interpreter=true %s | FileCheck %s
+; XFAIL: mips
; CHECK: 1
; CHECK: 2
; CHECK: 3
diff --git a/test/ExecutionEngine/test-interp-vec-logical.ll b/test/ExecutionEngine/test-interp-vec-logical.ll
new file mode 100644
index 0000000..f8f1f0d
--- /dev/null
+++ b/test/ExecutionEngine/test-interp-vec-logical.ll
@@ -0,0 +1,22 @@
+; RUN: %lli %s > /dev/null
+
+define i32 @main() {
+ %A_i8 = and <5 x i8> <i8 4, i8 4, i8 4, i8 4, i8 4>, <i8 8, i8 8, i8 8, i8 8, i8 8>
+ %B_i8 = or <5 x i8> %A_i8, <i8 7, i8 7, i8 7, i8 7, i8 7>
+ %C_i8 = xor <5 x i8> %B_i8, %A_i8
+
+ %A_i16 = and <4 x i16> <i16 4, i16 4, i16 4, i16 4>, <i16 8, i16 8, i16 8, i16 8>
+ %B_i16 = or <4 x i16> %A_i16, <i16 7, i16 7, i16 7, i16 7>
+ %C_i16 = xor <4 x i16> %B_i16, %A_i16
+
+ %A_i32 = and <3 x i32> <i32 4, i32 4, i32 4>, <i32 8, i32 8, i32 8>
+ %B_i32 = or <3 x i32> %A_i32, <i32 7, i32 7, i32 7>
+ %C_i32 = xor <3 x i32> %B_i32, %A_i32
+
+ %A_i64 = and <2 x i64> <i64 4, i64 4>, <i64 8, i64 8>
+ %B_i64 = or <2 x i64> %A_i64, <i64 7, i64 7>
+ %C_i64 = xor <2 x i64> %B_i64, %A_i64
+
+ ret i32 0
+}
+
diff --git a/test/ExecutionEngine/test-interp-vec-setcond-fp.ll b/test/ExecutionEngine/test-interp-vec-setcond-fp.ll
new file mode 100644
index 0000000..8b9b7c7
--- /dev/null
+++ b/test/ExecutionEngine/test-interp-vec-setcond-fp.ll
@@ -0,0 +1,25 @@
+; RUN: %lli %s > /dev/null
+
+define i32 @main() {
+ %double1 = fadd <2 x double> <double 0.0, double 0.0>, <double 0.0, double 0.0>
+ %double2 = fadd <2 x double> <double 0.0, double 0.0>, <double 0.0, double 0.0>
+ %float1 = fadd <3 x float> <float 0.0, float 0.0, float 0.0>, <float 0.0, float 0.0, float 0.0>
+ %float2 = fadd <3 x float> <float 0.0, float 0.0, float 0.0>, <float 0.0, float 0.0, float 0.0>
+ %test49 = fcmp oeq <3 x float> %float1, %float2
+ %test50 = fcmp oge <3 x float> %float1, %float2
+ %test51 = fcmp ogt <3 x float> %float1, %float2
+ %test52 = fcmp ole <3 x float> %float1, %float2
+ %test53 = fcmp olt <3 x float> %float1, %float2
+ %test54 = fcmp une <3 x float> %float1, %float2
+
+ %test55 = fcmp oeq <2 x double> %double1, %double2
+ %test56 = fcmp oge <2 x double> %double1, %double2
+ %test57 = fcmp ogt <2 x double> %double1, %double2
+ %test58 = fcmp ole <2 x double> %double1, %double2
+ %test59 = fcmp olt <2 x double> %double1, %double2
+ %test60 = fcmp une <2 x double> %double1, %double2
+
+ ret i32 0
+}
+
+
diff --git a/test/ExecutionEngine/test-interp-vec-setcond-int.ll b/test/ExecutionEngine/test-interp-vec-setcond-int.ll
new file mode 100644
index 0000000..4c89109
--- /dev/null
+++ b/test/ExecutionEngine/test-interp-vec-setcond-int.ll
@@ -0,0 +1,69 @@
+; RUN: %lli %s > /dev/null
+
+define i32 @main() {
+ %int1 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0>
+ %int2 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0>
+ %long1 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0>
+ %long2 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0>
+ %sbyte1 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0>
+ %sbyte2 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0>
+ %short1 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0>
+ %short2 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0>
+ %ubyte1 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0>
+ %ubyte2 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0>
+ %uint1 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0>
+ %uint2 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0>
+ %ulong1 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0>
+ %ulong2 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0>
+ %ushort1 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0>
+ %ushort2 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0>
+ %test1 = icmp eq <5 x i8> %ubyte1, %ubyte2
+ %test2 = icmp uge <5 x i8> %ubyte1, %ubyte2
+ %test3 = icmp ugt <5 x i8> %ubyte1, %ubyte2
+ %test4 = icmp ule <5 x i8> %ubyte1, %ubyte2
+ %test5 = icmp ult <5 x i8> %ubyte1, %ubyte2
+ %test6 = icmp ne <5 x i8> %ubyte1, %ubyte2
+ %test7 = icmp eq <4 x i16> %ushort1, %ushort2
+ %test8 = icmp uge <4 x i16> %ushort1, %ushort2
+ %test9 = icmp ugt <4 x i16> %ushort1, %ushort2
+ %test10 = icmp ule <4 x i16> %ushort1, %ushort2
+ %test11 = icmp ult <4 x i16> %ushort1, %ushort2
+ %test12 = icmp ne <4 x i16> %ushort1, %ushort2
+ %test13 = icmp eq <3 x i32> %uint1, %uint2
+ %test14 = icmp uge <3 x i32> %uint1, %uint2
+ %test15 = icmp ugt <3 x i32> %uint1, %uint2
+ %test16 = icmp ule <3 x i32> %uint1, %uint2
+ %test17 = icmp ult <3 x i32> %uint1, %uint2
+ %test18 = icmp ne <3 x i32> %uint1, %uint2
+ %test19 = icmp eq <2 x i64> %ulong1, %ulong2
+ %test20 = icmp uge <2 x i64> %ulong1, %ulong2
+ %test21 = icmp ugt <2 x i64> %ulong1, %ulong2
+ %test22 = icmp ule <2 x i64> %ulong1, %ulong2
+ %test23 = icmp ult <2 x i64> %ulong1, %ulong2
+ %test24 = icmp ne <2 x i64> %ulong1, %ulong2
+ %test25 = icmp eq <5 x i8> %sbyte1, %sbyte2
+ %test26 = icmp sge <5 x i8> %sbyte1, %sbyte2
+ %test27 = icmp sgt <5 x i8> %sbyte1, %sbyte2
+ %test28 = icmp sle <5 x i8> %sbyte1, %sbyte2
+ %test29 = icmp slt <5 x i8> %sbyte1, %sbyte2
+ %test30 = icmp ne <5 x i8> %sbyte1, %sbyte2
+ %test31 = icmp eq <4 x i16> %short1, %short2
+ %test32 = icmp sge <4 x i16> %short1, %short2
+ %test33 = icmp sgt <4 x i16> %short1, %short2
+ %test34 = icmp sle <4 x i16> %short1, %short2
+ %test35 = icmp slt <4 x i16> %short1, %short2
+ %test36 = icmp ne <4 x i16> %short1, %short2
+ %test37 = icmp eq <3 x i32> %int1, %int2
+ %test38 = icmp sge <3 x i32> %int1, %int2
+ %test39 = icmp sgt <3 x i32> %int1, %int2
+ %test40 = icmp sle <3 x i32> %int1, %int2
+ %test41 = icmp slt <3 x i32> %int1, %int2
+ %test42 = icmp ne <3 x i32> %int1, %int2
+ %test43 = icmp eq <2 x i64> %long1, %long2
+ %test44 = icmp sge <2 x i64> %long1, %long2
+ %test45 = icmp sgt <2 x i64> %long1, %long2
+ %test46 = icmp sle <2 x i64> %long1, %long2
+ %test47 = icmp slt <2 x i64> %long1, %long2
+ %test48 = icmp ne <2 x i64> %long1, %long2
+ ret i32 0
+}
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