diff options
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/ARM/tail-opts.ll | 64 | ||||
-rw-r--r-- | test/CodeGen/Mips/2008-08-03-ReturnDouble.ll | 1 | ||||
-rw-r--r-- | test/CodeGen/Thumb/pop.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Thumb2/2009-07-21-ISelBug.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Thumb2/large-stack.ll | 6 | ||||
-rw-r--r-- | test/CodeGen/Thumb2/ldr-str-imm12.ll | 6 | ||||
-rw-r--r-- | test/CodeGen/X86/2009-11-18-TwoAddrKill.ll | 29 | ||||
-rw-r--r-- | test/CodeGen/X86/unaligned-load.ll | 28 | ||||
-rw-r--r-- | test/CodeGen/XCore/indirectbr.ll | 45 |
10 files changed, 178 insertions, 7 deletions
diff --git a/test/CodeGen/ARM/tail-opts.ll b/test/CodeGen/ARM/tail-opts.ll new file mode 100644 index 0000000..1a867a9 --- /dev/null +++ b/test/CodeGen/ARM/tail-opts.ll @@ -0,0 +1,64 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 -asm-verbose=false | FileCheck %s + +declare void @bar(i32) +declare void @car(i32) +declare void @dar(i32) +declare void @ear(i32) +declare void @far(i32) +declare i1 @qux() + +@GHJK = global i32 0 + +declare i8* @choose(i8*, i8*); + +; BranchFolding should tail-duplicate the indirect jump to avoid +; redundant branching. + +; CHECK: tail_duplicate_me: +; CHECK: qux +; CHECK: qux +; CHECK: ldr r{{.}}, LCPI +; CHECK: str r +; CHECK-NEXT: bx r +; CHECK: ldr r{{.}}, LCPI +; CHECK: str r +; CHECK-NEXT: bx r +; CHECK: ldr r{{.}}, LCPI +; CHECK: str r +; CHECK-NEXT: bx r + +define void @tail_duplicate_me() nounwind { +entry: + %a = call i1 @qux() + %c = call i8* @choose(i8* blockaddress(@tail_duplicate_me, %return), + i8* blockaddress(@tail_duplicate_me, %altret)) + br i1 %a, label %A, label %next +next: + %b = call i1 @qux() + br i1 %b, label %B, label %C + +A: + call void @bar(i32 0) + store i32 0, i32* @GHJK + br label %M + +B: + call void @car(i32 1) + store i32 0, i32* @GHJK + br label %M + +C: + call void @dar(i32 2) + store i32 0, i32* @GHJK + br label %M + +M: + indirectbr i8* %c, [label %return, label %altret] + +return: + call void @ear(i32 1000) + ret void +altret: + call void @far(i32 1001) + ret void +} diff --git a/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll b/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll index 1244a3e..c41d521 100644 --- a/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll +++ b/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll @@ -1,7 +1,6 @@ ; Double return in abicall (default) ; RUN: llc < %s -march=mips ; PR2615 -; XFAIL: * define double @main(...) { entry: diff --git a/test/CodeGen/Thumb/pop.ll b/test/CodeGen/Thumb/pop.ll index c5e86ad..0e1b2e5 100644 --- a/test/CodeGen/Thumb/pop.ll +++ b/test/CodeGen/Thumb/pop.ll @@ -4,7 +4,7 @@ define arm_apcscc void @t(i8* %a, ...) nounwind { ; CHECK: t: ; CHECK: pop {r3} -; CHECK-NEXT: add sp, #3 * 4 +; CHECK-NEXT: add sp, #12 ; CHECK-NEXT: bx r3 entry: %a.addr = alloca i8* diff --git a/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll index ec649c3..ef076a4 100644 --- a/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll +++ b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll @@ -6,7 +6,7 @@ define arm_apcscc i32 @t(i32, ...) nounwind { entry: ; CHECK: t: -; CHECK: add r7, sp, #3 * 4 +; CHECK: add r7, sp, #12 %1 = load i8** undef, align 4 ; <i8*> [#uses=3] %2 = getelementptr i8* %1, i32 4 ; <i8*> [#uses=1] %3 = getelementptr i8* %1, i32 8 ; <i8*> [#uses=1] diff --git a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll index 03f9fac..4077535 100644 --- a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll +++ b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll @@ -6,7 +6,7 @@ define hidden arm_aapcscc i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind entry: ; CHECK: __gcov_execlp: ; CHECK: mov sp, r7 -; CHECK: sub sp, #1 * 4 +; CHECK: sub sp, #4 call arm_aapcscc void @__gcov_flush() nounwind br i1 undef, label %bb5, label %bb diff --git a/test/CodeGen/Thumb2/large-stack.ll b/test/CodeGen/Thumb2/large-stack.ll index 18d507c..6f59961 100644 --- a/test/CodeGen/Thumb2/large-stack.ll +++ b/test/CodeGen/Thumb2/large-stack.ll @@ -2,7 +2,7 @@ define void @test1() { ; CHECK: test1: -; CHECK: sub sp, #64 * 4 +; CHECK: sub sp, #256 %tmp = alloca [ 64 x i32 ] , align 4 ret void } @@ -10,7 +10,7 @@ define void @test1() { define void @test2() { ; CHECK: test2: ; CHECK: sub.w sp, sp, #4160 -; CHECK: sub sp, #2 * 4 +; CHECK: sub sp, #8 %tmp = alloca [ 4168 x i8 ] , align 4 ret void } @@ -18,7 +18,7 @@ define void @test2() { define i32 @test3() { ; CHECK: test3: ; CHECK: sub.w sp, sp, #805306368 -; CHECK: sub sp, #6 * 4 +; CHECK: sub sp, #24 %retval = alloca i32, align 4 %tmp = alloca i32, align 4 %a = alloca [805306369 x i8], align 16 diff --git a/test/CodeGen/Thumb2/ldr-str-imm12.ll b/test/CodeGen/Thumb2/ldr-str-imm12.ll index 4c8ffe8..7cbe260 100644 --- a/test/CodeGen/Thumb2/ldr-str-imm12.ll +++ b/test/CodeGen/Thumb2/ldr-str-imm12.ll @@ -49,6 +49,12 @@ bb119: ; preds = %bb20, %bb20 unreachable bb420: ; preds = %bb20, %bb20 +; CHECK: bb420 +; CHECK: str r{{[0-7]}}, [sp] +; CHECK: str r{{[0-7]}}, [sp, #+4] +; CHECK: str r{{[0-7]}}, [sp, #+8] +; CHECK: ldr r{{[0-7]}}, [sp, #+28] +; CHECK: str r{{[0-7]}}, [sp, #+24] store %union.rec* null, %union.rec** @zz_hold, align 4 store %union.rec* null, %union.rec** @zz_res, align 4 store %union.rec* %x, %union.rec** @zz_hold, align 4 diff --git a/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll b/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll new file mode 100644 index 0000000..0edaa70 --- /dev/null +++ b/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s +; PR 5300 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-pc-linux-gnu" + +@g_296 = external global i8, align 1 ; <i8*> [#uses=1] + +define noalias i8** @func_31(i32** nocapture %int8p_33, i8** nocapture %p_34, i8* nocapture %p_35) nounwind { +entry: + %cmp.i = icmp sgt i16 undef, 234 ; <i1> [#uses=1] + %tmp17 = select i1 %cmp.i, i16 undef, i16 0 ; <i16> [#uses=2] + %conv8 = trunc i16 %tmp17 to i8 ; <i8> [#uses=3] + br i1 undef, label %cond.false.i29, label %land.lhs.true.i + +land.lhs.true.i: ; preds = %entry + %tobool5.i = icmp eq i32 undef, undef ; <i1> [#uses=1] + br i1 %tobool5.i, label %cond.false.i29, label %bar.exit + +cond.false.i29: ; preds = %land.lhs.true.i, %entry + %tmp = sub i8 0, %conv8 ; <i8> [#uses=1] + %mul.i = and i8 %conv8, %tmp ; <i8> [#uses=1] + br label %bar.exit + +bar.exit: ; preds = %cond.false.i29, %land.lhs.true.i + %call1231 = phi i8 [ %mul.i, %cond.false.i29 ], [ %conv8, %land.lhs.true.i ] ; <i8> [#uses=0] + %conv21 = trunc i16 %tmp17 to i8 ; <i8> [#uses=1] + store i8 %conv21, i8* @g_296 + ret i8** undef +} diff --git a/test/CodeGen/X86/unaligned-load.ll b/test/CodeGen/X86/unaligned-load.ll new file mode 100644 index 0000000..7dddcda --- /dev/null +++ b/test/CodeGen/X86/unaligned-load.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=dynamic-no-pic | not grep {movaps\t_.str3} +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=dynamic-no-pic | FileCheck %s + +@.str1 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 8 +@.str3 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, 2'ND STRING\00", align 8 + +define void @func() nounwind ssp { +entry: + %String2Loc = alloca [31 x i8], align 1 + br label %bb + +bb: + %String2Loc9 = getelementptr inbounds [31 x i8]* %String2Loc, i64 0, i64 0 + call void @llvm.memcpy.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8]* @.str3, i64 0, i64 0), i64 31, i32 1) +; CHECK: movups _.str3 + br label %bb + +return: + ret void +} + +declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind + +; CHECK: .align 3 +; CHECK-NEXT: _.str1: +; CHECK-NEXT: .asciz "DHRYSTONE PROGRAM, SOME STRING" +; CHECK-NEXT: .align 3 +; CHECK-NEXT: _.str3: diff --git a/test/CodeGen/XCore/indirectbr.ll b/test/CodeGen/XCore/indirectbr.ll new file mode 100644 index 0000000..a8f00cc --- /dev/null +++ b/test/CodeGen/XCore/indirectbr.ll @@ -0,0 +1,45 @@ +; RUN: llc < %s -march=xcore | FileCheck %s + +@nextaddr = global i8* null ; <i8**> [#uses=2] +@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1] + +define internal i32 @foo(i32 %i) nounwind { +; CHECK: foo: +entry: + %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2] + %1 = icmp eq i8* %0, null ; <i1> [#uses=1] + br i1 %1, label %bb3, label %bb2 + +bb2: ; preds = %entry, %bb3 + %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1] +; CHECK: bau + indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1] + +bb3: ; preds = %entry + %2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1] + %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1] + br label %bb2 + +L5: ; preds = %bb2 + br label %L4 + +L4: ; preds = %L5, %bb2 + %res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1] + br label %L3 + +L3: ; preds = %L4, %bb2 + %res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1] + br label %L2 + +L2: ; preds = %L3, %bb2 + %res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1] + %phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1] + br label %L1 + +L1: ; preds = %L2, %bb2 + %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1] +; CHECK: ldap r11, .LBA3_foo_L5 +; CHECK: stw r11, dp[nextaddr] + store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4 + ret i32 %res.3 +} |