diff options
Diffstat (limited to 'test/CodeGen')
34 files changed, 615 insertions, 95 deletions
diff --git a/test/CodeGen/2009-10-20-GlobalDebug.c b/test/CodeGen/2009-10-20-GlobalDebug.c index 3c46bea..42f020e 100644 --- a/test/CodeGen/2009-10-20-GlobalDebug.c +++ b/test/CodeGen/2009-10-20-GlobalDebug.c @@ -1,3 +1,4 @@ +// REQUIRES: x86-registered-target // RUN: %clang -ccc-host-triple i386-apple-darwin10 -S -g -dA %s -o - | FileCheck %s int global; // CHECK: ascii "localstatic" ## DW_AT_name diff --git a/test/CodeGen/altivec.c b/test/CodeGen/altivec.c index ec1efd9..c3b1f42 100644 --- a/test/CodeGen/altivec.c +++ b/test/CodeGen/altivec.c @@ -23,7 +23,7 @@ void test2() // Check pre/post increment/decrement void test3() { vector int vi; - vi++; // CHECK: add nsw <4 x i32> {{.*}} <i32 1, i32 1, i32 1, i32 1> + vi++; // CHECK: add <4 x i32> {{.*}} <i32 1, i32 1, i32 1, i32 1> vector unsigned int vui; --vui; // CHECK: add <4 x i32> {{.*}} <i32 -1, i32 -1, i32 -1, i32 -1> vector float vf; diff --git a/test/CodeGen/arm-asm.c b/test/CodeGen/arm-asm.c new file mode 100644 index 0000000..9b1082a --- /dev/null +++ b/test/CodeGen/arm-asm.c @@ -0,0 +1,7 @@ +// RUN: %clang_cc1 -triple thumb %s -emit-llvm -o - | FileCheck %s +int t1() { + static float k = 1.0f; + // CHECK: flds s15 + __asm__ volatile ("flds s15, %[k] \n" :: [k] "Uv" (k) : "s15"); + return 0; +} diff --git a/test/CodeGen/asm-errors.c b/test/CodeGen/asm-errors.c index c5b36c7..cd4d1ff 100644 --- a/test/CodeGen/asm-errors.c +++ b/test/CodeGen/asm-errors.c @@ -1,3 +1,4 @@ +// REQUIRES: x86-registered-target // RUN: not %clang_cc1 -triple i386-apple-darwin10 -emit-obj %s -o /dev/null > %t 2>&1 // RUN: FileCheck %s < %t diff --git a/test/CodeGen/asm-label.c b/test/CodeGen/asm-label.c new file mode 100644 index 0000000..7be2ad3 --- /dev/null +++ b/test/CodeGen/asm-label.c @@ -0,0 +1,12 @@ +// RUN: %clang_cc1 -triple=i686-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=LINUX +// RUN: %clang_cc1 -triple=i686-apple-darwin9 -emit-llvm %s -o - | FileCheck %s --check-prefix=DARWIN + +char *strerror(int) asm("alias"); + +void test(void) +{ + strerror(-1); +} + +// LINUX: declare i8* @alias(i32) +// DARWIN: declare i8* @"\01alias"(i32) diff --git a/test/CodeGen/available-externally-suppress.c b/test/CodeGen/available-externally-suppress.c index 747d3cd..46b6e74 100644 --- a/test/CodeGen/available-externally-suppress.c +++ b/test/CodeGen/available-externally-suppress.c @@ -11,17 +11,17 @@ void test() { f0(17); } -inline int __attribute__((always_inline)) f1(int x) { +inline int __attribute__((always_inline)) f1(int x) { int blarg = 0; for (int i = 0; i < x; ++i) blarg = blarg + x * i; - return blarg; + return blarg; } // CHECK: @test1 -int test1(int x) { +int test1(int x) { // CHECK: br i1 - // CHECK-NOT: call + // CHECK-NOT: call {{.*}} @f1 // CHECK: ret i32 - return f1(x); + return f1(x); } diff --git a/test/CodeGen/avx-cmp-builtins.c b/test/CodeGen/avx-cmp-builtins.c new file mode 100644 index 0000000..1ac1c31 --- /dev/null +++ b/test/CodeGen/avx-cmp-builtins.c @@ -0,0 +1,46 @@ +// RUN: %clang_cc1 %s -O3 -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s + +// Don't include mm_malloc.h, it's system specific. +#define __MM_MALLOC_H + +#include <immintrin.h> + +// +// Test LLVM IR codegen of cmpXY instructions +// + +__m128d test_cmp_pd(__m128d a, __m128d b) { + // Expects that the third argument in LLVM IR is immediate expression + // CHECK: @llvm.x86.sse2.cmp.pd({{.*}}, i8 13) + return _mm_cmp_pd(a, b, _CMP_GE_OS); +} + +__m128d test_cmp_ps(__m128 a, __m128 b) { + // Expects that the third argument in LLVM IR is immediate expression + // CHECK: @llvm.x86.sse.cmp.ps({{.*}}, i8 13) + return _mm_cmp_ps(a, b, _CMP_GE_OS); +} + +__m256d test_cmp_pd256(__m256d a, __m256d b) { + // Expects that the third argument in LLVM IR is immediate expression + // CHECK: @llvm.x86.avx.cmp.pd.256({{.*}}, i8 13) + return _mm256_cmp_pd(a, b, _CMP_GE_OS); +} + +__m256d test_cmp_ps256(__m256 a, __m256 b) { + // Expects that the third argument in LLVM IR is immediate expression + // CHECK: @llvm.x86.avx.cmp.ps.256({{.*}}, i8 13) + return _mm256_cmp_ps(a, b, _CMP_GE_OS); +} + +__m128d test_cmp_sd(__m128d a, __m128d b) { + // Expects that the third argument in LLVM IR is immediate expression + // CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 13) + return _mm_cmp_sd(a, b, _CMP_GE_OS); +} + +__m128d test_cmp_ss(__m128 a, __m128 b) { + // Expects that the third argument in LLVM IR is immediate expression + // CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 13) + return _mm_cmp_ss(a, b, _CMP_GE_OS); +} diff --git a/test/CodeGen/builtins-ppc-altivec.c b/test/CodeGen/builtins-ppc-altivec.c index 586f113..b12ff01 100644 --- a/test/CodeGen/builtins-ppc-altivec.c +++ b/test/CodeGen/builtins-ppc-altivec.c @@ -44,13 +44,13 @@ int res_f; void test1() { /* vec_abs */ - vsc = vec_abs(vsc); // CHECK: sub nsw <16 x i8> zeroinitializer + vsc = vec_abs(vsc); // CHECK: sub <16 x i8> zeroinitializer // CHECK: @llvm.ppc.altivec.vmaxsb - vs = vec_abs(vs); // CHECK: sub nsw <8 x i16> zeroinitializer + vs = vec_abs(vs); // CHECK: sub <8 x i16> zeroinitializer // CHECK: @llvm.ppc.altivec.vmaxsh - vi = vec_abs(vi); // CHECK: sub nsw <4 x i32> zeroinitializer + vi = vec_abs(vi); // CHECK: sub <4 x i32> zeroinitializer // CHECK: @llvm.ppc.altivec.vmaxsw vf = vec_abs(vf); // CHECK: and <4 x i32> @@ -66,40 +66,40 @@ void test1() { // CHECK: @llvm.ppc.altivec.vmaxsw /* vec_add */ - res_vsc = vec_add(vsc, vsc); // CHECK: add nsw <16 x i8> - res_vsc = vec_add(vbc, vsc); // CHECK: add nsw <16 x i8> - res_vsc = vec_add(vsc, vbc); // CHECK: add nsw <16 x i8> + res_vsc = vec_add(vsc, vsc); // CHECK: add <16 x i8> + res_vsc = vec_add(vbc, vsc); // CHECK: add <16 x i8> + res_vsc = vec_add(vsc, vbc); // CHECK: add <16 x i8> res_vuc = vec_add(vuc, vuc); // CHECK: add <16 x i8> res_vuc = vec_add(vbc, vuc); // CHECK: add <16 x i8> res_vuc = vec_add(vuc, vbc); // CHECK: add <16 x i8> - res_vs = vec_add(vs, vs); // CHECK: add nsw <8 x i16> - res_vs = vec_add(vbs, vs); // CHECK: add nsw <8 x i16> - res_vs = vec_add(vs, vbs); // CHECK: add nsw <8 x i16> + res_vs = vec_add(vs, vs); // CHECK: add <8 x i16> + res_vs = vec_add(vbs, vs); // CHECK: add <8 x i16> + res_vs = vec_add(vs, vbs); // CHECK: add <8 x i16> res_vus = vec_add(vus, vus); // CHECK: add <8 x i16> res_vus = vec_add(vbs, vus); // CHECK: add <8 x i16> res_vus = vec_add(vus, vbs); // CHECK: add <8 x i16> - res_vi = vec_add(vi, vi); // CHECK: add nsw <4 x i32> - res_vi = vec_add(vbi, vi); // CHECK: add nsw <4 x i32> - res_vi = vec_add(vi, vbi); // CHECK: add nsw <4 x i32> + res_vi = vec_add(vi, vi); // CHECK: add <4 x i32> + res_vi = vec_add(vbi, vi); // CHECK: add <4 x i32> + res_vi = vec_add(vi, vbi); // CHECK: add <4 x i32> res_vui = vec_add(vui, vui); // CHECK: add <4 x i32> res_vui = vec_add(vbi, vui); // CHECK: add <4 x i32> res_vui = vec_add(vui, vbi); // CHECK: add <4 x i32> res_vf = vec_add(vf, vf); // CHECK: fadd <4 x float> - res_vsc = vec_vaddubm(vsc, vsc); // CHECK: add nsw <16 x i8> - res_vsc = vec_vaddubm(vbc, vsc); // CHECK: add nsw <16 x i8> - res_vsc = vec_vaddubm(vsc, vbc); // CHECK: add nsw <16 x i8> + res_vsc = vec_vaddubm(vsc, vsc); // CHECK: add <16 x i8> + res_vsc = vec_vaddubm(vbc, vsc); // CHECK: add <16 x i8> + res_vsc = vec_vaddubm(vsc, vbc); // CHECK: add <16 x i8> res_vuc = vec_vaddubm(vuc, vuc); // CHECK: add <16 x i8> res_vuc = vec_vaddubm(vbc, vuc); // CHECK: add <16 x i8> res_vuc = vec_vaddubm(vuc, vbc); // CHECK: add <16 x i8> - res_vs = vec_vadduhm(vs, vs); // CHECK: add nsw <8 x i16> - res_vs = vec_vadduhm(vbs, vs); // CHECK: add nsw <8 x i16> - res_vs = vec_vadduhm(vs, vbs); // CHECK: add nsw <8 x i16> + res_vs = vec_vadduhm(vs, vs); // CHECK: add <8 x i16> + res_vs = vec_vadduhm(vbs, vs); // CHECK: add <8 x i16> + res_vs = vec_vadduhm(vs, vbs); // CHECK: add <8 x i16> res_vus = vec_vadduhm(vus, vus); // CHECK: add <8 x i16> res_vus = vec_vadduhm(vbs, vus); // CHECK: add <8 x i16> res_vus = vec_vadduhm(vus, vbs); // CHECK: add <8 x i16> - res_vi = vec_vadduwm(vi, vi); // CHECK: add nsw <4 x i32> - res_vi = vec_vadduwm(vbi, vi); // CHECK: add nsw <4 x i32> - res_vi = vec_vadduwm(vi, vbi); // CHECK: add nsw <4 x i32> + res_vi = vec_vadduwm(vi, vi); // CHECK: add <4 x i32> + res_vi = vec_vadduwm(vbi, vi); // CHECK: add <4 x i32> + res_vi = vec_vadduwm(vi, vbi); // CHECK: add <4 x i32> res_vui = vec_vadduwm(vui, vui); // CHECK: add <4 x i32> res_vui = vec_vadduwm(vbi, vui); // CHECK: add <4 x i32> res_vui = vec_vadduwm(vui, vbi); // CHECK: add <4 x i32> @@ -689,14 +689,14 @@ void test6() { res_vus = vec_mladd(vus, vus, vus); // CHECK: mul <8 x i16> // CHECK: add <8 x i16> - res_vs = vec_mladd(vus, vs, vs); // CHECK: mul nsw <8 x i16> - // CHECK: add nsw <8 x i16> + res_vs = vec_mladd(vus, vs, vs); // CHECK: mul <8 x i16> + // CHECK: add <8 x i16> - res_vs = vec_mladd(vs, vus, vus); // CHECK: mul nsw <8 x i16> - // CHECK: add nsw <8 x i16> + res_vs = vec_mladd(vs, vus, vus); // CHECK: mul <8 x i16> + // CHECK: add <8 x i16> - res_vs = vec_mladd(vs, vs, vs); // CHECK: mul nsw <8 x i16> - // CHECK: add nsw <8 x i16> + res_vs = vec_mladd(vs, vs, vs); // CHECK: mul <8 x i16> + // CHECK: add <8 x i16> /* vec_mradds */ res_vs = vec_mradds(vs, vs, vs); // CHECK: @llvm.ppc.altivec.vmhraddshs @@ -1592,40 +1592,40 @@ void test6() { vec_stvxl(vf, 0, ¶m_f); // CHECK: @llvm.ppc.altivec.stvxl /* vec_sub */ - res_vsc = vec_sub(vsc, vsc); // CHECK: sub nsw <16 x i8> - res_vsc = vec_sub(vbc, vsc); // CHECK: sub nsw <16 x i8> - res_vsc = vec_sub(vsc, vbc); // CHECK: sub nsw <16 x i8> + res_vsc = vec_sub(vsc, vsc); // CHECK: sub <16 x i8> + res_vsc = vec_sub(vbc, vsc); // CHECK: sub <16 x i8> + res_vsc = vec_sub(vsc, vbc); // CHECK: sub <16 x i8> res_vuc = vec_sub(vuc, vuc); // CHECK: sub <16 x i8> res_vuc = vec_sub(vbc, vuc); // CHECK: sub <16 x i8> res_vuc = vec_sub(vuc, vbc); // CHECK: sub <16 x i8> - res_vs = vec_sub(vs, vs); // CHECK: sub nsw <8 x i16> - res_vs = vec_sub(vbs, vs); // CHECK: sub nsw <8 x i16> - res_vs = vec_sub(vs, vbs); // CHECK: sub nsw <8 x i16> + res_vs = vec_sub(vs, vs); // CHECK: sub <8 x i16> + res_vs = vec_sub(vbs, vs); // CHECK: sub <8 x i16> + res_vs = vec_sub(vs, vbs); // CHECK: sub <8 x i16> res_vus = vec_sub(vus, vus); // CHECK: sub <8 x i16> res_vus = vec_sub(vbs, vus); // CHECK: sub <8 x i16> res_vus = vec_sub(vus, vbs); // CHECK: sub <8 x i16> - res_vi = vec_sub(vi, vi); // CHECK: sub nsw <4 x i32> - res_vi = vec_sub(vbi, vi); // CHECK: sub nsw <4 x i32> - res_vi = vec_sub(vi, vbi); // CHECK: sub nsw <4 x i32> + res_vi = vec_sub(vi, vi); // CHECK: sub <4 x i32> + res_vi = vec_sub(vbi, vi); // CHECK: sub <4 x i32> + res_vi = vec_sub(vi, vbi); // CHECK: sub <4 x i32> res_vui = vec_sub(vui, vui); // CHECK: sub <4 x i32> res_vui = vec_sub(vbi, vui); // CHECK: sub <4 x i32> res_vui = vec_sub(vui, vbi); // CHECK: sub <4 x i32> res_vf = vec_sub(vf, vf); // CHECK: fsub <4 x float> - res_vsc = vec_vsububm(vsc, vsc); // CHECK: sub nsw <16 x i8> - res_vsc = vec_vsububm(vbc, vsc); // CHECK: sub nsw <16 x i8> - res_vsc = vec_vsububm(vsc, vbc); // CHECK: sub nsw <16 x i8> + res_vsc = vec_vsububm(vsc, vsc); // CHECK: sub <16 x i8> + res_vsc = vec_vsububm(vbc, vsc); // CHECK: sub <16 x i8> + res_vsc = vec_vsububm(vsc, vbc); // CHECK: sub <16 x i8> res_vuc = vec_vsububm(vuc, vuc); // CHECK: sub <16 x i8> res_vuc = vec_vsububm(vbc, vuc); // CHECK: sub <16 x i8> res_vuc = vec_vsububm(vuc, vbc); // CHECK: sub <16 x i8> - res_vs = vec_vsubuhm(vs, vs); // CHECK: sub nsw <8 x i16> + res_vs = vec_vsubuhm(vs, vs); // CHECK: sub <8 x i16> res_vs = vec_vsubuhm(vbs, vus); // CHECK: sub <8 x i16> res_vs = vec_vsubuhm(vus, vbs); // CHECK: sub <8 x i16> res_vus = vec_vsubuhm(vus, vus); // CHECK: sub <8 x i16> res_vus = vec_vsubuhm(vbs, vus); // CHECK: sub <8 x i16> res_vus = vec_vsubuhm(vus, vbs); // CHECK: sub <8 x i16> - res_vi = vec_vsubuwm(vi, vi); // CHECK: sub nsw <4 x i32> - res_vi = vec_vsubuwm(vbi, vi); // CHECK: sub nsw <4 x i32> - res_vi = vec_vsubuwm(vi, vbi); // CHECK: sub nsw <4 x i32> + res_vi = vec_vsubuwm(vi, vi); // CHECK: sub <4 x i32> + res_vi = vec_vsubuwm(vbi, vi); // CHECK: sub <4 x i32> + res_vi = vec_vsubuwm(vi, vbi); // CHECK: sub <4 x i32> res_vui = vec_vsubuwm(vui, vui); // CHECK: sub <4 x i32> res_vui = vec_vsubuwm(vbi, vui); // CHECK: sub <4 x i32> res_vui = vec_vsubuwm(vui, vbi); // CHECK: sub <4 x i32> diff --git a/test/CodeGen/builtins-x86.c b/test/CodeGen/builtins-x86.c index bb63048..728ade3 100644 --- a/test/CodeGen/builtins-x86.c +++ b/test/CodeGen/builtins-x86.c @@ -317,7 +317,6 @@ void f0() { (void) __builtin_ia32_clflush(tmp_vCp); (void) __builtin_ia32_lfence(); (void) __builtin_ia32_mfence(); - tmp_V16c = __builtin_ia32_loaddqu(tmp_cCp); (void) __builtin_ia32_storedqu(tmp_cp, tmp_V16c); tmp_V4s = __builtin_ia32_psllwi(tmp_V4s, tmp_i); tmp_V2i = __builtin_ia32_pslldi(tmp_V2i, tmp_i); diff --git a/test/CodeGen/builtinshufflevector.c b/test/CodeGen/builtinshufflevector.c index f365844..5c647df 100644 --- a/test/CodeGen/builtinshufflevector.c +++ b/test/CodeGen/builtinshufflevector.c @@ -1,5 +1,6 @@ // RUN: %clang_cc1 -emit-llvm < %s | grep 'shufflevector' | count 1 +// RUN: %clang_cc1 -emit-llvm -ftrapv < %s | grep 'shufflevector' | count 1 typedef int v4si __attribute__ ((vector_size (16))); -v4si a(v4si x, v4si y) {return __builtin_shufflevector(x, y, 3, 2, 5, 7);} +v4si a(v4si x, v4si y) {return __builtin_shufflevector(x, y, 3, 2, 5, (2*3)+1);} diff --git a/test/CodeGen/byval-memcpy-elim.c b/test/CodeGen/byval-memcpy-elim.c new file mode 100644 index 0000000..8aa08fb --- /dev/null +++ b/test/CodeGen/byval-memcpy-elim.c @@ -0,0 +1,20 @@ +// RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin10 < %s | FileCheck %s + +struct Test1S { + long NumDecls; + long X; + long Y; +}; +struct Test2S { + long NumDecls; + long X; +}; + +// Make sure we don't generate extra memcpy for lvalues +void test1a(struct Test1S, struct Test2S); +// CHECK: define void @test1( +// CHECK-NOT: memcpy +// CHECK: call void @test1a +void test1(struct Test1S *A, struct Test2S *B) { + test1a(*A, *B); +} diff --git a/test/CodeGen/debug-info-crash.c b/test/CodeGen/debug-info-crash.c index 8d6a360..f04548b 100644 --- a/test/CodeGen/debug-info-crash.c +++ b/test/CodeGen/debug-info-crash.c @@ -1,3 +1,4 @@ +// REQUIRES: x86-registered-target // RUN: %clang_cc1 -triple i386-apple-darwin10 -fblocks -g -S %s -o - // rdar://7590323 diff --git a/test/CodeGen/debug-info.c b/test/CodeGen/debug-info.c index a84d0b2..876c6c2 100644 --- a/test/CodeGen/debug-info.c +++ b/test/CodeGen/debug-info.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -o %t -emit-llvm -g %s +// RUN: %clang_cc1 -triple x86_64-unk-unk -o %t -emit-llvm -g %s // RUN: FileCheck --input-file=%t %s // PR3023 @@ -47,3 +47,10 @@ struct foo2 foo2; typedef int barfoo; barfoo foo() { } + +// CHECK: __uint128_t +__uint128_t foo128 () +{ + __uint128_t int128 = 44; + return int128; +} diff --git a/test/CodeGen/decl.c b/test/CodeGen/decl.c index 7a9971e..29520d7 100644 --- a/test/CodeGen/decl.c +++ b/test/CodeGen/decl.c @@ -1,11 +1,11 @@ // RUN: %clang_cc1 -w -emit-llvm < %s | FileCheck %s // CHECK: @test1.x = internal constant [12 x i32] [i32 1 -// CHECK: @test2.x = internal constant [13 x i32] [i32 1, +// CHECK: @test2.x = internal unnamed_addr constant [13 x i32] [i32 1, // CHECK: @test5w = global %0 { i32 2, [4 x i8] undef } // CHECK: @test5y = global %union.test5u { double 7.300000e+0{{[0]*}}1 } -// CHECK: @test6.x = internal constant %struct.SelectDest { i8 1, i8 2, i32 3, i32 0 } +// CHECK: @test6.x = internal unnamed_addr constant %struct.SelectDest { i8 1, i8 2, i32 3, i32 0 } // CHECK: @test7 = global [2 x %struct.test7s] [%struct.test7s { i32 1, i32 2 }, %struct.test7s { i32 4, i32 0 }] diff --git a/test/CodeGen/ext-vector.c b/test/CodeGen/ext-vector.c index 1abd9f2..a222f94 100644 --- a/test/CodeGen/ext-vector.c +++ b/test/CodeGen/ext-vector.c @@ -131,9 +131,9 @@ void test7(int4 *ap, int4 *bp, int c) { int4 a = *ap; int4 b = *bp; - // CHECK: add nsw <4 x i32> - // CHECK: sub nsw <4 x i32> - // CHECK: mul nsw <4 x i32> + // CHECK: add <4 x i32> + // CHECK: sub <4 x i32> + // CHECK: mul <4 x i32> // CHECK: sdiv <4 x i32> // CHECK: srem <4 x i32> a = a + b; @@ -142,9 +142,9 @@ void test7(int4 *ap, int4 *bp, int c) { a = a / b; a = a % b; - // CHECK: add nsw <4 x i32> - // CHECK: sub nsw <4 x i32> - // CHECK: mul nsw <4 x i32> + // CHECK: add <4 x i32> + // CHECK: sub <4 x i32> + // CHECK: mul <4 x i32> // CHECK: sdiv <4 x i32> // CHECK: srem <4 x i32> a = a + c; @@ -153,9 +153,9 @@ void test7(int4 *ap, int4 *bp, int c) { a = a / c; a = a % c; - // CHECK: add nsw <4 x i32> - // CHECK: sub nsw <4 x i32> - // CHECK: mul nsw <4 x i32> + // CHECK: add <4 x i32> + // CHECK: sub <4 x i32> + // CHECK: mul <4 x i32> // CHECK: sdiv <4 x i32> // CHECK: srem <4 x i32> a += b; @@ -164,9 +164,9 @@ void test7(int4 *ap, int4 *bp, int c) { a /= b; a %= b; - // CHECK: add nsw <4 x i32> - // CHECK: sub nsw <4 x i32> - // CHECK: mul nsw <4 x i32> + // CHECK: add <4 x i32> + // CHECK: sub <4 x i32> + // CHECK: mul <4 x i32> // CHECK: sdiv <4 x i32> // CHECK: srem <4 x i32> a += c; @@ -220,7 +220,7 @@ int test9(int4 V) { } // CHECK: @test10 -// CHECK: add nsw <4 x i32> +// CHECK: add <4 x i32> // CHECK: extractelement <4 x i32> int test10(int4 V) { return (V+V).x; diff --git a/test/CodeGen/extern-inline.c b/test/CodeGen/extern-inline.c index 60f6d03..e3df996 100644 --- a/test/CodeGen/extern-inline.c +++ b/test/CodeGen/extern-inline.c @@ -1,4 +1,5 @@ // RUN: %clang -S -emit-llvm -std=gnu89 -o - %s | FileCheck %s +// RUN: %clang -S -emit-llvm -fgnu89-inline -o - %s | FileCheck %s // PR5253 // If an extern inline function is redefined, functions should call the diff --git a/test/CodeGen/frame-pointer-elim.c b/test/CodeGen/frame-pointer-elim.c index e9dc22b..4e8e946 100644 --- a/test/CodeGen/frame-pointer-elim.c +++ b/test/CodeGen/frame-pointer-elim.c @@ -1,3 +1,5 @@ +// REQUIRES: x86-registered-target + // RUN: %clang -ccc-host-triple i386-apple-darwin -S -o - %s | \ // RUN: FileCheck --check-prefix=DARWIN %s // DARWIN: f0: diff --git a/test/CodeGen/inline.c b/test/CodeGen/inline.c index a6b4b3e..96f9c5c 100644 --- a/test/CodeGen/inline.c +++ b/test/CodeGen/inline.c @@ -29,7 +29,7 @@ // RUN: grep "define available_externally i32 @test5" %t // RUN: echo "\nC++ tests:" -// RUN: %clang %s -O1 -emit-llvm -S -o %t -std=c++98 +// RUN: %clang -x c++ %s -O1 -emit-llvm -S -o %t -std=c++98 // RUN: grep "define linkonce_odr i32 @_Z2eiv()" %t // RUN: grep "define linkonce_odr i32 @_Z3foov()" %t // RUN: grep "define i32 @_Z3barv()" %t diff --git a/test/CodeGen/mmx-builtins.c b/test/CodeGen/mmx-builtins.c index 7934e77..b142684 100644 --- a/test/CodeGen/mmx-builtins.c +++ b/test/CodeGen/mmx-builtins.c @@ -1,3 +1,4 @@ +// REQUIRES: x86-64-registered-target // RUN: %clang_cc1 %s -O3 -triple=x86_64-apple-darwin -target-feature +ssse3 -S -o - | FileCheck %s // FIXME: Disable inclusion of mm_malloc.h, our current implementation is broken diff --git a/test/CodeGen/ms_struct-bitfield-1.c b/test/CodeGen/ms_struct-bitfield-1.c new file mode 100644 index 0000000..0b15a24 --- /dev/null +++ b/test/CodeGen/ms_struct-bitfield-1.c @@ -0,0 +1,91 @@ +// RUN: %clang_cc1 -emit-llvm-only -triple x86_64-apple-darwin9 %s +// rdar://8823265 + +#define ATTR __attribute__((__ms_struct__)) + +struct { + unsigned int bf_1 : 12; + unsigned int : 0; + unsigned int bf_2 : 12; +} ATTR t1; +static int a1[(sizeof(t1) == 8) -1]; + +struct +{ + char foo : 4; + short : 0; + char bar; +} ATTR t2; +static int a2[(sizeof(t2) == 4) -1]; + +#pragma ms_struct on +struct +{ + char foo : 4; + short : 0; + char bar; +} t3; +#pragma ms_struct off +static int a3[(sizeof(t3) == 4) -1]; + +struct +{ + char foo : 6; + long : 0; +} ATTR t4; +static int a4[(sizeof(t4) == 8) -1]; + +struct +{ + char foo : 4; + short : 0; + char bar : 8; +} ATTR t5; +static int a5[(sizeof(t5) == 4) -1]; + +struct +{ + char foo : 4; + short : 0; + long :0; + char bar; +} ATTR t6; +static int a6[(sizeof(t6) == 4) -1]; + +struct +{ + char foo : 4; + long :0; + short : 0; + char bar; +} ATTR t7; +static int a7[(sizeof(t7) == 16) -1]; + +struct +{ + char foo : 4; + short : 0; + long :0; + char bar:7; +} ATTR t8; +static int a8[(sizeof(t8) == 4) -1]; + +struct +{ + char foo : 4; + long :0; + short : 0; + char bar: 8; +} ATTR t9; +static int a9[(sizeof(t9) == 16) -1]; + +struct +{ + char foo : 4; + char : 0; + short : 0; + int : 0; + long :0; + char bar; +} ATTR t10; +static int a10[(sizeof(t10) == 2) -1]; diff --git a/test/CodeGen/ms_struct-bitfield-2.c b/test/CodeGen/ms_struct-bitfield-2.c new file mode 100644 index 0000000..36e0172 --- /dev/null +++ b/test/CodeGen/ms_struct-bitfield-2.c @@ -0,0 +1,135 @@ +// RUN: %clang_cc1 -emit-llvm-only -triple x86_64-apple-darwin9 %s +// rdar://8823265 + +#define ATTR __attribute__((__ms_struct__)) + +#define size_struct_0 1 +#define size_struct_1 4 +#define size_struct_2 24 +#define size_struct_3 8 +#define size_struct_4 32 +#define size_struct_5 12 +#define size_struct_6 40 +#define size_struct_7 8 +#define size_struct_8 20 +#define size_struct_9 32 + +struct _struct_0 +{ + char member_0; +} ATTR; +typedef struct _struct_0 struct_0; + +struct _struct_1 +{ + char member_0; + short member_1:13; +} ATTR; +typedef struct _struct_1 struct_1; + +struct _struct_2 +{ + double member_0; + unsigned char member_1:8; + int member_2:32; + unsigned char member_3:5; + short member_4:14; + short member_5:13; + unsigned char:0; +} ATTR; +typedef struct _struct_2 struct_2; + +struct _struct_3 +{ + unsigned int member_0:26; + unsigned char member_1:2; + +} ATTR; +typedef struct _struct_3 struct_3; + +struct _struct_4 +{ + unsigned char member_0:7; + double member_1; + double member_2; + short member_3:5; + char member_4:2; + +} ATTR; +typedef struct _struct_4 struct_4; + +struct _struct_5 +{ + unsigned short member_0:12; + int member_1:1; + unsigned short member_2:6; + +} ATTR; +typedef struct _struct_5 struct_5; + +struct _struct_6 +{ + unsigned char member_0:7; + unsigned int member_1:25; + char member_2:1; + double member_3; + short member_4:9; + double member_5; + +} ATTR; +typedef struct _struct_6 struct_6; + +struct _struct_7 +{ + double member_0; + +} ATTR; +typedef struct _struct_7 struct_7; + +struct _struct_8 +{ + unsigned char member_0:7; + int member_1:11; + int member_2:5; + int:0; + char member_4:8; + unsigned short member_5:4; + unsigned char member_6:3; + int member_7:23; + +} ATTR; +typedef struct _struct_8 struct_8; + +struct _struct_9 +{ + double member_0; + unsigned int member_1:6; + int member_2:17; + double member_3; + unsigned int member_4:22; + +} ATTR; +typedef struct _struct_9 struct_9; + +struct_0 test_struct_0 = { 123 }; +struct_1 test_struct_1 = { 82, 1081 }; +struct_2 test_struct_2 = { 20.0, 31, 407760, 1, 14916, 6712 }; +struct_3 test_struct_3 = { 64616999, 1 }; +struct_4 test_struct_4 = { 61, 20.0, 20.0, 12, 0 }; +struct_5 test_struct_5 = { 909, 1, 57 }; +struct_6 test_struct_6 = { 12, 21355796, 0, 20.0, 467, 20.0 }; +struct_7 test_struct_7 = { 20.0 }; +struct_8 test_struct_8 = { 126, 1821, 22, 125, 6, 0, 2432638 }; +struct_9 test_struct_9 = { 20.0, 3, 23957, 20.0, 1001631 }; + + +static int a0[(sizeof (struct_0) == size_struct_0) -1]; +static int a1[(sizeof (struct_1) == size_struct_1) -1]; +static int a2[(sizeof (struct_2) == size_struct_2) -1]; +static int a3[(sizeof (struct_3) == size_struct_3) -1]; +static int a4[(sizeof (struct_4) == size_struct_4) -1]; +static int a5[(sizeof (struct_5) == size_struct_5) -1]; +static int a6[(sizeof (struct_6) == size_struct_6) -1]; +static int a7[(sizeof (struct_7) == size_struct_7) -1]; +static int a8[(sizeof (struct_8) == size_struct_8) -1]; +static int a9[(sizeof (struct_9) == size_struct_9) -1]; diff --git a/test/CodeGen/ms_struct-bitfield-3.c b/test/CodeGen/ms_struct-bitfield-3.c new file mode 100644 index 0000000..0eba435 --- /dev/null +++ b/test/CodeGen/ms_struct-bitfield-3.c @@ -0,0 +1,49 @@ +// RUN: %clang_cc1 -emit-llvm-only -triple i386-apple-darwin9 %s +// rdar://8823265 + +#define ATTR __attribute__((__ms_struct__)) + +struct _struct_0 +{ + int member_0 : 25 ; + short member_1 : 6 ; + char member_2 : 2 ; + unsigned short member_3 : 1 ; + unsigned char member_4 : 7 ; + short member_5 : 16 ; + int : 0 ; + char member_7 ; + +} ATTR; + +typedef struct _struct_0 struct_0; + +#define size_struct_0 20 + +struct_0 test_struct_0 = { 18557917, 17, 3, 0, 80, 6487, 93 }; +static int a[(size_struct_0 == sizeof (struct_0)) -1]; + +struct _struct_1 { + int d; + unsigned char a; + unsigned short b:7; + char c; +} ATTR; + +typedef struct _struct_1 struct_1; + +#define size_struct_1 12 + +struct_1 test_struct_1 = { 18557917, 'a', 3, 'b' }; + +static int a1[(size_struct_1 == sizeof (struct_1)) -1]; + +struct ten { + long long a:3; + long long b:3; + char c; +} __attribute__ ((ms_struct)); + +#define size_struct_2 16 + +static int a2[(size_struct_2 == sizeof (struct ten)) -1]; diff --git a/test/CodeGen/ms_struct-pack.c b/test/CodeGen/ms_struct-pack.c new file mode 100644 index 0000000..da94f54 --- /dev/null +++ b/test/CodeGen/ms_struct-pack.c @@ -0,0 +1,125 @@ +// RUN: %clang_cc1 -emit-llvm-only -triple i386-apple-darwin9 %s +// rdar://8823265 + +#pragma pack(1) +struct _one_ms { + short m:9; // size is 2 + int q:27; // size is 6 + short w:13; // size is 8 + short e:3; // size is 8 + char r:4; // size is 9 + char t:7; // size is 10 + short y:16; // size is 12 + short u:1; // size is 14 + char i:2; // size is 15 + int a; // size is 19 + char o:6; // size is 20 + char s:2; // size is 20 + short d:10; // size is 22 + short f:4; // size is 22 + char b; // size is 23 + char g:1; // size is 24 + short h:13; // size is 26 + char j:8; // size is 27 + char k:5; // size is 28 + char c; // size is 29 + int l:28; // size is 33 + char z:7; // size is 34 + int x:20; // size is 38 +} __attribute__((__ms_struct__)); +typedef struct _one_ms one_ms; + +static int a1[(sizeof(one_ms) == 38) - 1]; + +#pragma pack(2) +struct _two_ms { + short m:9; + int q:27; + short w:13; + short e:3; + char r:4; + char t:7; + short y:16; + short u:1; + char i:2; + int a; + char o:6; + char s:2; + short d:10; + short f:4; + char b; + char g:1; + short h:13; + char j:8; + char k:5; + char c; + int l:28; + char z:7; + int x:20; +} __attribute__((__ms_struct__)); + +typedef struct _two_ms two_ms; + +static int a2[(sizeof(two_ms) == 42) - 1]; + +#pragma pack(4) +struct _four_ms { + short m:9; + int q:27; + short w:13; + short e:3; + char r:4; + char t:7; + short y:16; + short u:1; + char i:2; + int a; + char o:6; + char s:2; + short d:10; + short f:4; + char b; + char g:1; + short h:13; + char j:8; + char k:5; + char c; + int l:28; + char z:7; + int x:20; +} __attribute__((__ms_struct__)); +typedef struct _four_ms four_ms; + +static int a4[(sizeof(four_ms) == 48) - 1]; + +#pragma pack(8) +struct _eight_ms { + short m:9; + int q:27; + short w:13; + short e:3; + char r:4; + char t:7; + short y:16; + short u:1; + char i:2; + int a; + char o:6; + char s:2; + short d:10; + short f:4; + char b; + char g:1; + short h:13; + char j:8; + char k:5; + char c; + int l:28; + char z:7; + int x:20; +} __attribute__((__ms_struct__)); + +typedef struct _eight_ms eight_ms; + +static int a8[(sizeof(eight_ms) == 48) - 1]; + diff --git a/test/CodeGen/ms_struct.c b/test/CodeGen/ms_struct.c new file mode 100644 index 0000000..a5f9606 --- /dev/null +++ b/test/CodeGen/ms_struct.c @@ -0,0 +1,23 @@ +// RUN: %clang_cc1 -triple i386-apple-darwin10 -emit-llvm %s -o - | FileCheck %s + +#define ATTR __attribute__((__ms_struct__)) +struct s1 { + int f32; + long long f64; +} ATTR s1; + +// CHECK: %struct.s1 = type { i32, [4 x i8], i64 } + +struct s2 { + int f32; + long long f64[4]; +} ATTR s2; + +// CHECK: %struct.s2 = type { i32, [4 x i8], [4 x i64] } + +struct s3 { + int f32; + struct s1 s; +} ATTR s3; + +// CHECK: %struct.s3 = type { i32, [4 x i8], %struct.s1 } diff --git a/test/CodeGen/packed-arrays.c b/test/CodeGen/packed-arrays.c index 785db4d..0c8bb6c 100644 --- a/test/CodeGen/packed-arrays.c +++ b/test/CodeGen/packed-arrays.c @@ -34,10 +34,8 @@ int align3 = __alignof(struct s3); // CHECK: @align0_x = global i32 1 int align0_x = __alignof(((struct s0*) 0)->x); -// We are currently incompatible with GCC here. <rdar://problem/9217290> // -// CHECK-XFAIL: @align1_x = global i32 1 -// CHECK: @align1_x = global i32 4 +// CHECK: @align1_x = global i32 1 int align1_x = __alignof(((struct s1*) 0)->x); // CHECK: @align2_x = global i32 1 int align2_x = __alignof(((struct s2*) 0)->x); @@ -66,22 +64,22 @@ int f0_b(struct s0 *a) { return *(a->x + 1); } +// Note that we are incompatible with GCC on this example. +// // CHECK: define i32 @f1_a -// CHECK: load i32* %{{.*}}, align 4 +// CHECK: load i32* %{{.*}}, align 1 // CHECK: } // CHECK: define i32 @f1_b // CHECK: load i32* %{{.*}}, align 4 // CHECK: } -// Note that we are incompatible with GCC on these two examples. +// Note that we are incompatible with GCC on this example. // // CHECK: define i32 @f1_c -// CHECK-XFAIL: load i32* %{{.*}}, align 1 // CHECK: load i32* %{{.*}}, align 4 // CHECK: } // CHECK: define i32 @f1_d -// CHECK-XFAIL: load i32* %{{.*}}, align 1 -// CHECK: load i32* %{{.*}}, align 4 +// CHECK: load i32* %{{.*}}, align 1 // CHECK: } int f1_a(struct s1 *a) { return a->x[1]; diff --git a/test/CodeGen/packed-structure.c b/test/CodeGen/packed-structure.c index 731a50b..3aeaa23 100644 --- a/test/CodeGen/packed-structure.c +++ b/test/CodeGen/packed-structure.c @@ -10,8 +10,7 @@ struct s0 { // CHECK-GLOBAL: @s0_align_x = global i32 4 -// FIXME: This should be 1 to match gcc. PR7951. -// CHECK-GLOBAL: @s0_align_y = global i32 4 +// CHECK-GLOBAL: @s0_align_y = global i32 1 // CHECK-GLOBAL: @s0_align = global i32 4 int s0_align_x = __alignof(((struct s0*)0)->x); @@ -27,7 +26,7 @@ int s0_load_x(struct s0 *a) { return a->x; } // with align 1 (in 2363.1 at least). // // CHECK-FUNCTIONS: define i32 @s0_load_y -// CHECK-FUNCTIONS: [[s0_load_y:%.*]] = load i32* {{.*}}, align 4 +// CHECK-FUNCTIONS: [[s0_load_y:%.*]] = load i32* {{.*}}, align 1 // CHECK-FUNCTIONS: ret i32 [[s0_load_y]] int s0_load_y(struct s0 *a) { return a->y; } // CHECK-FUNCTIONS: define void @s0_copy @@ -92,11 +91,11 @@ struct __attribute__((packed, aligned)) s3 { short aShort; int anInt; }; -// CHECK-GLOBAL: @s3_1 = global i32 2 +// CHECK-GLOBAL: @s3_1 = global i32 1 int s3_1 = __alignof(((struct s3*) 0)->anInt); // CHECK-FUNCTIONS: define i32 @test3( int test3(struct s3 *ptr) { // CHECK-FUNCTIONS: [[PTR:%.*]] = getelementptr inbounds {{%.*}}* {{%.*}}, i32 0, i32 1 - // CHECK-FUNCTIONS-NEXT: load i32* [[PTR]], align 2 + // CHECK-FUNCTIONS-NEXT: load i32* [[PTR]], align 1 return ptr->anInt; } diff --git a/test/CodeGen/palignr.c b/test/CodeGen/palignr.c index ed86c9e..1712df5 100644 --- a/test/CodeGen/palignr.c +++ b/test/CodeGen/palignr.c @@ -1,3 +1,4 @@ +// REQUIRES: x86-registered-target // RUN: %clang_cc1 %s -triple=i686-apple-darwin -target-feature +ssse3 -O1 -S -o - | FileCheck %s #define _mm_alignr_epi8(a, b, n) (__builtin_ia32_palignr128((a), (b), (n))) diff --git a/test/CodeGen/string-literal-short-wstring.c b/test/CodeGen/string-literal-short-wstring.c index 8c2e412..ce29904 100644 --- a/test/CodeGen/string-literal-short-wstring.c +++ b/test/CodeGen/string-literal-short-wstring.c @@ -3,7 +3,7 @@ int main() { // This should convert to utf8. - // CHECK: internal constant [10 x i8] c"\E1\84\A0\C8\A0\F4\82\80\B0\00", align 1 + // CHECK: internal unnamed_addr constant [10 x i8] c"\E1\84\A0\C8\A0\F4\82\80\B0\00", align 1 char b[10] = "\u1120\u0220\U00102030"; // CHECK: private unnamed_addr constant [6 x i8] c"A\00B\00\00\00" diff --git a/test/CodeGen/string-literal.c b/test/CodeGen/string-literal.c index 6d02b0f..cc6c094 100644 --- a/test/CodeGen/string-literal.c +++ b/test/CodeGen/string-literal.c @@ -1,16 +1,16 @@ // RUN: %clang_cc1 -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s int main() { - // CHECK: internal constant [10 x i8] c"abc\00\00\00\00\00\00\00", align 1 + // CHECK: internal unnamed_addr constant [10 x i8] c"abc\00\00\00\00\00\00\00", align 1 char a[10] = "abc"; // This should convert to utf8. - // CHECK: internal constant [10 x i8] c"\E1\84\A0\C8\A0\F4\82\80\B0\00", align 1 + // CHECK: internal unnamed_addr constant [10 x i8] c"\E1\84\A0\C8\A0\F4\82\80\B0\00", align 1 char b[10] = "\u1120\u0220\U00102030"; - // CHECK: private unnamed_addr constant [12 x i8] c"A\00\00\00B\00\00\00\00\00\00\00" + // CHECK: private unnamed_addr constant [12 x i8] c"A\00\00\00B\00\00\00\00\00\00\00", align 1 void *foo = L"AB"; - // CHECK: private unnamed_addr constant [12 x i8] c"4\12\00\00\0B\F0\10\00\00\00\00\00" + // CHECK: private unnamed_addr constant [12 x i8] c"4\12\00\00\0B\F0\10\00\00\00\00\00", align 1 void *bar = L"\u1234\U0010F00B"; } diff --git a/test/CodeGen/struct-passing.c b/test/CodeGen/struct-passing.c index 3e173be..8e5c0ad 100644 --- a/test/CodeGen/struct-passing.c +++ b/test/CodeGen/struct-passing.c @@ -20,5 +20,5 @@ void *ps[] = { f0, f1, f2, f3, f4, f5 }; // CHECK: declare i32 @f1() readonly // CHECK: declare void @f2({{.*}} sret) // CHECK: declare void @f3({{.*}} sret) -// CHECK: declare void @f4({{.*}} byval) -// CHECK: declare void @f5({{.*}} byval) +// CHECK: declare void @f4({{.*}} byval align 4) +// CHECK: declare void @f5({{.*}} byval align 4) diff --git a/test/CodeGen/transparent-union.c b/test/CodeGen/transparent-union.c index 97a7318..afdb3d6 100644 --- a/test/CodeGen/transparent-union.c +++ b/test/CodeGen/transparent-union.c @@ -11,7 +11,7 @@ typedef union { void f0(transp_t0 obj); // CHECK: define void @f1_0(i32* %a0) -// CHECK: call void @f0(%union.transp_t0* byval %{{.*}}) +// CHECK: call void @f0(%union.transp_t0* byval align 4 %{{.*}}) // CHECK: call void %{{.*}}(i8* %{{[a-z0-9]*}}) // CHECK: } void f1_0(int *a0) { diff --git a/test/CodeGen/x86_32-arguments-darwin.c b/test/CodeGen/x86_32-arguments-darwin.c index cf89de3..f7e2a53 100644 --- a/test/CodeGen/x86_32-arguments-darwin.c +++ b/test/CodeGen/x86_32-arguments-darwin.c @@ -53,7 +53,7 @@ void f8_2(struct s8 a0) {} // FIXME: llvm-gcc expands this, this may have some value for the // backend in terms of optimization but doesn't change the ABI. -// CHECK: define void @f9_2(%struct.s9* byval %a0) +// CHECK: define void @f9_2(%struct.s9* byval align 4 %a0) struct s9 { int a : 17; int b; @@ -229,7 +229,7 @@ typedef int v4i32 __attribute__((__vector_size__(16))); v4i32 f55(v4i32 arg) { return arg+arg; } // CHECK: define void @f56( -// CHECK: i8 signext %a0, %struct.s56_0* byval %a1, +// CHECK: i8 signext %a0, %struct.s56_0* byval align 4 %a1, // CHECK: x86_mmx %a2.coerce, %struct.s56_1* byval align 4, // CHECK: i64 %a4.coerce, %struct.s56_2* byval align 4, // CHECK: <4 x i32> %a6, %struct.s39* byval align 16 %a7, @@ -238,7 +238,7 @@ v4i32 f55(v4i32 arg) { return arg+arg; } // CHECK: <4 x double> %a12, %struct.s56_6* byval align 4) // CHECK: call void (i32, ...)* @f56_0(i32 1, -// CHECK: i32 %{{[^ ]*}}, %struct.s56_0* byval %{{[^ ]*}}, +// CHECK: i32 %{{[^ ]*}}, %struct.s56_0* byval align 4 %{{[^ ]*}}, // CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* byval align 4 %{{[^ ]*}}, // CHECK: i64 %{{[^ ]*}}, %struct.s56_2* byval align 4 %{{[^ ]*}}, // CHECK: <4 x i32> %{{[^ ]*}}, %struct.s39* byval align 16 %{{[^ ]*}}, diff --git a/test/CodeGen/x86_32-arguments-linux.c b/test/CodeGen/x86_32-arguments-linux.c index 230a20d..2f246f8 100644 --- a/test/CodeGen/x86_32-arguments-linux.c +++ b/test/CodeGen/x86_32-arguments-linux.c @@ -2,7 +2,7 @@ // RUN: FileCheck < %t %s // CHECK: define void @f56( -// CHECK: i8 signext %a0, %struct.s56_0* byval %a1, +// CHECK: i8 signext %a0, %struct.s56_0* byval align 4 %a1, // CHECK: x86_mmx %a2.coerce, %struct.s56_1* byval align 4, // CHECK: <1 x double> %a4, %struct.s56_2* byval align 4, // CHECK: <4 x i32> %a6, %struct.s56_3* byval align 4, @@ -11,7 +11,7 @@ // CHECK: <4 x double> %a12, %struct.s56_6* byval align 4) // CHECK: call void (i32, ...)* @f56_0(i32 1, -// CHECK: i32 %{{.*}}, %struct.s56_0* byval %{{[^ ]*}}, +// CHECK: i32 %{{.*}}, %struct.s56_0* byval align 4 %{{[^ ]*}}, // CHECK: x86_mmx %{{[^ ]*}}, %struct.s56_1* byval align 4 %{{[^ ]*}}, // CHECK: <1 x double> %{{[^ ]*}}, %struct.s56_2* byval align 4 %{{[^ ]*}}, // CHECK: <4 x i32> %{{[^ ]*}}, %struct.s56_3* byval align 4 %{{[^ ]*}}, diff --git a/test/CodeGen/x86_64-arguments.c b/test/CodeGen/x86_64-arguments.c index ebde884..75c4788 100644 --- a/test/CodeGen/x86_64-arguments.c +++ b/test/CodeGen/x86_64-arguments.c @@ -69,7 +69,7 @@ void f12_1(struct s12 a0) {} // Check that sret parameter is accounted for when checking available integer // registers. -// CHECK: define void @f13(%struct.s13_0* sret %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval %e, i32 %f) +// CHECK: define void @f13(%struct.s13_0* sret %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval align 8 %e, i32 %f) struct s13_0 { long long f0[3]; }; struct s13_1 { long long f0[2]; }; |
