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-rw-r--r--test/CodeGen/XCore/bitrev.ll8
-rw-r--r--test/CodeGen/XCore/misc-intrinsics.ll27
-rw-r--r--test/CodeGen/XCore/mul64.ll9
3 files changed, 30 insertions, 14 deletions
diff --git a/test/CodeGen/XCore/bitrev.ll b/test/CodeGen/XCore/bitrev.ll
deleted file mode 100644
index 09202d3..0000000
--- a/test/CodeGen/XCore/bitrev.ll
+++ /dev/null
@@ -1,8 +0,0 @@
-; RUN: llc < %s -march=xcore > %t1.s
-; RUN: grep bitrev %t1.s | count 1
-declare i32 @llvm.xcore.bitrev(i32)
-
-define i32 @test(i32 %val) {
- %result = call i32 @llvm.xcore.bitrev(i32 %val)
- ret i32 %result
-}
diff --git a/test/CodeGen/XCore/misc-intrinsics.ll b/test/CodeGen/XCore/misc-intrinsics.ll
new file mode 100644
index 0000000..f504a2e
--- /dev/null
+++ b/test/CodeGen/XCore/misc-intrinsics.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=xcore | FileCheck %s
+%0 = type { i32, i32 }
+
+declare i32 @llvm.xcore.bitrev(i32)
+declare i32 @llvm.xcore.crc32(i32, i32, i32)
+declare %0 @llvm.xcore.crc8(i32, i32, i32)
+
+define i32 @bitrev(i32 %val) {
+; CHECK: bitrev:
+; CHECK: bitrev r0, r0
+ %result = call i32 @llvm.xcore.bitrev(i32 %val)
+ ret i32 %result
+}
+
+define i32 @crc32(i32 %crc, i32 %data, i32 %poly) {
+; CHECK: crc32:
+; CHECK: crc32 r0, r1, r2
+ %result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
+ ret i32 %result
+}
+
+define %0 @crc8(i32 %crc, i32 %data, i32 %poly) {
+; CHECK: crc8:
+; CHECK: crc8 r0, r1, r1, r2
+ %result = call %0 @llvm.xcore.crc8(i32 %crc, i32 %data, i32 %poly)
+ ret %0 %result
+}
diff --git a/test/CodeGen/XCore/mul64.ll b/test/CodeGen/XCore/mul64.ll
index 77c6b42..3d373b1 100644
--- a/test/CodeGen/XCore/mul64.ll
+++ b/test/CodeGen/XCore/mul64.ll
@@ -9,7 +9,7 @@ entry:
}
; CHECK: umul_lohi:
; CHECK: ldc [[REG:r[0-9]+]], 0
-; CHECK-NEXT: lmul r1, r0, r1, r0, [[REG]], [[REG]]
+; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
; CHECK-NEXT: retsp 0
define i64 @smul_lohi(i32 %a, i32 %b) {
@@ -23,9 +23,7 @@ entry:
; CHECK: ldc
; CHECK-NEXT: mov
; CHECK-NEXT: maccs
-; CHECK-NEXT: mov r0,
-; CHECK-NEXT: mov r1,
-; CHECK-NEXT: retsp 0
+; CHECK: retsp 0
define i64 @mul64(i64 %a, i64 %b) {
entry:
@@ -37,7 +35,6 @@ entry:
; CHECK-NEXT: lmul
; CHECK-NEXT: mul
; CHECK-NEXT: lmul
-; CHECK-NEXT: mov r0,
define i64 @mul64_2(i64 %a, i32 %b) {
entry:
@@ -50,4 +47,4 @@ entry:
; CHECK-NEXT: lmul
; CHECK-NEXT: mul
; CHECK-NEXT: add r1,
-; CHECK-NEXT: retsp 0
+; CHECK: retsp 0
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