diff options
Diffstat (limited to 'test/CodeGen/X86')
31 files changed, 758 insertions, 23 deletions
diff --git a/test/CodeGen/X86/2004-03-30-Select-Max.ll b/test/CodeGen/X86/2004-03-30-Select-Max.ll index b6631b6..c44d10a 100644 --- a/test/CodeGen/X86/2004-03-30-Select-Max.ll +++ b/test/CodeGen/X86/2004-03-30-Select-Max.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 | not grep {j\[lgbe\]} +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep {j\[lgbe\]} -define i32 @max(i32 %A, i32 %B) { +define i32 @max(i32 %A, i32 %B) nounwind { %gt = icmp sgt i32 %A, %B ; <i1> [#uses=1] %R = select i1 %gt, i32 %A, i32 %B ; <i32> [#uses=1] ret i32 %R diff --git a/test/CodeGen/X86/2007-02-16-BranchFold.ll b/test/CodeGen/X86/2007-02-16-BranchFold.ll new file mode 100644 index 0000000..6bf5631 --- /dev/null +++ b/test/CodeGen/X86/2007-02-16-BranchFold.ll @@ -0,0 +1,95 @@ +; PR 1200 +; RUN: llc < %s -enable-tail-merge=0 | not grep jmp + +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32" +target triple = "i686-apple-darwin8" + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.Index_Map = type { i32, %struct.item_set** } + %struct.Item = type { [4 x i16], %struct.rule* } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + %struct.dimension = type { i16*, %struct.Index_Map, %struct.mapping*, i32, %struct.plankMap* } + %struct.item_set = type { i32, i32, %struct.operator*, [2 x %struct.item_set*], %struct.item_set*, i16*, %struct.Item*, %struct.Item* } + %struct.list = type { i8*, %struct.list* } + %struct.mapping = type { %struct.list**, i32, i32, i32, %struct.item_set** } + %struct.nonterminal = type { i8*, i32, i32, i32, %struct.plankMap*, %struct.rule* } + %struct.operator = type { i8*, i8, i32, i32, i32, i32, %struct.table* } + %struct.pattern = type { %struct.nonterminal*, %struct.operator*, [2 x %struct.nonterminal*] } + %struct.plank = type { i8*, %struct.list*, i32 } + %struct.plankMap = type { %struct.list*, i32, %struct.stateMap* } + %struct.rule = type { [4 x i16], i32, i32, i32, %struct.nonterminal*, %struct.pattern*, i8 } + %struct.stateMap = type { i8*, %struct.plank*, i32, i16* } + %struct.table = type { %struct.operator*, %struct.list*, i16*, [2 x %struct.dimension*], %struct.item_set** } +@outfile = external global %struct.FILE* ; <%struct.FILE**> [#uses=1] +@str1 = external global [11 x i8] ; <[11 x i8]*> [#uses=1] + +declare i32 @fprintf(%struct.FILE*, i8*, ...) + +define i16 @main_bb_2E_i9_2E_i_2E_i932_2E_ce(%struct.list* %l_addr.01.0.i2.i.i929, %struct.operator** %tmp66.i62.i.out) { +newFuncRoot: + br label %bb.i9.i.i932.ce + +NewDefault: ; preds = %LeafBlock, %LeafBlock1, %LeafBlock2, %LeafBlock3 + br label %bb36.i.i.exitStub + +bb36.i.i.exitStub: ; preds = %NewDefault + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 0 + +bb.i14.i.exitStub: ; preds = %LeafBlock + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 1 + +bb12.i.i935.exitStub: ; preds = %LeafBlock1 + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 2 + +bb20.i.i937.exitStub: ; preds = %LeafBlock2 + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 3 + +bb28.i.i938.exitStub: ; preds = %LeafBlock3 + store %struct.operator* %tmp66.i62.i, %struct.operator** %tmp66.i62.i.out + ret i16 4 + +bb.i9.i.i932.ce: ; preds = %newFuncRoot + %tmp1.i3.i.i930 = getelementptr %struct.list* %l_addr.01.0.i2.i.i929, i32 0, i32 0 ; <i8**> [#uses=1] + %tmp2.i4.i.i931 = load i8** %tmp1.i3.i.i930 ; <i8*> [#uses=1] + %tmp66.i62.i = bitcast i8* %tmp2.i4.i.i931 to %struct.operator* ; <%struct.operator*> [#uses=7] + %tmp1.i6.i = getelementptr %struct.operator* %tmp66.i62.i, i32 0, i32 2 ; <i32*> [#uses=1] + %tmp2.i7.i = load i32* %tmp1.i6.i ; <i32> [#uses=1] + %tmp3.i8.i = load %struct.FILE** @outfile ; <%struct.FILE*> [#uses=1] + %tmp5.i9.i = call i32 (%struct.FILE*, i8*, ...)* @fprintf( %struct.FILE* %tmp3.i8.i, i8* getelementptr ([11 x i8]* @str1, i32 0, i32 0), i32 %tmp2.i7.i ) ; <i32> [#uses=0] + %tmp7.i10.i = getelementptr %struct.operator* %tmp66.i62.i, i32 0, i32 5 ; <i32*> [#uses=1] + %tmp8.i11.i = load i32* %tmp7.i10.i ; <i32> [#uses=7] + br label %NodeBlock5 + +NodeBlock5: ; preds = %bb.i9.i.i932.ce + icmp slt i32 %tmp8.i11.i, 1 ; <i1>:0 [#uses=1] + br i1 %0, label %NodeBlock, label %NodeBlock4 + +NodeBlock4: ; preds = %NodeBlock5 + icmp slt i32 %tmp8.i11.i, 2 ; <i1>:1 [#uses=1] + br i1 %1, label %LeafBlock2, label %LeafBlock3 + +LeafBlock3: ; preds = %NodeBlock4 + icmp eq i32 %tmp8.i11.i, 2 ; <i1>:2 [#uses=1] + br i1 %2, label %bb28.i.i938.exitStub, label %NewDefault + +LeafBlock2: ; preds = %NodeBlock4 + icmp eq i32 %tmp8.i11.i, 1 ; <i1>:3 [#uses=1] + br i1 %3, label %bb20.i.i937.exitStub, label %NewDefault + +NodeBlock: ; preds = %NodeBlock5 + icmp slt i32 %tmp8.i11.i, 0 ; <i1>:4 [#uses=1] + br i1 %4, label %LeafBlock, label %LeafBlock1 + +LeafBlock1: ; preds = %NodeBlock + icmp eq i32 %tmp8.i11.i, 0 ; <i1>:5 [#uses=1] + br i1 %5, label %bb12.i.i935.exitStub, label %NewDefault + +LeafBlock: ; preds = %NodeBlock + icmp eq i32 %tmp8.i11.i, -1 ; <i1>:6 [#uses=1] + br i1 %6, label %bb.i14.i.exitStub, label %NewDefault +} diff --git a/test/CodeGen/X86/2007-05-05-Personality.ll b/test/CodeGen/X86/2007-05-05-Personality.ll new file mode 100644 index 0000000..c92783e --- /dev/null +++ b/test/CodeGen/X86/2007-05-05-Personality.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -enable-eh -o - | grep zPL + +@error = external global i8 ; <i8*> [#uses=2] + +define void @_ada_x() { +entry: + invoke void @raise( ) + to label %eh_then unwind label %unwind + +unwind: ; preds = %entry + %eh_ptr = tail call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] + %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error ) ; <i32> [#uses=1] + %eh_typeid = tail call i32 @llvm.eh.typeid.for.i32( i8* @error ) ; <i32> [#uses=1] + %tmp2 = icmp eq i32 %eh_select, %eh_typeid ; <i1> [#uses=1] + br i1 %tmp2, label %eh_then, label %Unwind + +eh_then: ; preds = %unwind, %entry + ret void + +Unwind: ; preds = %unwind + tail call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; <i32>:0 [#uses=0] + unreachable +} + +declare void @raise() + +declare i8* @llvm.eh.exception() + +declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) + +declare i32 @llvm.eh.typeid.for.i32(i8*) + +declare i32 @__gnat_eh_personality(...) + +declare i32 @_Unwind_Resume(...) diff --git a/test/CodeGen/X86/2008-08-05-SpillerBug.ll b/test/CodeGen/X86/2008-08-05-SpillerBug.ll index 4c64934..d9d95b5 100644 --- a/test/CodeGen/X86/2008-08-05-SpillerBug.ll +++ b/test/CodeGen/X86/2008-08-05-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -disable-fp-elim -stats |& grep asm-printer | grep 55 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -disable-fp-elim -stats |& grep asm-printer | grep 55 ; PR2568 @g_3 = external global i16 ; <i16*> [#uses=1] diff --git a/test/CodeGen/X86/2009-03-13-PHIElimBug.ll b/test/CodeGen/X86/2009-03-13-PHIElimBug.ll index ad7f9f7..8d42627 100644 --- a/test/CodeGen/X86/2009-03-13-PHIElimBug.ll +++ b/test/CodeGen/X86/2009-03-13-PHIElimBug.ll @@ -28,5 +28,5 @@ lpad: ; preds = %cont, %entry } ; CHECK: call{{.*}}f -; CHECK-NEXT: Llabel1: +; CHECK-NEXT: Ltmp0: ; CHECK-NEXT: movl %eax, %esi diff --git a/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll b/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll index 11c4101..da493d4 100644 --- a/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll +++ b/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll @@ -21,4 +21,4 @@ lpad: ; preds = %cont, %entry } ; CHECK: lpad -; CHECK-NEXT: Llabel +; CHECK-NEXT: Ltmp diff --git a/test/CodeGen/X86/GC/alloc_loop.ll b/test/CodeGen/X86/GC/alloc_loop.ll new file mode 100644 index 0000000..fb78ba2 --- /dev/null +++ b/test/CodeGen/X86/GC/alloc_loop.ll @@ -0,0 +1,53 @@ +; RUN: llc < %s + + +declare i8* @llvm_gc_allocate(i32) +declare void @llvm_gc_initialize(i32) + +declare void @llvm.gcroot(i8**, i8*) +declare void @llvm.gcwrite(i8*, i8*, i8**) + +define i32 @main() gc "shadow-stack" { +entry: + %A = alloca i8* + %B = alloca i8** + + call void @llvm_gc_initialize(i32 1048576) ; Start with 1MB heap + + ;; void *A; + call void @llvm.gcroot(i8** %A, i8* null) + + ;; A = gcalloc(10); + %Aptr = call i8* @llvm_gc_allocate(i32 10) + store i8* %Aptr, i8** %A + + ;; void **B; + %tmp.1 = bitcast i8*** %B to i8** + call void @llvm.gcroot(i8** %tmp.1, i8* null) + + ;; B = gcalloc(4); + %B.upgrd.1 = call i8* @llvm_gc_allocate(i32 8) + %tmp.2 = bitcast i8* %B.upgrd.1 to i8** + store i8** %tmp.2, i8*** %B + + ;; *B = A; + %B.1 = load i8*** %B + %A.1 = load i8** %A + call void @llvm.gcwrite(i8* %A.1, i8* %B.upgrd.1, i8** %B.1) + + br label %AllocLoop + +AllocLoop: + %i = phi i32 [ 0, %entry ], [ %indvar.next, %AllocLoop ] + ;; Allocated mem: allocated memory is immediately dead. + call i8* @llvm_gc_allocate(i32 100) + + %indvar.next = add i32 %i, 1 + %exitcond = icmp eq i32 %indvar.next, 10000000 + br i1 %exitcond, label %Exit, label %AllocLoop + +Exit: + ret i32 0 +} + +declare void @__main() diff --git a/test/CodeGen/X86/GC/argpromotion.ll b/test/CodeGen/X86/GC/argpromotion.ll new file mode 100644 index 0000000..c63ce22 --- /dev/null +++ b/test/CodeGen/X86/GC/argpromotion.ll @@ -0,0 +1,19 @@ +; RUN: opt < %s -argpromotion + +declare void @llvm.gcroot(i8**, i8*) + +define i32 @g() { +entry: + %var = alloca i32 + store i32 1, i32* %var + %x = call i32 @f(i32* %var) + ret i32 %x +} + +define internal i32 @f(i32* %xp) gc "example" { +entry: + %var = alloca i8* + call void @llvm.gcroot(i8** %var, i8* null) + %x = load i32* %xp + ret i32 %x +} diff --git a/test/CodeGen/X86/GC/badreadproto.ll b/test/CodeGen/X86/GC/badreadproto.ll new file mode 100644 index 0000000..4fe90b9 --- /dev/null +++ b/test/CodeGen/X86/GC/badreadproto.ll @@ -0,0 +1,13 @@ +; RUN: not llvm-as < %s >& /dev/null + + %list = type { i32, %list* } + +; This usage is invalid now; instead, objects must be bitcast to i8* for input +; to the gc intrinsics. +declare %list* @llvm.gcread(%list*, %list**) + +define %list* @tl(%list* %l) gc "example" { + %hd.ptr = getelementptr %list* %l, i32 0, i32 0 + %hd = call %list* @llvm.gcread(%list* %l, %list** %hd.ptr) + ret i32 %tmp +} diff --git a/test/CodeGen/X86/GC/badrootproto.ll b/test/CodeGen/X86/GC/badrootproto.ll new file mode 100644 index 0000000..ff86d03 --- /dev/null +++ b/test/CodeGen/X86/GC/badrootproto.ll @@ -0,0 +1,13 @@ +; RUN: not llvm-as < %s >& /dev/null + + %list = type { i32, %list* } + %meta = type opaque + +; This usage is invalid now; instead, objects must be bitcast to i8* for input +; to the gc intrinsics. +declare void @llvm.gcroot(%list*, %meta*) + +define void @root() gc "example" { + %x.var = alloca i8* + call void @llvm.gcroot(i8** %x.var, %meta* null) +} diff --git a/test/CodeGen/X86/GC/badwriteproto.ll b/test/CodeGen/X86/GC/badwriteproto.ll new file mode 100644 index 0000000..be81f84 --- /dev/null +++ b/test/CodeGen/X86/GC/badwriteproto.ll @@ -0,0 +1,22 @@ +; RUN: not llvm-as < %s >& /dev/null + + %list = type { i32, %list* } + +; This usage is invalid now; instead, objects must be bitcast to i8* for input +; to the gc intrinsics. +declare void @llvm.gcwrite(%list*, %list*, %list**) + +define %list* @cons(i32 %hd, %list* %tl) gc "example" { + %tmp = call i8* @gcalloc(i32 bitcast(%list* getelementptr(%list* null, i32 1) to i32)) + %cell = bitcast i8* %tmp to %list* + + %hd.ptr = getelementptr %list* %cell, i32 0, i32 0 + store i32 %hd, i32* %hd.ptr + + %tl.ptr = getelementptr %list* %cell, i32 0, i32 0 + call void @llvm.gcwrite(%list* %tl, %list* %cell, %list** %tl.ptr) + + ret %cell.2 +} + +declare i8* @gcalloc(i32) diff --git a/test/CodeGen/X86/GC/deadargelim.ll b/test/CodeGen/X86/GC/deadargelim.ll new file mode 100644 index 0000000..1760190 --- /dev/null +++ b/test/CodeGen/X86/GC/deadargelim.ll @@ -0,0 +1,16 @@ +; RUN: opt < %s -deadargelim + +declare void @llvm.gcroot(i8**, i8*) + +define void @g() { +entry: + call void @f(i32 0) + ret void +} + +define internal void @f(i32 %unused) gc "example" { +entry: + %var = alloca i8* + call void @llvm.gcroot(i8** %var, i8* null) + ret void +} diff --git a/test/CodeGen/X86/GC/dg.exp b/test/CodeGen/X86/GC/dg.exp new file mode 100644 index 0000000..f200589 --- /dev/null +++ b/test/CodeGen/X86/GC/dg.exp @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] diff --git a/test/CodeGen/X86/GC/fat.ll b/test/CodeGen/X86/GC/fat.ll new file mode 100644 index 0000000..d05ca3d --- /dev/null +++ b/test/CodeGen/X86/GC/fat.ll @@ -0,0 +1,10 @@ +; RUN: not llvm-as < %s >& /dev/null + +declare void @llvm.gcroot(i8**, i8*) nounwind + +define void @f() gc "x" { + %st = alloca { i8*, i1 } ; <{ i8*, i1 }*> [#uses=1] + %st_ptr = bitcast { i8*, i1 }* %st to i8** ; <i8**> [#uses=1] + call void @llvm.gcroot(i8** %st_ptr, i8* null) + ret void +} diff --git a/test/CodeGen/X86/GC/inline.ll b/test/CodeGen/X86/GC/inline.ll new file mode 100644 index 0000000..9da33ae --- /dev/null +++ b/test/CodeGen/X86/GC/inline.ll @@ -0,0 +1,23 @@ +; RUN: opt < %s -inline -S | grep example + + %IntArray = type { i32, [0 x i32*] } + +declare void @llvm.gcroot(i8**, i8*) nounwind + +define i32 @f() { + %x = call i32 @g( ) ; <i32> [#uses=1] + ret i32 %x +} + +define internal i32 @g() gc "example" { + %root = alloca i8* ; <i8**> [#uses=2] + call void @llvm.gcroot( i8** %root, i8* null ) + %obj = call %IntArray* @h( ) ; <%IntArray*> [#uses=2] + %obj.2 = bitcast %IntArray* %obj to i8* ; <i8*> [#uses=1] + store i8* %obj.2, i8** %root + %Length.ptr = getelementptr %IntArray* %obj, i32 0, i32 0 ; <i32*> [#uses=1] + %Length = load i32* %Length.ptr ; <i32> [#uses=1] + ret i32 %Length +} + +declare %IntArray* @h() diff --git a/test/CodeGen/X86/GC/inline2.ll b/test/CodeGen/X86/GC/inline2.ll new file mode 100644 index 0000000..1594705 --- /dev/null +++ b/test/CodeGen/X86/GC/inline2.ll @@ -0,0 +1,24 @@ +; RUN: opt < %s -inline -S | grep sample +; RUN: opt < %s -inline -S | grep example + + %IntArray = type { i32, [0 x i32*] } + +declare void @llvm.gcroot(i8**, i8*) nounwind + +define i32 @f() gc "sample" { + %x = call i32 @g( ) ; <i32> [#uses=1] + ret i32 %x +} + +define internal i32 @g() gc "example" { + %root = alloca i8* ; <i8**> [#uses=2] + call void @llvm.gcroot( i8** %root, i8* null ) + %obj = call %IntArray* @h( ) ; <%IntArray*> [#uses=2] + %obj.2 = bitcast %IntArray* %obj to i8* ; <i8*> [#uses=1] + store i8* %obj.2, i8** %root + %Length.ptr = getelementptr %IntArray* %obj, i32 0, i32 0 ; <i32*> [#uses=1] + %Length = load i32* %Length.ptr ; <i32> [#uses=1] + ret i32 %Length +} + +declare %IntArray* @h() diff --git a/test/CodeGen/X86/GC/lower_gcroot.ll b/test/CodeGen/X86/GC/lower_gcroot.ll new file mode 100644 index 0000000..c2d418a --- /dev/null +++ b/test/CodeGen/X86/GC/lower_gcroot.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s + + %Env = type i8* + +define void @.main(%Env) gc "shadow-stack" { + %Root = alloca %Env + call void @llvm.gcroot( %Env* %Root, %Env null ) + unreachable +} + +declare void @llvm.gcroot(%Env*, %Env) diff --git a/test/CodeGen/X86/GC/outside.ll b/test/CodeGen/X86/GC/outside.ll new file mode 100644 index 0000000..2968c69 --- /dev/null +++ b/test/CodeGen/X86/GC/outside.ll @@ -0,0 +1,10 @@ +; RUN: not llvm-as < %s >& /dev/null + +declare void @llvm.gcroot(i8**, i8*) + +define void @f(i8* %x) { + %root = alloca i8* + call void @llvm.gcroot(i8** %root, i8* null) + store i8* %x, i8** %root + ret void +} diff --git a/test/CodeGen/X86/GC/simple_ocaml.ll b/test/CodeGen/X86/GC/simple_ocaml.ll new file mode 100644 index 0000000..f765dc0 --- /dev/null +++ b/test/CodeGen/X86/GC/simple_ocaml.ll @@ -0,0 +1,42 @@ +; RUN: llc < %s | grep caml.*__frametable +; RUN: llc < %s -march=x86 | grep {movl .0} + +%struct.obj = type { i8*, %struct.obj* } + +define %struct.obj* @fun(%struct.obj* %head) gc "ocaml" { +entry: + %gcroot.0 = alloca i8* + %gcroot.1 = alloca i8* + + call void @llvm.gcroot(i8** %gcroot.0, i8* null) + call void @llvm.gcroot(i8** %gcroot.1, i8* null) + + %local.0 = bitcast i8** %gcroot.0 to %struct.obj** + %local.1 = bitcast i8** %gcroot.1 to %struct.obj** + + store %struct.obj* %head, %struct.obj** %local.0 + br label %bb.loop +bb.loop: + %t0 = load %struct.obj** %local.0 + %t1 = getelementptr %struct.obj* %t0, i32 0, i32 1 + %t2 = bitcast %struct.obj* %t0 to i8* + %t3 = bitcast %struct.obj** %t1 to i8** + %t4 = call i8* @llvm.gcread(i8* %t2, i8** %t3) + %t5 = bitcast i8* %t4 to %struct.obj* + %t6 = icmp eq %struct.obj* %t5, null + br i1 %t6, label %bb.loop, label %bb.end +bb.end: + %t7 = malloc %struct.obj + store %struct.obj* %t7, %struct.obj** %local.1 + %t8 = bitcast %struct.obj* %t7 to i8* + %t9 = load %struct.obj** %local.0 + %t10 = getelementptr %struct.obj* %t9, i32 0, i32 1 + %t11 = bitcast %struct.obj* %t9 to i8* + %t12 = bitcast %struct.obj** %t10 to i8** + call void @llvm.gcwrite(i8* %t8, i8* %t11, i8** %t12) + ret %struct.obj* %t7 +} + +declare void @llvm.gcroot(i8** %value, i8* %tag) +declare void @llvm.gcwrite(i8* %value, i8* %obj, i8** %field) +declare i8* @llvm.gcread(i8* %obj, i8** %field) diff --git a/test/CodeGen/X86/clz.ll b/test/CodeGen/X86/clz.ll index 3f27187..623ac75 100644 --- a/test/CodeGen/X86/clz.ll +++ b/test/CodeGen/X86/clz.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -march=x86 | grep bsr | count 2 -; RUN: llc < %s -march=x86 | grep bsf -; RUN: llc < %s -march=x86 | grep cmov | count 3 +; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s define i32 @t1(i32 %x) nounwind { %tmp = tail call i32 @llvm.ctlz.i32( i32 %x ) ret i32 %tmp +; CHECK: t1: +; CHECK: bsrl +; CHECK: cmov } declare i32 @llvm.ctlz.i32(i32) nounwind readnone @@ -12,6 +13,9 @@ declare i32 @llvm.ctlz.i32(i32) nounwind readnone define i32 @t2(i32 %x) nounwind { %tmp = tail call i32 @llvm.cttz.i32( i32 %x ) ret i32 %tmp +; CHECK: t2: +; CHECK: bsfl +; CHECK: cmov } declare i32 @llvm.cttz.i32(i32) nounwind readnone @@ -21,6 +25,9 @@ entry: %tmp1 = add i16 %x, %y %tmp2 = tail call i16 @llvm.ctlz.i16( i16 %tmp1 ) ; <i16> [#uses=1] ret i16 %tmp2 +; CHECK: t3: +; CHECK: bsrw +; CHECK: cmov } declare i16 @llvm.ctlz.i16(i16) nounwind readnone diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll index 1e13046..4b7c850 100644 --- a/test/CodeGen/X86/crash.ll +++ b/test/CodeGen/X86/crash.ll @@ -18,3 +18,77 @@ entry: volatile store i32 %conv19.i, i32* undef ret i32 undef } + +; PR6533 +define void @test2(i1 %x, i32 %y) nounwind { + %land.ext = zext i1 %x to i32 ; <i32> [#uses=1] + %and = and i32 %y, 1 ; <i32> [#uses=1] + %xor = xor i32 %and, %land.ext ; <i32> [#uses=1] + %cmp = icmp eq i32 %xor, 1 ; <i1> [#uses=1] + br i1 %cmp, label %if.end, label %if.then + +if.then: ; preds = %land.end + ret void + +if.end: ; preds = %land.end + ret void +} + +; PR6577 +%pair = type { i64, double } + +define void @test3() { +dependentGraph243.exit: + %subject19 = load %pair* undef ; <%1> [#uses=1] + %0 = extractvalue %pair %subject19, 1 ; <double> [#uses=2] + %1 = select i1 undef, double %0, double undef ; <double> [#uses=1] + %2 = select i1 undef, double %1, double %0 ; <double> [#uses=1] + %3 = insertvalue %pair undef, double %2, 1 ; <%1> [#uses=1] + store %pair %3, %pair* undef + ret void +} + +; PR6605 +define i64 @test4(i8* %P) nounwind ssp { +entry: + %tmp1 = load i8* %P ; <i8> [#uses=3] + %tobool = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1] + %tmp58 = sext i1 %tobool to i8 ; <i8> [#uses=1] + %mul.i = and i8 %tmp58, %tmp1 ; <i8> [#uses=1] + %conv6 = zext i8 %mul.i to i32 ; <i32> [#uses=1] + %cmp = icmp ne i8 %tmp1, 1 ; <i1> [#uses=1] + %conv11 = zext i1 %cmp to i32 ; <i32> [#uses=1] + %call12 = tail call i32 @safe(i32 %conv11) nounwind ; <i32> [#uses=1] + %and = and i32 %conv6, %call12 ; <i32> [#uses=1] + %tobool13 = icmp eq i32 %and, 0 ; <i1> [#uses=1] + br i1 %tobool13, label %if.else, label %return + +if.else: ; preds = %entry + br label %return + +return: ; preds = %if.else, %entry + ret i64 undef +} + +declare i32 @safe(i32) + +; PR6607 +define fastcc void @test5(i32 %FUNC) nounwind { +foo: + %0 = load i8* undef, align 1 ; <i8> [#uses=3] + %1 = sext i8 %0 to i32 ; <i32> [#uses=2] + %2 = zext i8 %0 to i32 ; <i32> [#uses=1] + %tmp1.i5037 = urem i32 %2, 10 ; <i32> [#uses=1] + %tmp.i5038 = icmp ugt i32 %tmp1.i5037, 15 ; <i1> [#uses=1] + %3 = zext i1 %tmp.i5038 to i8 ; <i8> [#uses=1] + %4 = icmp slt i8 %0, %3 ; <i1> [#uses=1] + %5 = add nsw i32 %1, 256 ; <i32> [#uses=1] + %storemerge.i.i57 = select i1 %4, i32 %5, i32 %1 ; <i32> [#uses=1] + %6 = shl i32 %storemerge.i.i57, 16 ; <i32> [#uses=1] + %7 = sdiv i32 %6, -256 ; <i32> [#uses=1] + %8 = trunc i32 %7 to i8 ; <i8> [#uses=1] + store i8 %8, i8* undef, align 1 + ret void +} + + diff --git a/test/CodeGen/X86/gather-addresses.ll b/test/CodeGen/X86/gather-addresses.ll new file mode 100644 index 0000000..0719838 --- /dev/null +++ b/test/CodeGen/X86/gather-addresses.ll @@ -0,0 +1,39 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s + +; When doing vector gather-scatter index calculation with 32-bit indices, +; bounce the vector off of cache rather than shuffling each individual +; element out of the index vector. + +; CHECK: pand (%rdx), %xmm0 +; CHECK: movaps %xmm0, -24(%rsp) +; CHECK: movslq -24(%rsp), %rax +; CHECK: movsd (%rdi,%rax,8), %xmm0 +; CHECK: movslq -20(%rsp), %rax +; CHECK: movhpd (%rdi,%rax,8), %xmm0 +; CHECK: movslq -16(%rsp), %rax +; CHECK: movsd (%rdi,%rax,8), %xmm1 +; CHECK: movslq -12(%rsp), %rax +; CHECK: movhpd (%rdi,%rax,8), %xmm1 + +define <4 x double> @foo(double* %p, <4 x i32>* %i, <4 x i32>* %h) nounwind { + %a = load <4 x i32>* %i + %b = load <4 x i32>* %h + %j = and <4 x i32> %a, %b + %d0 = extractelement <4 x i32> %j, i32 0 + %d1 = extractelement <4 x i32> %j, i32 1 + %d2 = extractelement <4 x i32> %j, i32 2 + %d3 = extractelement <4 x i32> %j, i32 3 + %q0 = getelementptr double* %p, i32 %d0 + %q1 = getelementptr double* %p, i32 %d1 + %q2 = getelementptr double* %p, i32 %d2 + %q3 = getelementptr double* %p, i32 %d3 + %r0 = load double* %q0 + %r1 = load double* %q1 + %r2 = load double* %q2 + %r3 = load double* %q3 + %v0 = insertelement <4 x double> undef, double %r0, i32 0 + %v1 = insertelement <4 x double> %v0, double %r1, i32 1 + %v2 = insertelement <4 x double> %v1, double %r2, i32 2 + %v3 = insertelement <4 x double> %v2, double %r3, i32 3 + ret <4 x double> %v3 +} diff --git a/test/CodeGen/X86/ghc-cc.ll b/test/CodeGen/X86/ghc-cc.ll new file mode 100644 index 0000000..9393cf5 --- /dev/null +++ b/test/CodeGen/X86/ghc-cc.ll @@ -0,0 +1,45 @@ +; RUN: llc < %s -tailcallopt -mtriple=i686-linux-gnu | FileCheck %s + +; Test the GHC call convention works (x86-32) + +@base = external global i32 ; assigned to register: EBX +@sp = external global i32 ; assigned to register: EBP +@hp = external global i32 ; assigned to register: EDI +@r1 = external global i32 ; assigned to register: ESI + +define void @zap(i32 %a, i32 %b) nounwind { +entry: + ; CHECK: movl {{[0-9]*}}(%esp), %ebx + ; CHECK-NEXT: movl {{[0-9]*}}(%esp), %ebp + ; CHECK-NEXT: call addtwo + %0 = call cc 10 i32 @addtwo(i32 %a, i32 %b) + ; CHECK: call foo + call void @foo() nounwind + ret void +} + +define cc 10 i32 @addtwo(i32 %x, i32 %y) nounwind { +entry: + ; CHECK: leal (%ebx,%ebp), %eax + %0 = add i32 %x, %y + ; CHECK-NEXT: ret + ret i32 %0 +} + +define cc 10 void @foo() nounwind { +entry: + ; CHECK: movl base, %ebx + ; CHECK-NEXT: movl sp, %ebp + ; CHECK-NEXT: movl hp, %edi + ; CHECK-NEXT: movl r1, %esi + %0 = load i32* @r1 + %1 = load i32* @hp + %2 = load i32* @sp + %3 = load i32* @base + ; CHECK: jmp bar + tail call cc 10 void @bar( i32 %3, i32 %2, i32 %1, i32 %0 ) nounwind + ret void +} + +declare cc 10 void @bar(i32, i32, i32, i32) + diff --git a/test/CodeGen/X86/ghc-cc64.ll b/test/CodeGen/X86/ghc-cc64.ll new file mode 100644 index 0000000..fcf7e17 --- /dev/null +++ b/test/CodeGen/X86/ghc-cc64.ll @@ -0,0 +1,86 @@ +; RUN: llc < %s -tailcallopt -mtriple=x86_64-linux-gnu | FileCheck %s + +; Check the GHC call convention works (x86-64) + +@base = external global i64 ; assigned to register: R13 +@sp = external global i64 ; assigned to register: RBP +@hp = external global i64 ; assigned to register: R12 +@r1 = external global i64 ; assigned to register: RBX +@r2 = external global i64 ; assigned to register: R14 +@r3 = external global i64 ; assigned to register: RSI +@r4 = external global i64 ; assigned to register: RDI +@r5 = external global i64 ; assigned to register: R8 +@r6 = external global i64 ; assigned to register: R9 +@splim = external global i64 ; assigned to register: R15 + +@f1 = external global float ; assigned to register: XMM1 +@f2 = external global float ; assigned to register: XMM2 +@f3 = external global float ; assigned to register: XMM3 +@f4 = external global float ; assigned to register: XMM4 +@d1 = external global double ; assigned to register: XMM5 +@d2 = external global double ; assigned to register: XMM6 + +define void @zap(i64 %a, i64 %b) nounwind { +entry: + ; CHECK: movq %rdi, %r13 + ; CHECK-NEXT: movq %rsi, %rbp + ; CHECK-NEXT: callq addtwo + %0 = call cc 10 i64 @addtwo(i64 %a, i64 %b) + ; CHECK: callq foo + call void @foo() nounwind + ret void +} + +define cc 10 i64 @addtwo(i64 %x, i64 %y) nounwind { +entry: + ; CHECK: leaq (%r13,%rbp), %rax + %0 = add i64 %x, %y + ; CHECK-NEXT: ret + ret i64 %0 +} + +define cc 10 void @foo() nounwind { +entry: + ; CHECK: movq base(%rip), %r13 + ; CHECK-NEXT: movq sp(%rip), %rbp + ; CHECK-NEXT: movq hp(%rip), %r12 + ; CHECK-NEXT: movq r1(%rip), %rbx + ; CHECK-NEXT: movq r2(%rip), %r14 + ; CHECK-NEXT: movq r3(%rip), %rsi + ; CHECK-NEXT: movq r4(%rip), %rdi + ; CHECK-NEXT: movq r5(%rip), %r8 + ; CHECK-NEXT: movq r6(%rip), %r9 + ; CHECK-NEXT: movq splim(%rip), %r15 + ; CHECK-NEXT: movss f1(%rip), %xmm1 + ; CHECK-NEXT: movss f2(%rip), %xmm2 + ; CHECK-NEXT: movss f3(%rip), %xmm3 + ; CHECK-NEXT: movss f4(%rip), %xmm4 + ; CHECK-NEXT: movsd d1(%rip), %xmm5 + ; CHECK-NEXT: movsd d2(%rip), %xmm6 + %0 = load double* @d2 + %1 = load double* @d1 + %2 = load float* @f4 + %3 = load float* @f3 + %4 = load float* @f2 + %5 = load float* @f1 + %6 = load i64* @splim + %7 = load i64* @r6 + %8 = load i64* @r5 + %9 = load i64* @r4 + %10 = load i64* @r3 + %11 = load i64* @r2 + %12 = load i64* @r1 + %13 = load i64* @hp + %14 = load i64* @sp + %15 = load i64* @base + ; CHECK: jmp bar + tail call cc 10 void @bar( i64 %15, i64 %14, i64 %13, i64 %12, i64 %11, + i64 %10, i64 %9, i64 %8, i64 %7, i64 %6, + float %5, float %4, float %3, float %2, double %1, + double %0 ) nounwind + ret void +} + +declare cc 10 void @bar(i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, + float, float, float, float, double, double) + diff --git a/test/CodeGen/X86/liveness-local-regalloc.ll b/test/CodeGen/X86/liveness-local-regalloc.ll new file mode 100644 index 0000000..17e65d8 --- /dev/null +++ b/test/CodeGen/X86/liveness-local-regalloc.ll @@ -0,0 +1,60 @@ +; RUN: llc < %s -O3 -regalloc=local -mtriple=x86_64-apple-darwin10 +; <rdar://problem/7755473> + +%0 = type { i32, i8*, i8*, %1*, i8*, i64, i64, i32, i32, i32, i32, [1024 x i8] } +%1 = type { i8*, i32, i32, i16, i16, %2, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %2, %3*, i32, [3 x i8], [1 x i8], %2, i32, i64 } +%2 = type { i8*, i32 } +%3 = type opaque + +declare fastcc i32 @func(%0*, i32, i32) nounwind ssp + +define fastcc void @func2(%0* %arg, i32 %arg1) nounwind ssp { +bb: + br label %.exit3 + +.exit3: ; preds = %.exit3, %bb + switch i32 undef, label %.exit3 [ + i32 -1, label %.loopexit + i32 37, label %bb2 + ] + +bb2: ; preds = %bb5, %bb3, %.exit3 + br i1 undef, label %bb3, label %bb5 + +bb3: ; preds = %bb2 + switch i32 undef, label %infloop [ + i32 125, label %.loopexit + i32 -1, label %bb4 + i32 37, label %bb2 + ] + +bb4: ; preds = %bb3 + %tmp = add nsw i32 undef, 1 ; <i32> [#uses=1] + br label %.loopexit + +bb5: ; preds = %bb2 + switch i32 undef, label %infloop1 [ + i32 -1, label %.loopexit + i32 37, label %bb2 + ] + +.loopexit: ; preds = %bb5, %bb4, %bb3, %.exit3 + %.04 = phi i32 [ %tmp, %bb4 ], [ undef, %bb3 ], [ undef, %.exit3 ], [ undef, %bb5 ] ; <i32> [#uses=2] + br i1 undef, label %bb8, label %bb6 + +bb6: ; preds = %.loopexit + %tmp7 = tail call fastcc i32 @func(%0* %arg, i32 %.04, i32 undef) nounwind ssp ; <i32> [#uses=0] + ret void + +bb8: ; preds = %.loopexit + %tmp9 = sext i32 %.04 to i64 ; <i64> [#uses=1] + %tmp10 = getelementptr inbounds %0* %arg, i64 0, i32 11, i64 %tmp9 ; <i8*> [#uses=1] + store i8 0, i8* %tmp10, align 1 + ret void + +infloop: ; preds = %infloop, %bb3 + br label %infloop + +infloop1: ; preds = %infloop1, %bb5 + br label %infloop1 +} diff --git a/test/CodeGen/X86/object-size.ll b/test/CodeGen/X86/object-size.ll index eed3cfc..bbe6b23 100644 --- a/test/CodeGen/X86/object-size.ll +++ b/test/CodeGen/X86/object-size.ll @@ -12,7 +12,7 @@ entry: %tmp = load i8** @p ; <i8*> [#uses=1] %0 = call i64 @llvm.objectsize.i64(i8* %tmp, i1 0) ; <i64> [#uses=1] %cmp = icmp ne i64 %0, -1 ; <i1> [#uses=1] -; X64: movq $-1, %rax +; X64: movabsq $-1, %rax ; X64: cmpq $-1, %rax br i1 %cmp, label %cond.true, label %cond.false diff --git a/test/CodeGen/X86/personality.ll b/test/CodeGen/X86/personality.ll index ce57e8f..5acf04c 100644 --- a/test/CodeGen/X86/personality.ll +++ b/test/CodeGen/X86/personality.ll @@ -39,7 +39,7 @@ declare void @__gxx_personality_v0() declare void @__cxa_end_catch() ; X64: Leh_frame_common_begin: -; X64: .long (___gxx_personality_v0@GOTPCREL)+4 +; X64: .long ___gxx_personality_v0@GOTPCREL+4 ; X32: Leh_frame_common_begin: ; X32: .long L___gxx_personality_v0$non_lazy_ptr- diff --git a/test/CodeGen/X86/phys_subreg_coalesce-3.ll b/test/CodeGen/X86/phys_subreg_coalesce-3.ll new file mode 100644 index 0000000..f23669e --- /dev/null +++ b/test/CodeGen/X86/phys_subreg_coalesce-3.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s +; rdar://5571034 + +define void @foo(i32* nocapture %quadrant, i32* nocapture %ptr, i32 %bbSize, i32 %bbStart, i32 %shifts) nounwind ssp { +; CHECK: foo: +entry: + %j.03 = add i32 %bbSize, -1 ; <i32> [#uses=2] + %0 = icmp sgt i32 %j.03, -1 ; <i1> [#uses=1] + br i1 %0, label %bb.nph, label %return + +bb.nph: ; preds = %entry + %tmp9 = add i32 %bbStart, %bbSize ; <i32> [#uses=1] + %tmp10 = add i32 %tmp9, -1 ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %bb, %bb.nph +; CHECK: %bb +; CHECK-NOT: movb {{.*}}l, %cl +; CHECK: sarl %cl + %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=3] + %j.06 = sub i32 %j.03, %indvar ; <i32> [#uses=1] + %tmp11 = sub i32 %tmp10, %indvar ; <i32> [#uses=1] + %scevgep = getelementptr i32* %ptr, i32 %tmp11 ; <i32*> [#uses=1] + %1 = load i32* %scevgep, align 4 ; <i32> [#uses=1] + %2 = ashr i32 %j.06, %shifts ; <i32> [#uses=1] + %3 = and i32 %2, 65535 ; <i32> [#uses=1] + %4 = getelementptr inbounds i32* %quadrant, i32 %1 ; <i32*> [#uses=1] + store i32 %3, i32* %4, align 4 + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %indvar.next, %bbSize ; <i1> [#uses=1] + br i1 %exitcond, label %return, label %bb + +return: ; preds = %bb, %entry + ret void +} diff --git a/test/CodeGen/X86/pic.ll b/test/CodeGen/X86/pic.ll index d3c28a0..e997233 100644 --- a/test/CodeGen/X86/pic.ll +++ b/test/CodeGen/X86/pic.ll @@ -15,7 +15,7 @@ entry: ; LINUX: call .L1$pb ; LINUX-NEXT: .L1$pb: ; LINUX-NEXT: popl -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref1-.L1$pb), +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L1$pb), ; LINUX: movl dst@GOT(%eax), ; LINUX: movl ptr@GOT(%eax), ; LINUX: movl src@GOT(%eax), @@ -37,7 +37,7 @@ entry: ; LINUX: call .L2$pb ; LINUX-NEXT: .L2$pb: ; LINUX-NEXT: popl -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref2-.L2$pb), %eax +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L2$pb), %eax ; LINUX: movl dst2@GOT(%eax), ; LINUX: movl ptr2@GOT(%eax), ; LINUX: movl src2@GOT(%eax), @@ -57,7 +57,7 @@ entry: ; LINUX-NEXT: call .L3$pb ; LINUX-NEXT: .L3$pb: ; LINUX-NEXT: popl %ebx -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref3-.L3$pb), %ebx +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L3$pb), %ebx ; LINUX: movl $40, (%esp) ; LINUX: call malloc@PLT ; LINUX: addl $8, %esp @@ -78,7 +78,7 @@ entry: ; LINUX: call .L4$pb ; LINUX-NEXT: .L4$pb: ; LINUX: popl -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref4-.L4$pb), +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L4$pb), ; LINUX: movl pfoo@GOT(%esi), ; LINUX: call afoo@PLT ; LINUX: call * @@ -93,7 +93,7 @@ entry: ; LINUX: test5: ; LINUX: call .L5$pb ; LINUX: popl %ebx -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref5-.L5$pb), %ebx +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L5$pb), %ebx ; LINUX: call foo@PLT } @@ -115,7 +115,7 @@ entry: ; LINUX: call .L6$pb ; LINUX-NEXT: .L6$pb: ; LINUX-NEXT: popl %eax -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref6-.L6$pb), %eax +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L6$pb), %eax ; LINUX: leal dst6@GOTOFF(%eax), %ecx ; LINUX: movl %ecx, ptr6@GOTOFF(%eax) ; LINUX: movl src6@GOTOFF(%eax), %ecx @@ -136,7 +136,7 @@ entry: ; LINUX: test7: ; LINUX: call .L7$pb ; LINUX: .L7$pb: -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref7-.L7$pb), +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L7$pb), ; LINUX: fldl .LCPI7_0@GOTOFF( } @@ -188,7 +188,7 @@ bb12: ; LINUX: test8: ; LINUX: call .L8$pb ; LINUX: .L8$pb: -; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref8-.L8$pb), +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L8$pb), ; LINUX: addl .LJTI8_0@GOTOFF( ; LINUX: jmpl * diff --git a/test/CodeGen/X86/tailcall-largecode.ll b/test/CodeGen/X86/tailcall-largecode.ll index 8ddc405..c7070f2 100644 --- a/test/CodeGen/X86/tailcall-largecode.ll +++ b/test/CodeGen/X86/tailcall-largecode.ll @@ -20,7 +20,7 @@ define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) ; CHECK: subq $8, %rsp ; Put the call target into R11, which won't be clobbered while restoring ; callee-saved registers and won't be used for passing arguments. -; CHECK: movq %rdi, %r11 +; CHECK: movq %rdi, %rax ; Pass the stack argument. ; CHECK: movl $7, 16(%rsp) ; Pass the register arguments, in the right registers. @@ -33,7 +33,7 @@ define fastcc i32 @indirect_manyargs(i32(i32,i32,i32,i32,i32,i32,i32)* %target) ; Adjust the stack to "return". ; CHECK: addq $8, %rsp ; And tail-call to the target. -; CHECK: jmpq *%r11 # TAILCALL +; CHECK: jmpq *%rax # TAILCALL %res = tail call fastcc i32 %target(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7) ret i32 %res @@ -60,11 +60,11 @@ define fastcc i32 @direct_manyargs() { ; the jmp instruction. Put it into R11, which won't be clobbered ; while restoring callee-saved registers and won't be used for passing ; arguments. -; CHECK: movabsq $manyargs_callee, %r11 +; CHECK: movabsq $manyargs_callee, %rax ; Adjust the stack to "return". ; CHECK: addq $8, %rsp ; And tail-call to the target. -; CHECK: jmpq *%r11 # TAILCALL +; CHECK: jmpq *%rax # TAILCALL %res = tail call fastcc i32 @manyargs_callee(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7) ret i32 %res diff --git a/test/CodeGen/X86/tailcallfp2.ll b/test/CodeGen/X86/tailcallfp2.ll index 3841f51..4ec127f 100644 --- a/test/CodeGen/X86/tailcallfp2.ll +++ b/test/CodeGen/X86/tailcallfp2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax} +; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%edx} declare i32 @putchar(i32) |
