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-rw-r--r--test/CodeGen/X86/crash.ll74
1 files changed, 74 insertions, 0 deletions
diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll
index 1e13046..4b7c850 100644
--- a/test/CodeGen/X86/crash.ll
+++ b/test/CodeGen/X86/crash.ll
@@ -18,3 +18,77 @@ entry:
volatile store i32 %conv19.i, i32* undef
ret i32 undef
}
+
+; PR6533
+define void @test2(i1 %x, i32 %y) nounwind {
+ %land.ext = zext i1 %x to i32 ; <i32> [#uses=1]
+ %and = and i32 %y, 1 ; <i32> [#uses=1]
+ %xor = xor i32 %and, %land.ext ; <i32> [#uses=1]
+ %cmp = icmp eq i32 %xor, 1 ; <i1> [#uses=1]
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %land.end
+ ret void
+
+if.end: ; preds = %land.end
+ ret void
+}
+
+; PR6577
+%pair = type { i64, double }
+
+define void @test3() {
+dependentGraph243.exit:
+ %subject19 = load %pair* undef ; <%1> [#uses=1]
+ %0 = extractvalue %pair %subject19, 1 ; <double> [#uses=2]
+ %1 = select i1 undef, double %0, double undef ; <double> [#uses=1]
+ %2 = select i1 undef, double %1, double %0 ; <double> [#uses=1]
+ %3 = insertvalue %pair undef, double %2, 1 ; <%1> [#uses=1]
+ store %pair %3, %pair* undef
+ ret void
+}
+
+; PR6605
+define i64 @test4(i8* %P) nounwind ssp {
+entry:
+ %tmp1 = load i8* %P ; <i8> [#uses=3]
+ %tobool = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1]
+ %tmp58 = sext i1 %tobool to i8 ; <i8> [#uses=1]
+ %mul.i = and i8 %tmp58, %tmp1 ; <i8> [#uses=1]
+ %conv6 = zext i8 %mul.i to i32 ; <i32> [#uses=1]
+ %cmp = icmp ne i8 %tmp1, 1 ; <i1> [#uses=1]
+ %conv11 = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ %call12 = tail call i32 @safe(i32 %conv11) nounwind ; <i32> [#uses=1]
+ %and = and i32 %conv6, %call12 ; <i32> [#uses=1]
+ %tobool13 = icmp eq i32 %and, 0 ; <i1> [#uses=1]
+ br i1 %tobool13, label %if.else, label %return
+
+if.else: ; preds = %entry
+ br label %return
+
+return: ; preds = %if.else, %entry
+ ret i64 undef
+}
+
+declare i32 @safe(i32)
+
+; PR6607
+define fastcc void @test5(i32 %FUNC) nounwind {
+foo:
+ %0 = load i8* undef, align 1 ; <i8> [#uses=3]
+ %1 = sext i8 %0 to i32 ; <i32> [#uses=2]
+ %2 = zext i8 %0 to i32 ; <i32> [#uses=1]
+ %tmp1.i5037 = urem i32 %2, 10 ; <i32> [#uses=1]
+ %tmp.i5038 = icmp ugt i32 %tmp1.i5037, 15 ; <i1> [#uses=1]
+ %3 = zext i1 %tmp.i5038 to i8 ; <i8> [#uses=1]
+ %4 = icmp slt i8 %0, %3 ; <i1> [#uses=1]
+ %5 = add nsw i32 %1, 256 ; <i32> [#uses=1]
+ %storemerge.i.i57 = select i1 %4, i32 %5, i32 %1 ; <i32> [#uses=1]
+ %6 = shl i32 %storemerge.i.i57, 16 ; <i32> [#uses=1]
+ %7 = sdiv i32 %6, -256 ; <i32> [#uses=1]
+ %8 = trunc i32 %7 to i8 ; <i8> [#uses=1]
+ store i8 %8, i8* undef, align 1
+ ret void
+}
+
+
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