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diff --git a/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
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+++ b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
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+; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s
+; Any register is OK for %0, but it must be a register, not memory.
+
+define i32 @foo() nounwind ssp {
+entry:
+; CHECK: GCROOT %eax
+ %_r = alloca i32, align 4 ; <i32*> [#uses=2]
+ call void asm "/* GCROOT $0 */", "=*imr,0,~{dirflag},~{fpsr},~{flags}"(i32* %_r, i32 4) nounwind
+ %0 = load i32* %_r, align 4 ; <i32> [#uses=1]
+ ret i32 %0
+}
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