summaryrefslogtreecommitdiffstats
path: root/test/CodeGen/SystemZ/int-cmp-35.ll
diff options
context:
space:
mode:
Diffstat (limited to 'test/CodeGen/SystemZ/int-cmp-35.ll')
-rw-r--r--test/CodeGen/SystemZ/int-cmp-35.ll139
1 files changed, 139 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/int-cmp-35.ll b/test/CodeGen/SystemZ/int-cmp-35.ll
new file mode 100644
index 0000000..9934906
--- /dev/null
+++ b/test/CodeGen/SystemZ/int-cmp-35.ll
@@ -0,0 +1,139 @@
+; Test 64-bit unsigned comparisons between memory and a constant.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+; Check ordered comparisons with a constant near the low end of the unsigned
+; 16-bit range.
+define double @f1(double %a, double %b, i64 *%ptr) {
+; CHECK: f1:
+; CHECK: clghsi 0(%r2), 2
+; CHECK-NEXT: j{{g?}}l
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %val = load i64 *%ptr
+ %cond = icmp ult i64 %val, 2
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check ordered comparisons with the high end of the unsigned 16-bit range.
+define double @f2(double %a, double %b, i64 *%ptr) {
+; CHECK: f2:
+; CHECK: clghsi 0(%r2), 65535
+; CHECK-NEXT: j{{g?}}l
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %val = load i64 *%ptr
+ %cond = icmp ult i64 %val, 65535
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check the next value up, which can't use CLGHSI.
+define double @f3(double %a, double %b, i64 *%ptr) {
+; CHECK: f3:
+; CHECK-NOT: clghsi
+; CHECK: br %r14
+ %val = load i64 *%ptr
+ %cond = icmp ult i64 %val, 65536
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check equality comparisons with 32768, the lowest value for which
+; we prefer CLGHSI to CGHSI.
+define double @f4(double %a, double %b, i64 *%ptr) {
+; CHECK: f4:
+; CHECK: clghsi 0(%r2), 32768
+; CHECK-NEXT: j{{g?}}e
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %val = load i64 *%ptr
+ %cond = icmp eq i64 %val, 32768
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check equality comparisons with the high end of the unsigned 16-bit range.
+define double @f5(double %a, double %b, i64 *%ptr) {
+; CHECK: f5:
+; CHECK: clghsi 0(%r2), 65535
+; CHECK-NEXT: j{{g?}}e
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %val = load i64 *%ptr
+ %cond = icmp eq i64 %val, 65535
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check the next value up, which can't use CLGHSI.
+define double @f6(double %a, double %b, i64 *%ptr) {
+; CHECK: f6:
+; CHECK-NOT: clghsi
+; CHECK: br %r14
+ %val = load i64 *%ptr
+ %cond = icmp eq i64 %val, 65536
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check the high end of the CLGHSI range.
+define double @f7(double %a, double %b, i64 %i1, i64 *%base) {
+; CHECK: f7:
+; CHECK: clghsi 4088(%r3), 2
+; CHECK-NEXT: j{{g?}}l
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %ptr = getelementptr i64 *%base, i64 511
+ %val = load i64 *%ptr
+ %cond = icmp ult i64 %val, 2
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check the next doubleword up, which needs separate address logic,
+define double @f8(double %a, double %b, i64 *%base) {
+; CHECK: f8:
+; CHECK: aghi %r2, 4096
+; CHECK: clghsi 0(%r2), 2
+; CHECK-NEXT: j{{g?}}l
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %ptr = getelementptr i64 *%base, i64 512
+ %val = load i64 *%ptr
+ %cond = icmp ult i64 %val, 2
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check negative offsets, which also need separate address logic.
+define double @f9(double %a, double %b, i64 *%base) {
+; CHECK: f9:
+; CHECK: aghi %r2, -8
+; CHECK: clghsi 0(%r2), 2
+; CHECK-NEXT: j{{g?}}l
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %ptr = getelementptr i64 *%base, i64 -1
+ %val = load i64 *%ptr
+ %cond = icmp ult i64 %val, 2
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
+
+; Check that CLGHSI does not allow indices.
+define double @f10(double %a, double %b, i64 %base, i64 %index) {
+; CHECK: f10:
+; CHECK: agr {{%r2, %r3|%r3, %r2}}
+; CHECK: clghsi 0({{%r[23]}}), 2
+; CHECK-NEXT: j{{g?}}l
+; CHECK: ldr %f0, %f2
+; CHECK: br %r14
+ %add = add i64 %base, %index
+ %ptr = inttoptr i64 %add to i64 *
+ %val = load i64 *%ptr
+ %cond = icmp ult i64 %val, 2
+ %res = select i1 %cond, double %a, double %b
+ ret double %res
+}
OpenPOWER on IntegriCloud