diff options
Diffstat (limited to 'test/CodeGen/PowerPC/mcm-obj.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/mcm-obj.ll | 151 |
1 files changed, 34 insertions, 117 deletions
diff --git a/test/CodeGen/PowerPC/mcm-obj.ll b/test/CodeGen/PowerPC/mcm-obj.ll index 117c3b3..720c5fb 100644 --- a/test/CodeGen/PowerPC/mcm-obj.ll +++ b/test/CodeGen/PowerPC/mcm-obj.ll @@ -1,7 +1,7 @@ ; RUN: llc -O0 -mcpu=pwr7 -code-model=medium -filetype=obj %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=MEDIUM %s +; RUN: llvm-readobj -r | FileCheck -check-prefix=MEDIUM %s ; RUN: llc -O0 -mcpu=pwr7 -code-model=large -filetype=obj %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=LARGE %s +; RUN: llvm-readobj -r | FileCheck -check-prefix=LARGE %s ; FIXME: When asm-parse is available, could make this an assembly test. @@ -21,25 +21,15 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing external variable ei. ; -; MEDIUM: '.rela.text' -; MEDIUM: Relocation 0 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM1:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 1 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM1]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM: Relocations [ +; MEDIUM: Section (1) .text { +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]] ; -; LARGE: '.rela.text' -; LARGE: Relocation 0 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM1:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 1 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM1]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE: Relocations [ +; LARGE: Section (1) .text { +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]] @test_fn_static.si = internal global i32 0, align 4 @@ -54,26 +44,14 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing function-scoped variable si. ; -; MEDIUM: Relocation 2 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 3 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM2]] -; MEDIUM-NEXT: 'r_type', 0x00000030 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]] ; ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing function-scoped variable si. ; -; LARGE: Relocation 2 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 3 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM2]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]] @gi = global i32 5, align 4 @@ -88,26 +66,14 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing file-scope variable gi. ; -; MEDIUM: Relocation 4 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 5 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM3]] -; MEDIUM-NEXT: 'r_type', 0x00000030 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM3]] ; ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing file-scope variable gi. ; -; LARGE: Relocation 4 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 5 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM3]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]] define double @test_double_const() nounwind { entry: @@ -117,26 +83,14 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing a constant. ; -; MEDIUM: Relocation 6 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 7 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM4]] -; MEDIUM-NEXT: 'r_type', 0x00000030 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM4]] ; ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing a constant. ; -; LARGE: Relocation 6 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 7 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM4]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]] define signext i32 @test_jump_table(i32 signext %i) nounwind { entry: @@ -185,23 +139,11 @@ sw.epilog: ; preds = %sw.bb3, %sw.default ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing a jump table address. ; -; MEDIUM: Relocation 8 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM5:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 9 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM5]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM5:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM5]] ; -; LARGE: Relocation 8 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM5:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 9 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM5]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM5:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM5]] @ti = common global i32 0, align 4 @@ -216,23 +158,11 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing tentatively declared variable ti. ; -; MEDIUM: Relocation 10 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM6:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 11 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM6]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] ; -; LARGE: Relocation 10 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM6:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 11 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM6]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] define i8* @test_fnaddr() nounwind { entry: @@ -248,21 +178,8 @@ declare signext i32 @foo(i32 signext) ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing function address foo. ; -; MEDIUM: Relocation 12 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM7:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 13 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM7]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM7:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]] ; -; LARGE: Relocation 12 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM7:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 13 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM7]] -; LARGE-NEXT: 'r_type', 0x00000040 - +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM7:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]] |
