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-rw-r--r--test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll2
-rw-r--r--test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll22
-rw-r--r--test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll64
-rw-r--r--test/CodeGen/MSP430/AddrMode-bis-rx.ll74
-rw-r--r--test/CodeGen/MSP430/AddrMode-bis-xr.ll81
-rw-r--r--test/CodeGen/MSP430/AddrMode-mov-rx.ll67
-rw-r--r--test/CodeGen/MSP430/AddrMode-mov-xr.ll67
-rw-r--r--test/CodeGen/MSP430/Inst16mr.ll10
-rw-r--r--test/CodeGen/MSP430/Inst16rm.ll10
-rw-r--r--test/CodeGen/MSP430/Inst16rr.ll8
-rw-r--r--test/CodeGen/MSP430/Inst8mr.ll10
-rw-r--r--test/CodeGen/MSP430/Inst8rm.ll10
-rw-r--r--test/CodeGen/MSP430/Inst8rr.ll8
-rw-r--r--test/CodeGen/MSP430/inline-asm.ll3
-rw-r--r--test/CodeGen/MSP430/postinc.ll114
15 files changed, 546 insertions, 4 deletions
diff --git a/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll b/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
index cc574c7..4d7d9b9 100644
--- a/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
+++ b/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
@@ -3,7 +3,7 @@
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-unknown-unknown"
-@"\010x0021" = common global i8 0, align 1 ; <i8*> [#uses=2]
+@"\010x0021" = external global i8, align 1 ; <i8*> [#uses=2]
define zeroext i8 @foo(i8 zeroext %x) nounwind {
entry:
diff --git a/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll b/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll
new file mode 100644
index 0000000..94fe5c7
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-elf"
+
+@g_29 = common global i8 0, align 1 ; <i8*> [#uses=0]
+
+define signext i8 @foo(i8 signext %_si1, i8 signext %_si2) nounwind readnone {
+entry:
+; CHECK: foo:
+; CHECK: call #__mulqi3
+ %mul = mul i8 %_si2, %_si1 ; <i8> [#uses=1]
+ ret i8 %mul
+}
+
+define void @uint81(i16* nocapture %p_32) nounwind {
+entry:
+ %call = tail call i16 @bar(i8* bitcast (i8 (i8, i8)* @foo to i8*)) nounwind ; <i16> [#uses=0]
+ ret void
+}
+
+declare i16 @bar(i8*)
diff --git a/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll b/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
new file mode 100644
index 0000000..d232aea
--- /dev/null
+++ b/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
@@ -0,0 +1,64 @@
+; RUN: llc < %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430-elf"
+
+%struct.httpd_fs_file = type { i8*, i16 }
+%struct.psock = type { %struct.pt, %struct.pt, i8*, i8*, i8*, i16, i16, %struct.httpd_fs_file, i16, i8, i8 }
+%struct.pt = type { i16 }
+
+@foo = external global i8*
+
+define signext i8 @psock_readto(%struct.psock* nocapture %psock, i8 zeroext %c) nounwind {
+entry:
+ switch i16 undef, label %sw.epilog [
+ i16 0, label %sw.bb
+ i16 283, label %if.else.i
+ ]
+
+sw.bb: ; preds = %entry
+ br label %do.body
+
+do.body: ; preds = %while.cond36.i, %while.end.i, %sw.bb
+ br label %while.cond.i
+
+if.else.i: ; preds = %entry
+ br i1 undef, label %psock_newdata.exit, label %if.else11.i
+
+if.else11.i: ; preds = %if.else.i
+ ret i8 0
+
+psock_newdata.exit: ; preds = %if.else.i
+ ret i8 0
+
+while.cond.i: ; preds = %while.body.i, %do.body
+ br i1 undef, label %while.end.i, label %while.body.i
+
+while.body.i: ; preds = %while.cond.i
+ br i1 undef, label %do.end41, label %while.cond.i
+
+while.end.i: ; preds = %while.cond.i
+ br i1 undef, label %do.body, label %while.cond36.i.preheader
+
+while.cond36.i.preheader: ; preds = %while.end.i
+ br label %while.cond36.i
+
+while.cond36.i: ; preds = %while.body41.i, %while.cond36.i.preheader
+ br i1 undef, label %do.body, label %while.body41.i
+
+while.body41.i: ; preds = %while.cond36.i
+ %tmp43.i = load i8** @foo ; <i8*> [#uses=2]
+ %tmp44.i = load i8* %tmp43.i ; <i8> [#uses=1]
+ %ptrincdec50.i = getelementptr inbounds i8* %tmp43.i, i16 1 ; <i8*> [#uses=1]
+ store i8* %ptrincdec50.i, i8** @foo
+ %cmp55.i = icmp eq i8 %tmp44.i, %c ; <i1> [#uses=1]
+ br i1 %cmp55.i, label %do.end41, label %while.cond36.i
+
+do.end41: ; preds = %while.body41.i, %while.body.i
+ br i1 undef, label %if.then46, label %sw.epilog
+
+if.then46: ; preds = %do.end41
+ ret i8 0
+
+sw.epilog: ; preds = %do.end41, %entry
+ ret i8 2
+}
diff --git a/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/test/CodeGen/MSP430/AddrMode-bis-rx.ll
new file mode 100644
index 0000000..3340494
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-bis-rx.ll
@@ -0,0 +1,74 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define i16 @am1(i16 %x, i16* %a) nounwind {
+ %1 = load i16* %a
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am1:
+; CHECK: bis.w 0(r14), r15
+
+@foo = external global i16
+
+define i16 @am2(i16 %x) nounwind {
+ %1 = load i16* @foo
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am2:
+; CHECK: bis.w &foo, r15
+
+@bar = internal constant [2 x i8] [ i8 32, i8 64 ]
+
+define i8 @am3(i8 %x, i16 %n) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %n
+ %2 = load i8* %1
+ %3 = or i8 %2,%x
+ ret i8 %3
+}
+; CHECK: am3:
+; CHECK: bis.b &bar(r14), r15
+
+define i16 @am4(i16 %x) nounwind {
+ %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am4:
+; CHECK: bis.w &32, r15
+
+define i16 @am5(i16 %x, i16* %a) nounwind {
+ %1 = getelementptr i16* %a, i16 2
+ %2 = load i16* %1
+ %3 = or i16 %2,%x
+ ret i16 %3
+}
+; CHECK: am5:
+; CHECK: bis.w 4(r14), r15
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer, align 1
+
+define i16 @am6(i16 %x) nounwind {
+ %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ %2 = or i16 %1,%x
+ ret i16 %2
+}
+; CHECK: am6:
+; CHECK: bis.w &baz+2, r15
+
+%T = type { i16, [2 x i8] }
+@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] }
+
+define i8 @am7(i8 %x, i16 %n) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ %3= load i8* %2
+ %4 = or i8 %3,%x
+ ret i8 %4
+}
+; CHECK: am7:
+; CHECK: bis.b &duh+2(r14), r15
+
diff --git a/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/test/CodeGen/MSP430/AddrMode-bis-xr.ll
new file mode 100644
index 0000000..ca79fb6
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-bis-xr.ll
@@ -0,0 +1,81 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define void @am1(i16* %a, i16 %x) nounwind {
+ %1 = load i16* %a
+ %2 = or i16 %x, %1
+ store i16 %2, i16* %a
+ ret void
+}
+; CHECK: am1:
+; CHECK: bis.w r14, 0(r15)
+
+@foo = external global i16
+
+define void @am2(i16 %x) nounwind {
+ %1 = load i16* @foo
+ %2 = or i16 %x, %1
+ store i16 %2, i16* @foo
+ ret void
+}
+; CHECK: am2:
+; CHECK: bis.w r15, &foo
+
+@bar = external global [2 x i8]
+
+define void @am3(i16 %i, i8 %x) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %i
+ %2 = load i8* %1
+ %3 = or i8 %x, %2
+ store i8 %3, i8* %1
+ ret void
+}
+; CHECK: am3:
+; CHECK: bis.b r14, &bar(r15)
+
+define void @am4(i16 %x) nounwind {
+ %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ %2 = or i16 %x, %1
+ volatile store i16 %2, i16* inttoptr(i16 32 to i16*)
+ ret void
+}
+; CHECK: am4:
+; CHECK: bis.w r15, &32
+
+define void @am5(i16* %a, i16 %x) readonly {
+ %1 = getelementptr inbounds i16* %a, i16 2
+ %2 = load i16* %1
+ %3 = or i16 %x, %2
+ store i16 %3, i16* %1
+ ret void
+}
+; CHECK: am5:
+; CHECK: bis.w r14, 4(r15)
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer
+
+define void @am6(i16 %x) nounwind {
+ %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ %2 = or i16 %x, %1
+ store i16 %2, i16* getelementptr (%S* @baz, i32 0, i32 1)
+ ret void
+}
+; CHECK: am6:
+; CHECK: bis.w r15, &baz+2
+
+%T = type { i16, [2 x i8] }
+@duh = external global %T
+
+define void @am7(i16 %n, i8 %x) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ %3 = load i8* %2
+ %4 = or i8 %x, %3
+ store i8 %4, i8* %2
+ ret void
+}
+; CHECK: am7:
+; CHECK: bis.b r14, &duh+2(r15)
+
diff --git a/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/test/CodeGen/MSP430/AddrMode-mov-rx.ll
new file mode 100644
index 0000000..67cbb02
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-mov-rx.ll
@@ -0,0 +1,67 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define i16 @am1(i16* %a) nounwind {
+ %1 = load i16* %a
+ ret i16 %1
+}
+; CHECK: am1:
+; CHECK: mov.w 0(r15), r15
+
+@foo = external global i16
+
+define i16 @am2() nounwind {
+ %1 = load i16* @foo
+ ret i16 %1
+}
+; CHECK: am2:
+; CHECK: mov.w &foo, r15
+
+@bar = internal constant [2 x i8] [ i8 32, i8 64 ]
+
+define i8 @am3(i16 %n) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %n
+ %2 = load i8* %1
+ ret i8 %2
+}
+; CHECK: am3:
+; CHECK: mov.b &bar(r15), r15
+
+define i16 @am4() nounwind {
+ %1 = volatile load i16* inttoptr(i16 32 to i16*)
+ ret i16 %1
+}
+; CHECK: am4:
+; CHECK: mov.w &32, r15
+
+define i16 @am5(i16* %a) nounwind {
+ %1 = getelementptr i16* %a, i16 2
+ %2 = load i16* %1
+ ret i16 %2
+}
+; CHECK: am5:
+; CHECK: mov.w 4(r15), r15
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer, align 1
+
+define i16 @am6() nounwind {
+ %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1)
+ ret i16 %1
+}
+; CHECK: am6:
+; CHECK: mov.w &baz+2, r15
+
+%T = type { i16, [2 x i8] }
+@duh = internal constant %T { i16 16, [2 x i8][i8 32, i8 64 ] }
+
+define i8 @am7(i16 %n) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ %3= load i8* %2
+ ret i8 %3
+}
+; CHECK: am7:
+; CHECK: mov.b &duh+2(r15), r15
+
diff --git a/test/CodeGen/MSP430/AddrMode-mov-xr.ll b/test/CodeGen/MSP430/AddrMode-mov-xr.ll
new file mode 100644
index 0000000..b8155d3
--- /dev/null
+++ b/test/CodeGen/MSP430/AddrMode-mov-xr.ll
@@ -0,0 +1,67 @@
+; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
+target triple = "msp430-generic-generic"
+
+define void @am1(i16* %a, i16 %b) nounwind {
+ store i16 %b, i16* %a
+ ret void
+}
+; CHECK: am1:
+; CHECK: mov.w r14, 0(r15)
+
+@foo = external global i16
+
+define void @am2(i16 %a) nounwind {
+ store i16 %a, i16* @foo
+ ret void
+}
+; CHECK: am2:
+; CHECK: mov.w r15, &foo
+
+@bar = external global [2 x i8]
+
+define void @am3(i16 %i, i8 %a) nounwind {
+ %1 = getelementptr [2 x i8]* @bar, i16 0, i16 %i
+ store i8 %a, i8* %1
+ ret void
+}
+; CHECK: am3:
+; CHECK: mov.b r14, &bar(r15)
+
+define void @am4(i16 %a) nounwind {
+ volatile store i16 %a, i16* inttoptr(i16 32 to i16*)
+ ret void
+}
+; CHECK: am4:
+; CHECK: mov.w r15, &32
+
+define void @am5(i16* nocapture %p, i16 %a) nounwind readonly {
+ %1 = getelementptr inbounds i16* %p, i16 2
+ store i16 %a, i16* %1
+ ret void
+}
+; CHECK: am5:
+; CHECK: mov.w r14, 4(r15)
+
+%S = type { i16, i16 }
+@baz = common global %S zeroinitializer, align 1
+
+define void @am6(i16 %a) nounwind {
+ store i16 %a, i16* getelementptr (%S* @baz, i32 0, i32 1)
+ ret void
+}
+; CHECK: am6:
+; CHECK: mov.w r15, &baz+2
+
+%T = type { i16, [2 x i8] }
+@duh = external global %T
+
+define void @am7(i16 %n, i8 %a) nounwind {
+ %1 = getelementptr %T* @duh, i32 0, i32 1
+ %2 = getelementptr [2 x i8]* %1, i16 0, i16 %n
+ store i8 %a, i8* %2
+ ret void
+}
+; CHECK: am7:
+; CHECK: mov.b r14, &duh+2(r15)
+
diff --git a/test/CodeGen/MSP430/Inst16mr.ll b/test/CodeGen/MSP430/Inst16mr.ll
index 53334aa..2613f01 100644
--- a/test/CodeGen/MSP430/Inst16mr.ll
+++ b/test/CodeGen/MSP430/Inst16mr.ll
@@ -37,6 +37,16 @@ define void @bis(i16 %a) nounwind {
ret void
}
+define void @bic(i16 zeroext %m) nounwind {
+; CHECK: bic:
+; CHECK: bic.w r15, &foo
+ %1 = xor i16 %m, -1
+ %2 = load i16* @foo
+ %3 = and i16 %2, %1
+ store i16 %3, i16* @foo
+ ret void
+}
+
define void @xor(i16 %a) nounwind {
; CHECK: xor:
; CHECK: xor.w r15, &foo
diff --git a/test/CodeGen/MSP430/Inst16rm.ll b/test/CodeGen/MSP430/Inst16rm.ll
index d0cb0d1..02e89c7 100644
--- a/test/CodeGen/MSP430/Inst16rm.ll
+++ b/test/CodeGen/MSP430/Inst16rm.ll
@@ -19,7 +19,6 @@ define i16 @and(i16 %a) nounwind {
ret i16 %2
}
-
define i16 @bis(i16 %a) nounwind {
; CHECK: bis:
; CHECK: bis.w &foo, r15
@@ -28,6 +27,15 @@ define i16 @bis(i16 %a) nounwind {
ret i16 %2
}
+define i16 @bic(i16 %a) nounwind {
+; CHECK: bic:
+; CHECK: bic.w &foo, r15
+ %1 = load i16* @foo
+ %2 = xor i16 %1, -1
+ %3 = and i16 %a, %2
+ ret i16 %3
+}
+
define i16 @xor(i16 %a) nounwind {
; CHECK: xor:
; CHECK: xor.w &foo, r15
diff --git a/test/CodeGen/MSP430/Inst16rr.ll b/test/CodeGen/MSP430/Inst16rr.ll
index 6619c51..2f1ba5b 100644
--- a/test/CodeGen/MSP430/Inst16rr.ll
+++ b/test/CodeGen/MSP430/Inst16rr.ll
@@ -29,6 +29,14 @@ define i16 @bis(i16 %a, i16 %b) nounwind {
ret i16 %1
}
+define i16 @bic(i16 %a, i16 %b) nounwind {
+; CHECK: bic:
+; CHECK: bic.w r14, r15
+ %1 = xor i16 %b, -1
+ %2 = and i16 %a, %1
+ ret i16 %2
+}
+
define i16 @xor(i16 %a, i16 %b) nounwind {
; CHECK: xor:
; CHECK: xor.w r14, r15
diff --git a/test/CodeGen/MSP430/Inst8mr.ll b/test/CodeGen/MSP430/Inst8mr.ll
index 04c681e..428d1fa 100644
--- a/test/CodeGen/MSP430/Inst8mr.ll
+++ b/test/CodeGen/MSP430/Inst8mr.ll
@@ -37,6 +37,16 @@ define void @bis(i8 %a) nounwind {
ret void
}
+define void @bic(i8 zeroext %m) nounwind {
+; CHECK: bic:
+; CHECK: bic.b r15, &foo
+ %1 = xor i8 %m, -1
+ %2 = load i8* @foo
+ %3 = and i8 %2, %1
+ store i8 %3, i8* @foo
+ ret void
+}
+
define void @xor(i8 %a) nounwind {
; CHECK: xor:
; CHECK: xor.b r15, &foo
diff --git a/test/CodeGen/MSP430/Inst8rm.ll b/test/CodeGen/MSP430/Inst8rm.ll
index 62a5d4b..c062f04 100644
--- a/test/CodeGen/MSP430/Inst8rm.ll
+++ b/test/CodeGen/MSP430/Inst8rm.ll
@@ -19,7 +19,6 @@ define i8 @and(i8 %a) nounwind {
ret i8 %2
}
-
define i8 @bis(i8 %a) nounwind {
; CHECK: bis:
; CHECK: bis.b &foo, r15
@@ -28,6 +27,15 @@ define i8 @bis(i8 %a) nounwind {
ret i8 %2
}
+define i8 @bic(i8 %a) nounwind {
+; CHECK: bic:
+; CHECK: bic.b &foo, r15
+ %1 = load i8* @foo
+ %2 = xor i8 %1, -1
+ %3 = and i8 %a, %2
+ ret i8 %3
+}
+
define i8 @xor(i8 %a) nounwind {
; CHECK: xor:
; CHECK: xor.b &foo, r15
diff --git a/test/CodeGen/MSP430/Inst8rr.ll b/test/CodeGen/MSP430/Inst8rr.ll
index 90ea945..74feaae 100644
--- a/test/CodeGen/MSP430/Inst8rr.ll
+++ b/test/CodeGen/MSP430/Inst8rr.ll
@@ -29,6 +29,14 @@ define i8 @bis(i8 %a, i8 %b) nounwind {
ret i8 %1
}
+define i8 @bic(i8 %a, i8 %b) nounwind {
+; CHECK: bic:
+; CHECK: bic.b r14, r15
+ %1 = xor i8 %b, -1
+ %2 = and i8 %a, %1
+ ret i8 %2
+}
+
define i8 @xor(i8 %a, i8 %b) nounwind {
; CHECK: xor:
; CHECK: xor.w r14, r15
diff --git a/test/CodeGen/MSP430/inline-asm.ll b/test/CodeGen/MSP430/inline-asm.ll
index 2cc25a4..0e7886a 100644
--- a/test/CodeGen/MSP430/inline-asm.ll
+++ b/test/CodeGen/MSP430/inline-asm.ll
@@ -20,6 +20,7 @@ define void @immmem() nounwind {
}
define void @mem() nounwind {
- call void asm sideeffect "bic\09$0,r2", "m"(i16* @foo) nounwind
+ %fooval = load i16* @foo
+ call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind
ret void
}
diff --git a/test/CodeGen/MSP430/postinc.ll b/test/CodeGen/MSP430/postinc.ll
new file mode 100644
index 0000000..8f01b83
--- /dev/null
+++ b/test/CodeGen/MSP430/postinc.ll
@@ -0,0 +1,114 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
+target triple = "msp430"
+
+define zeroext i16 @add(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: add:
+; CHECK: add.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = add i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @sub(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: sub:
+; CHECK: sub.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = sub i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @or(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: or:
+; CHECK: bis.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = or i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @xor(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: xor:
+; CHECK: xor.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = xor i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
+define zeroext i16 @and(i16* nocapture %a, i16 zeroext %n) nounwind readonly {
+entry:
+ %cmp8 = icmp eq i16 %n, 0 ; <i1> [#uses=1]
+ br i1 %cmp8, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2]
+ %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1]
+; CHECK: and:
+; CHECK: and.w @r{{[0-9]+}}+, r{{[0-9]+}}
+ %tmp4 = load i16* %arrayidx ; <i16> [#uses=1]
+ %add = and i16 %tmp4, %sum.09 ; <i16> [#uses=2]
+ %inc = add i16 %i.010, 1 ; <i16> [#uses=2]
+ %exitcond = icmp eq i16 %inc, %n ; <i1> [#uses=1]
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ %sum.0.lcssa = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1]
+ ret i16 %sum.0.lcssa
+}
+
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